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pcie: designware: mvebu: fix reset release polarity

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The dm_gpio_set_value() routine sets signal logical level, with
GPIO_ACTIVE_LOW/HIGH value taken into account. Reset active value is 1
(asserted), while reset inactive value is 0 (de-asserted). Fix the reset
toggle code to set the correct reset logic value.

Reported-by: Sven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Baruch Siach 2019-02-03 15:15:39 +02:00 committed by Stefan Roese
parent f301ba55c8
commit 6664a0e5f3
1 changed files with 3 additions and 1 deletions
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4
drivers/pci/pcie_dw_mvebu.c
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@ -489,7 +489,9 @@ static int pcie_dw_mvebu_probe(struct udevice *dev)
* using this GPIO.
*/
if (dm_gpio_is_valid(&reset_gpio)) {
dm_gpio_set_value(&reset_gpio, 1);
dm_gpio_set_value(&reset_gpio, 1); /* assert */
mdelay(200);
dm_gpio_set_value(&reset_gpio, 0); /* de-assert */
mdelay(200);
}
#else