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cache: l2x0: Fix missing write to Auxiliary Control Register 

In commit f62782fb29 ("cache: l2x0: Fix write to incorrect shared-override
bit") we removed writel to regs->pl310_aux_ctrl by accident.  This
commit restores it back.

Fixes: f62782fb29 ("cache: l2x0: Fix write to incorrect shared-override bit")
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
This commit is contained in:
Ley Foon Tan 2020-05-04 18:41:55 +08:00 committed by Tom Rini
parent 15c160301c
commit 653f7c4467
1 changed files with 2 additions and 0 deletions
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2
drivers/cache/cache-l2x0.c vendored
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@ -36,6 +36,8 @@ static void l2c310_of_parse_and_init(struct udevice *dev)
if (dev_read_bool(dev, "arm,shared-override"))
saved_reg |= L310_SHARED_ATT_OVERRIDE_ENABLE;
writel(saved_reg, &regs->pl310_aux_ctrl);
saved_reg = readl(&regs->pl310_tag_latency_ctrl);
if (!dev_read_u32_array(dev, "arm,tag-latency", tag, 3))
saved_reg |= L310_LATENCY_CTRL_RD(tag[0] - 1) |