riscv: andes_plic: Fix riscv_get_ipi() mask

Current logic in riscv_get_ipi() for Andes PLICSW does not look
correct. The mask to test IPI pending bits for a hart should be
left shifted by (8 * gd->arch.boot_hart), just the same as what
is done in riscv_send_ipi().

Fixes: 8b3e97badf ("riscv: add functions for reading the IPI status")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Rick Chen <rick@andestech.com>
This commit is contained in:
Bin Meng 2021-06-15 13:45:57 +08:00 committed by Leo Yu-Chi Liang
parent 279de759bd
commit 62ce0a02f9
1 changed files with 3 additions and 1 deletions

View File

@ -105,9 +105,11 @@ int riscv_clear_ipi(int hart)
int riscv_get_ipi(int hart, int *pending)
{
unsigned int ipi = (SEND_IPI_TO_HART(hart) << (8 * gd->arch.boot_hart));
*pending = readl((void __iomem *)PENDING_REG(gd->arch.plic,
gd->arch.boot_hart));
*pending = !!(*pending & SEND_IPI_TO_HART(hart));
*pending = !!(*pending & ipi);
return 0;
}