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dts: powerpc: p2020rdb: Add eTSEC DT nodes
P2020RDB implements 3 enhanced three-speed Ethernet controllers, and the connection is shown below: eTSEC1: Connected to RGMII switch VSC7385 eTSEC2: Connected to SGMII PHY VSC8221 eTSEC3: Connected to SGMII PHY AR8021 Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
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1e944259f5
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613e49bb91
@ -47,8 +47,12 @@
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status = "disabled";
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};
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/include/ "pq3-i2c-0.dtsi"
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/include/ "pq3-i2c-1.dtsi"
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/include/ "pq3-i2c-0.dtsi"
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/include/ "pq3-i2c-1.dtsi"
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/include/ "pq3-etsec1-0.dtsi"
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/include/ "pq3-etsec1-1.dtsi"
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/include/ "pq3-etsec1-2.dtsi"
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};
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/* PCIe controller base address 0x8000 */
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@ -41,6 +41,7 @@
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};
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};
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/include/ "p2020rdb-pc.dtsi"
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/include/ "p2020-post.dtsi"
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&espi0 {
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arch/powerpc/dts/p2020rdb-pc.dtsi
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arch/powerpc/dts/p2020rdb-pc.dtsi
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@ -0,0 +1,50 @@
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// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* P2020 RDB-PC Device Tree Source stub (no addresses or top-level ranges)
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*
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* Copyright 2011 Freescale Semiconductor Inc.
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* Copyright 2020 NXP
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*/
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&soc {
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mdio@24520 {
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phy0: ethernet-phy@0 {
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interrupts = <3 1 0 0>;
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reg = <0x0>;
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};
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phy1: ethernet-phy@1 {
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interrupts = <2 1 0 0>;
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reg = <0x1>;
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};
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};
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mdio@25520 {
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tbi0: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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mdio@26520 {
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status = "disabled";
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};
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enet0: ethernet@24000 {
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phy-connection-type = "rgmii-id";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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enet1: ethernet@25000 {
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tbi-handle = <&tbi0>;
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phy-handle = <&phy0>;
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phy-connection-type = "sgmii";
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};
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enet2: ethernet@26000 {
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phy-handle = <&phy1>;
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phy-connection-type = "rgmii-id";
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};
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};
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@ -41,6 +41,7 @@
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};
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};
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/include/ "p2020rdb-pc.dtsi"
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/include/ "p2020-post.dtsi"
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&espi0 {
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arch/powerpc/dts/pq3-etsec1-0.dtsi
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arch/powerpc/dts/pq3-etsec1-0.dtsi
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@ -0,0 +1,28 @@
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// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* PQ3 eTSEC device tree stub [ @ offsets 0x24000 ]
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*
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* Copyright 2011-2012 Freescale Semiconductor Inc.
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* Copyright 2020 NXP
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*/
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ethernet@24000 {
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#address-cells = <1>;
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#size-cells = <1>;
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cell-index = <0>;
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device_type = "network";
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model = "eTSEC";
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compatible = "gianfar";
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reg = <0x24000 0x1000>;
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ranges = <0x0 0x24000 0x1000>;
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fsl,magic-packet;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>;
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};
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mdio@24520 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,gianfar-mdio";
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reg = <0x24520 0x20>;
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};
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arch/powerpc/dts/pq3-etsec1-1.dtsi
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arch/powerpc/dts/pq3-etsec1-1.dtsi
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@ -0,0 +1,28 @@
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// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* PQ3 eTSEC device tree stub [ @ offsets 0x25000 ]
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*
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* Copyright 2011-2012 Freescale Semiconductor Inc.
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* Copyright 2020 NXP
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*/
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ethernet@25000 {
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#address-cells = <1>;
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#size-cells = <1>;
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cell-index = <1>;
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device_type = "network";
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model = "eTSEC";
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compatible = "gianfar";
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reg = <0x25000 0x1000>;
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ranges = <0x0 0x25000 0x1000>;
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fsl,magic-packet;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>;
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};
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mdio@25520 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,gianfar-tbi";
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reg = <0x25520 0x20>;
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};
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arch/powerpc/dts/pq3-etsec1-2.dtsi
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28
arch/powerpc/dts/pq3-etsec1-2.dtsi
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@ -0,0 +1,28 @@
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// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* PQ3 eTSEC device tree stub [ @ offsets 0x26000 ]
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*
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* Copyright 2011-2012 Freescale Semiconductor Inc.
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* Copyright 2020 NXP
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*/
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ethernet@26000 {
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#address-cells = <1>;
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#size-cells = <1>;
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cell-index = <2>;
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device_type = "network";
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model = "eTSEC";
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compatible = "gianfar";
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reg = <0x26000 0x1000>;
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ranges = <0x0 0x26000 0x1000>;
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fsl,magic-packet;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>;
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};
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mdio@26520 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,gianfar-tbi";
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reg = <0x26520 0x20>;
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};
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28
arch/powerpc/dts/pq3-etsec1-3.dtsi
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28
arch/powerpc/dts/pq3-etsec1-3.dtsi
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@ -0,0 +1,28 @@
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// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* PQ3 eTSEC device tree stub [ @ offsets 0x27000 ]
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*
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* Copyright 2011-2012 Freescale Semiconductor Inc.
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* Copyright 2020 NXP
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*/
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ethernet@27000 {
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#address-cells = <1>;
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#size-cells = <1>;
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cell-index = <3>;
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device_type = "network";
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model = "eTSEC";
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compatible = "gianfar";
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reg = <0x27000 0x1000>;
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ranges = <0x0 0x27000 0x1000>;
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fsl,magic-packet;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <37 2 0 0 38 2 0 0 39 2 0 0>;
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};
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mdio@27520 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,gianfar-tbi";
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reg = <0x27520 0x20>;
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};
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