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Second set of u-boot-atmel features for 2021.07 cycle
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commit
5fa1e2ffeb
@ -1320,6 +1320,7 @@
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reg = <0xfffffe30 0xf>;
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interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
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clocks = <&mck>;
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u-boot,dm-pre-reloc;
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};
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watchdog@fffffe40 {
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@ -63,7 +63,7 @@
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#size-cells = <1>;
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pioA: pinctrl@e0014000 {
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compatible = "atmel,sama5d2-gpio";
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compatible = "microchip,sama7g5-gpio";
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reg = <0xe0014000 0x800>;
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gpio-controller;
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#gpio-cells = <2>;
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@ -173,8 +173,15 @@ int atmel_pio4_get_pio_input(u32 port, u32 pin)
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#if CONFIG_IS_ENABLED(DM_GPIO)
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/**
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* struct atmel_pioctrl_data - Atmel PIO controller (pinmux + gpio) data struct
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* @nbanks: number of PIO banks
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* @last_bank_count: number of lines in the last bank (can be less than
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* the rest of the banks).
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*/
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struct atmel_pioctrl_data {
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u32 nbanks;
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u32 last_bank_count;
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};
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struct atmel_pio4_plat {
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@ -313,6 +320,12 @@ static int atmel_pio4_probe(struct udevice *dev)
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NULL);
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uc_priv->gpio_count = nbanks * ATMEL_PIO_NPINS_PER_BANK;
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/* if last bank has limited number of pins, adjust accordingly */
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if (pioctrl_data->last_bank_count != ATMEL_PIO_NPINS_PER_BANK) {
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uc_priv->gpio_count -= ATMEL_PIO_NPINS_PER_BANK;
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uc_priv->gpio_count += pioctrl_data->last_bank_count;
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}
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return 0;
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}
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@ -322,12 +335,21 @@ static int atmel_pio4_probe(struct udevice *dev)
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*/
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static const struct atmel_pioctrl_data atmel_sama5d2_pioctrl_data = {
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.nbanks = 4,
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.last_bank_count = ATMEL_PIO_NPINS_PER_BANK,
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};
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static const struct atmel_pioctrl_data microchip_sama7g5_pioctrl_data = {
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.nbanks = 5,
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.last_bank_count = 8, /* 5th bank has only 8 lines on sama7g5 */
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};
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static const struct udevice_id atmel_pio4_ids[] = {
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{
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.compatible = "atmel,sama5d2-gpio",
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.data = (ulong)&atmel_sama5d2_pioctrl_data,
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}, {
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.compatible = "microchip,sama7g5-gpio",
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.data = (ulong)µchip_sama7g5_pioctrl_data,
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},
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{}
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};
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