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phy: marvell: pass sgmii id to firmware
Currently, we don't pass id for SGMII 0/1. A bug in comphy selector configuration was found (in comphy firmware), after fixing it, SGMII0/1 have different configuration, so we need to pass the ID the firmware. Change-Id: Idcff4029cc9cf018278e493221b64b33574e0d38 Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com>
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@ -522,7 +522,7 @@ int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg,
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{
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struct comphy_map *ptr_comphy_map;
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void __iomem *comphy_base_addr, *hpipe_base_addr;
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u32 comphy_max_count, lane, ret = 0;
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u32 comphy_max_count, lane, id, ret = 0;
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u32 pcie_width = 0;
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u32 mode;
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@ -591,34 +591,17 @@ int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg,
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break;
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case COMPHY_TYPE_SGMII0:
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case COMPHY_TYPE_SGMII1:
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if (ptr_comphy_map->speed == COMPHY_SPEED_INVALID) {
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debug("Warning: ");
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debug("SGMII PHY speed in lane %d is invalid,",
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lane);
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debug(" set PHY speed to 1.25G\n");
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ptr_comphy_map->speed = COMPHY_SPEED_1_25G;
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}
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/*
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* UINIT_ID not relevant for SGMII0 and SGMII1 - will be
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* ignored by firmware
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*/
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mode = COMPHY_FW_FORMAT(COMPHY_SGMII_MODE,
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COMPHY_UNIT_ID0,
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ptr_comphy_map->speed);
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ret = comphy_smc(MV_SIP_COMPHY_POWER_ON,
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ptr_chip_cfg->comphy_base_addr, lane,
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mode);
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break;
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case COMPHY_TYPE_SGMII2:
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/* Calculate SGMII ID */
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id = ptr_comphy_map->type - COMPHY_TYPE_SGMII0;
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if (ptr_comphy_map->speed == COMPHY_SPEED_INVALID) {
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debug("Warning: SGMII PHY speed in lane %d is invalid, set PHY speed to 1.25G\n",
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lane);
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ptr_comphy_map->speed = COMPHY_SPEED_1_25G;
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}
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mode = COMPHY_FW_FORMAT(COMPHY_SGMII_MODE,
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COMPHY_UNIT_ID2,
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mode = COMPHY_FW_FORMAT(COMPHY_SGMII_MODE, id,
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ptr_comphy_map->speed);
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ret = comphy_smc(MV_SIP_COMPHY_POWER_ON,
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ptr_chip_cfg->comphy_base_addr, lane,
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