Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx

Makefile

@@ -309,26 +309,25 @@ $(obj)u-boot.sha1:	$(obj)u-boot.bin
 $(obj)u-boot.dis:	$(obj)u-boot
 		$(OBJDUMP) -d $< > $@
 
-$(obj)u-boot:		depend $(obj)include/autoconf.mk \
-			$(SUBDIRS) $(OBJS) $(LIBS) $(LDSCRIPT)
+$(obj)u-boot:		depend $(SUBDIRS) $(OBJS) $(LIBS) $(LDSCRIPT)
 		UNDEF_SYM=`$(OBJDUMP) -x $(LIBS) |sed  -n -e 's/.*\(__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
 		cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
 			--start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \
 			-Map u-boot.map -o u-boot
 
-$(OBJS):
+$(OBJS):	$(obj)include/autoconf.mk
 		$(MAKE) -C cpu/$(CPU) $(if $(REMOTE_BUILD),$@,$(notdir $@))
 
-$(LIBS):
+$(LIBS):	$(obj)include/autoconf.mk
 		$(MAKE) -C $(dir $(subst $(obj),,$@))
 
-$(SUBDIRS):
+$(SUBDIRS):	$(obj)include/autoconf.mk
 		$(MAKE) -C $@ all
 
-$(NAND_SPL):	$(VERSION_FILE)
+$(NAND_SPL):	$(VERSION_FILE)	$(obj)include/autoconf.mk
 		$(MAKE) -C nand_spl/board/$(BOARDDIR) all
 
-$(U_BOOT_NAND):	$(NAND_SPL) $(obj)u-boot.bin
+$(U_BOOT_NAND):	$(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
 		cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
 
 $(VERSION_FILE):

board/ads5121/ads5121.c

@@ -33,7 +33,8 @@
 			 CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) |	\
 			 CLOCK_SCCR1_PSCFIFO_EN |			\
 			 CLOCK_SCCR1_DDR_EN |				\
-			 CLOCK_SCCR1_FEC_EN)
+			 CLOCK_SCCR1_FEC_EN |				\
+			 CLOCK_SCCR1_TPR_EN)
 
 #define SCCR2_CLOCKS_EN	(CLOCK_SCCR2_MEM_EN |		\
 			 CLOCK_SCCR2_SPDIF_EN |		\
@@ -139,7 +140,7 @@ long int fixed_sdram (void)
 	im->mddrc.lut_table2_alternate_upper = CFG_MDDRCGRP_LUT2_AU;
 	im->mddrc.lut_table3_alternate_upper = CFG_MDDRCGRP_LUT3_AU;
 	im->mddrc.lut_table4_alternate_upper = CFG_MDDRCGRP_LUT4_AU;
-	im->mddrc.lut_table0_alternate_lower = CFG_MDDRCGRP_LUT0_AU;
+	im->mddrc.lut_table0_alternate_lower = CFG_MDDRCGRP_LUT0_AL;
 	im->mddrc.lut_table1_alternate_lower = CFG_MDDRCGRP_LUT1_AL;
 	im->mddrc.lut_table2_alternate_lower = CFG_MDDRCGRP_LUT2_AL;
 	im->mddrc.lut_table3_alternate_lower = CFG_MDDRCGRP_LUT3_AL;
@@ -180,9 +181,17 @@ int checkboard (void)
 {
 	ushort brd_rev = *(vu_short *) (CFG_CPLD_BASE + 0x00);
 	uchar cpld_rev = *(vu_char *) (CFG_CPLD_BASE + 0x02);
+	volatile immap_t *im = (immap_t *) CFG_IMMR;
+	volatile unsigned long *reg;
+	int i;
 
 	printf ("Board: ADS5121 rev. 0x%04x (CPLD rev. 0x%02x)\n",
 		brd_rev, cpld_rev);
+
+	/* change the slew rate on all pata pins to max */
+	reg = (unsigned long *) &(im->io_ctrl.regs[PATA_CE1_IDX]);
+	for (i = 0; i < 9; i++)
+		reg[i] |= 0x00000003;
 	return 0;
 }
 

board/amcc/kilauea/kilauea.c

@@ -192,13 +192,6 @@ int board_early_init_f (void)
 	 */
 	mtsdr(SDR0_SRST, 0);
 
-	/*
-	 * Configure FPGA register with PCIe reset
-	 */
-	out_be32((void *)CFG_FPGA_BASE, 0xff570cc0);	/* assert PCIe reset */
-	mdelay(50);
-	out_be32((void *)CFG_FPGA_BASE, 0xff570cc3);	/* deassert PCIe reset */
-
 	/* Configure 405EX for NAND usage */
 	val = SDR0_CUST0_MUX_NDFC_SEL |
 		SDR0_CUST0_NDFC_ENABLE |
@@ -214,6 +207,13 @@ int board_early_init_f (void)
 	val = SDR0_PFC1_USBEN | SDR0_PFC1_USBBIGEN | SDR0_PFC1_GPT_FREQ;
 	mtsdr(SDR0_PFC1, val);
 
+	/*
+	 * Configure FPGA register with PCIe reset
+	 */
+	out_be32((void *)CFG_FPGA_BASE, 0xff570cc4);	/* assert PCIe reset */
+	mdelay(50);
+	out_be32((void *)CFG_FPGA_BASE, 0xff570cc7);	/* deassert PCIe reset */
+
 	return 0;
 }
 

board/freescale/mpc8544ds/Makefile

@@ -35,7 +35,7 @@ OBJS	:= $(addprefix $(obj),$(COBJS))
 SOBJS	:= $(addprefix $(obj),$(SOBJS))
 
 $(LIB):	$(obj).depend $(OBJS) $(SOBJS)
-	$(AR) crv $@ $(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
 
 clean:
 	rm -f $(OBJS) $(SOBJS)

include/configs/ads5121.h

@@ -354,9 +354,9 @@
 #define CONFIG_ENV_OVERWRITE
 
 #define CONFIG_HOSTNAME		ads5121
-#define CONFIG_BOOTFILE		uImage
+#define CONFIG_BOOTFILE		ads5121/uImage
 
-#define CONFIG_LOADADDR		200000	/* default location for tftp and bootm */
+#define CONFIG_LOADADDR		400000	/* default location for tftp and bootm */
 
 #define CONFIG_BOOTDELAY	5	/* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS			/* the boot command will set bootargs */
@@ -368,43 +368,47 @@
 	"echo"
 
 #define	CONFIG_EXTRA_ENV_SETTINGS					\
+	"u-boot_addr_r=200000\0"					\
+	"kernel_addr_r=200000\0"					\
+	"fdt_addr_r=400000\0"						\
+	"ramdisk_addr_r=500000\0"					\
+	"u-boot_addr=FFF00000\0"					\
+	"kernel_addr=FC000000\0"					\
+	"fdt_addr=FC2C0000\0"						\
+	"ramdisk_addr=FC300000\0"					\
+	"ramdiskfile=ads5121/uRamdisk\0"				\
+	"fdtfile=ads5121/ads5121.dtb\0"					\
+	"u-boot=ads5121/u-boot.bin\0"					\
 	"netdev=eth0\0"							\
+	"consdev=ttyPSC0\0"						\
 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
 		"nfsroot=${serverip}:${rootpath}\0"			\
 	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
 	"addip=setenv bootargs ${bootargs} "				\
 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
 		":${hostname}:${netdev}:off panic=1\0"			\
-	"addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
+	"addtty=setenv bootargs ${bootargs} "				\
+		"console=${consdev},${baudrate}\0"			\
 	"flash_nfs=run nfsargs addip addtty;"				\
-		"bootm ${kernel_addr}\0"				\
+		"bootm ${kernel_addr_r} - ${fdt_addr}\0"		\
 	"flash_self=run ramargs addip addtty;"				\
-		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
-	"net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;"	\
-		"bootm\0"						\
-	"load=tftp 200000 /tftpboot/ads5121/u-boot.bin\0"		\
-	"update=protect off FFF00000 +${filesize};"			\
-		"era FFF00000 +${filesize};cp.b 200000 FFF00000 ${filesize}\0" \
-	"upd=run load;run update\0"					\
+		"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0"	\
+	"net_nfs=tftp ${kernel_addr_r} ${bootfile};"			\
+		"tftp ${fdt_addr_r} ${fdtfile};"			\
+		"run nfsargs addip addtty;"				\
+		"bootm ${kernel_addr_r} - ${fdt_addr_r}\0"		\
+	"net_self=tftp ${kernel_addr_r} ${bootfile};"			\
+		"tftp ${ramdisk_addr_r} ${ramdiskfile};"		\
+		"tftp ${fdt_addr} ${fdtfile};"				\
+		"run ramargs addip addtty;"				\
+		"bootm ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr}\0"\
+	"load=tftp ${u-boot_addr} ${u-boot}\0"				\
+	"update=protect off ${u-boot_addr} +${filesize};"		\
+		"era ${u-boot_addr} +${filesize};"			\
+		"cp.b ${u-boot_addr_r} ${u-boot_addr} ${filesize}\0"	\
+	"upd=run load update\0"						\
 	""
 
-#define CONFIG_NFSBOOTCOMMAND						\
-	"setenv bootargs root=/dev/nfs rw "				\
-		"nfsroot=$serverip:$rootpath "				\
-		"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
-		"console=$consoledev,$baudrate $othbootargs;"		\
-	"tftp $loadaddr $bootfile;"					\
-	"tftp $fdtaddr $fdtfile;"					\
-	"bootm $loadaddr - $fdtaddr"
-
-#define CONFIG_RAMBOOTCOMMAND						\
-	"setenv bootargs root=/dev/ram rw "				\
-		"console=$consoledev,$baudrate $othbootargs;"		\
-	"tftp $ramdiskaddr $ramdiskfile;"				\
-	"tftp $loadaddr $bootfile;"					\
-	"tftp $fdtaddr $fdtfile;"					\
-	"bootm $loadaddr $ramdiskaddr $fdtaddr"
-
 #define CONFIG_BOOTCOMMAND	"run flash_self"
 
 #define CONFIG_OF_LIBFDT	1

include/mpc512x.h

@@ -345,6 +345,15 @@
 
 /* Indexes in regs array */
 #define MEM_IDX			0x00
+#define PATA_CE1_IDX		0x2e
+#define PATA_CE2_IDX		0x2f
+#define PATA_ISOLATE_IDX	0x30
+#define PATA_IOR_IDX		0x31
+#define PATA_IOW_IDX		0x32
+#define PATA_IOCHRDY_IDX	0x33
+#define PATA_INTRQ_IDX		0x34
+#define PATA_DRQ_IDX		0x35
+#define PATA_DACK_IDX		0x36
 #define SPDIF_TXCLOCK_IDX	0x73
 #define SPDIF_TX_IDX		0x74
 #define SPDIF_RX_IDX		0x75