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https://github.com/brain-hackers/u-boot-brain
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spi: omap3: Drop nondm code
Now all boards are using this omap3 spi driver in dm model, so drop the nondm code. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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@ -226,6 +226,13 @@ config NXP_FSPI
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Enable the NXP FlexSPI (FSPI) driver. This driver can be used to
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Enable the NXP FlexSPI (FSPI) driver. This driver can be used to
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access the SPI NOR flash on platforms embedding this NXP IP core.
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access the SPI NOR flash on platforms embedding this NXP IP core.
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config OMAP3_SPI
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bool "McSPI driver for OMAP"
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help
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SPI master controller for OMAP24XX and later Multichannel SPI
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(McSPI). This driver be used to access SPI chips on platforms
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embedding this OMAP3 McSPI IP core.
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config PIC32_SPI
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config PIC32_SPI
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bool "Microchip PIC32 SPI driver"
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bool "Microchip PIC32 SPI driver"
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depends on MACH_PIC32
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depends on MACH_PIC32
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@ -429,11 +436,4 @@ config MXC_SPI
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Enable the MXC SPI controller driver. This driver can be used
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Enable the MXC SPI controller driver. This driver can be used
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on various i.MX SoCs such as i.MX31/35/51/6/7.
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on various i.MX SoCs such as i.MX31/35/51/6/7.
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config OMAP3_SPI
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bool "McSPI driver for OMAP"
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help
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SPI master controller for OMAP24XX and later Multichannel SPI
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(McSPI). This driver be used to access SPI chips on platforms
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embedding this OMAP3 McSPI IP core.
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endif # menu "SPI Support"
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endif # menu "SPI Support"
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@ -25,16 +25,6 @@
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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#if defined(CONFIG_AM33XX) || defined(CONFIG_AM43XX)
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#define OMAP3_MCSPI1_BASE 0x48030100
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#define OMAP3_MCSPI2_BASE 0x481A0100
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#else
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#define OMAP3_MCSPI1_BASE 0x48098000
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#define OMAP3_MCSPI2_BASE 0x4809A000
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#define OMAP3_MCSPI3_BASE 0x480B8000
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#define OMAP3_MCSPI4_BASE 0x480BA000
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#endif
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#define OMAP4_MCSPI_REG_OFFSET 0x100
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#define OMAP4_MCSPI_REG_OFFSET 0x100
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struct omap2_mcspi_platform_config {
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struct omap2_mcspi_platform_config {
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@ -109,9 +99,6 @@ struct mcspi {
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};
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};
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struct omap3_spi_priv {
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struct omap3_spi_priv {
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#if !CONFIG_IS_ENABLED(DM_SPI)
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struct spi_slave slave;
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#endif
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struct mcspi *regs;
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struct mcspi *regs;
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unsigned int cs;
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unsigned int cs;
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unsigned int freq;
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unsigned int freq;
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@ -455,128 +442,6 @@ static void _omap3_spi_claim_bus(struct omap3_spi_priv *priv)
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writel(conf, &priv->regs->modulctrl);
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writel(conf, &priv->regs->modulctrl);
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}
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}
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#if !CONFIG_IS_ENABLED(DM_SPI)
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static inline struct omap3_spi_priv *to_omap3_spi(struct spi_slave *slave)
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{
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return container_of(slave, struct omap3_spi_priv, slave);
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}
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void spi_free_slave(struct spi_slave *slave)
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{
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struct omap3_spi_priv *priv = to_omap3_spi(slave);
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free(priv);
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}
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int spi_claim_bus(struct spi_slave *slave)
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{
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struct omap3_spi_priv *priv = to_omap3_spi(slave);
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spi_reset(priv->regs);
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_omap3_spi_claim_bus(priv);
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_omap3_spi_set_wordlen(priv);
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_omap3_spi_set_mode(priv);
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_omap3_spi_set_speed(priv);
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return 0;
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}
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void spi_release_bus(struct spi_slave *slave)
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{
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struct omap3_spi_priv *priv = to_omap3_spi(slave);
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writel(OMAP3_MCSPI_MODULCTRL_MS, &priv->regs->modulctrl);
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}
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struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int mode)
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{
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struct omap3_spi_priv *priv;
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struct mcspi *regs;
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/*
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* OMAP3 McSPI (MultiChannel SPI) has 4 busses (modules)
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* with different number of chip selects (CS, channels):
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* McSPI1 has 4 CS (bus 0, cs 0 - 3)
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* McSPI2 has 2 CS (bus 1, cs 0 - 1)
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* McSPI3 has 2 CS (bus 2, cs 0 - 1)
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* McSPI4 has 1 CS (bus 3, cs 0)
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*/
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switch (bus) {
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case 0:
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regs = (struct mcspi *)OMAP3_MCSPI1_BASE;
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break;
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#ifdef OMAP3_MCSPI2_BASE
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case 1:
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regs = (struct mcspi *)OMAP3_MCSPI2_BASE;
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break;
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#endif
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#ifdef OMAP3_MCSPI3_BASE
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case 2:
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regs = (struct mcspi *)OMAP3_MCSPI3_BASE;
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break;
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#endif
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#ifdef OMAP3_MCSPI4_BASE
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case 3:
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regs = (struct mcspi *)OMAP3_MCSPI4_BASE;
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break;
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#endif
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default:
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printf("SPI error: unsupported bus %i. Supported busses 0 - 3\n", bus);
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return NULL;
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}
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if (((bus == 0) && (cs > 3)) ||
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((bus == 1) && (cs > 1)) ||
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((bus == 2) && (cs > 1)) ||
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((bus == 3) && (cs > 0))) {
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printf("SPI error: unsupported chip select %i on bus %i\n", cs, bus);
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return NULL;
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}
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if (max_hz > OMAP3_MCSPI_MAX_FREQ) {
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printf("SPI error: unsupported frequency %i Hz. Max frequency is 48 MHz\n",
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max_hz);
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return NULL;
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}
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if (mode > SPI_MODE_3) {
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printf("SPI error: unsupported SPI mode %i\n", mode);
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return NULL;
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}
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priv = spi_alloc_slave(struct omap3_spi_priv, bus, cs);
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if (!priv) {
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printf("SPI error: malloc of SPI structure failed\n");
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return NULL;
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}
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priv->regs = regs;
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priv->cs = cs;
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priv->freq = max_hz;
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priv->mode = mode;
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priv->wordlen = priv->slave.wordlen;
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#if 0
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/* Please migrate to DM_SPI support for this feature. */
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priv->pin_dir = MCSPI_PINDIR_D0_OUT_D1_IN;
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#endif
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return &priv->slave;
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}
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int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
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const void *dout, void *din, unsigned long flags)
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{
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struct omap3_spi_priv *priv = to_omap3_spi(slave);
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return _spi_xfer(priv, bitlen, dout, din, flags);
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}
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#else
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static int omap3_spi_claim_bus(struct udevice *dev)
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static int omap3_spi_claim_bus(struct udevice *dev)
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{
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{
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struct udevice *bus = dev->parent;
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struct udevice *bus = dev->parent;
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@ -701,4 +566,3 @@ U_BOOT_DRIVER(omap3_spi) = {
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.ops = &omap3_spi_ops,
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.ops = &omap3_spi_ops,
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.priv_auto_alloc_size = sizeof(struct omap3_spi_priv),
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.priv_auto_alloc_size = sizeof(struct omap3_spi_priv),
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};
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};
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#endif
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