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usb: phy: omap_usb_phy: implement usb_phy_power() for AM437x

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Newer AM437x silicon requires us to explicitly power up
the USB2 PHY. By implementing usb_phy_power() we can
achieve that.

Signed-off-by: Felipe Balbi <balbi@ti.com>
This commit is contained in:
Felipe Balbi 2014-06-23 17:18:24 -05:00 committed by Marek Vasut
parent 26707d9e6b
commit 5ba95541b7
2 changed files with 21 additions and 1 deletions
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5
arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
View File

@ -43,6 +43,11 @@
#define VTP0_CTRL_ADDR 0x44E10E0C
#define VTP1_CTRL_ADDR 0x48140E10
/* USB CTRL Base Address */
#define USB1_CTRL 0x44e10628
#define USB1_CTRL_CM_PWRDN BIT(0)
#define USB1_CTRL_OTG_PWRDN BIT(1)
/* DDR Base address */
#define DDR_PHY_CMD_ADDR 0x44E12000
#define DDR_PHY_DATA_ADDR 0x44E120C8

17
drivers/usb/phy/omap_usb_phy.c
View File

@ -222,7 +222,22 @@ static void am437x_enable_usb2_phy2(struct omap_xhci *omap)
void usb_phy_power(int on)
{
return;
u32 val;
/* USB1_CTRL */
val = readl(USB1_CTRL);
if (on) {
/*
* these bits are re-used on AM437x to power up/down the USB
* CM and OTG PHYs, if we don't toggle them, USB will not be
* functional on newer silicon revisions
*/
val &= ~(USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN);
} else {
val |= USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN;
}
writel(val, USB1_CTRL);
}
#endif /* CONFIG_AM437X_USB2PHY2_HOST */