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https://github.com/brain-hackers/u-boot-brain
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mmc: sdhci: use dma_map_single() instead of flush_cache() before DMA
Currently, sdhci_prepare_dma() calls flush_cache() regardless of the DMA direction. Actually, cache invalidation is enough when reading data from the device. This is correctly handled by dma_map_single(), which mimics the DMA-API in Linux kernel. Drivers can be agnostic which cache operation occurs behind the scene. This commit also sanitizes the difference between the virtual address and the dma address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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@ -15,6 +15,7 @@
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#include <mmc.h>
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#include <sdhci.h>
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#include <dm.h>
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#include <linux/dma-mapping.h>
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static void sdhci_reset(struct sdhci_host *host, u8 mask)
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{
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@ -65,8 +66,8 @@ static void sdhci_transfer_pio(struct sdhci_host *host, struct mmc_data *data)
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}
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#if CONFIG_IS_ENABLED(MMC_SDHCI_ADMA)
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static void sdhci_adma_desc(struct sdhci_host *host, char *buf, u16 len,
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bool end)
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static void sdhci_adma_desc(struct sdhci_host *host, dma_addr_t dma_addr,
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u16 len, bool end)
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{
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struct sdhci_adma_desc *desc;
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u8 attr;
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@ -82,9 +83,9 @@ static void sdhci_adma_desc(struct sdhci_host *host, char *buf, u16 len,
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desc->attr = attr;
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desc->len = len;
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desc->reserved = 0;
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desc->addr_lo = (dma_addr_t)buf;
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desc->addr_lo = lower_32_bits(dma_addr);
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#ifdef CONFIG_DMA_ADDR_T_64BIT
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desc->addr_hi = (u64)buf >> 32;
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desc->addr_hi = upper_32_bits(dma_addr);
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#endif
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}
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@ -94,22 +95,17 @@ static void sdhci_prepare_adma_table(struct sdhci_host *host,
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uint trans_bytes = data->blocksize * data->blocks;
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uint desc_count = DIV_ROUND_UP(trans_bytes, ADMA_MAX_LEN);
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int i = desc_count;
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char *buf;
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dma_addr_t dma_addr = host->start_addr;
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host->desc_slot = 0;
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if (data->flags & MMC_DATA_READ)
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buf = data->dest;
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else
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buf = (char *)data->src;
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while (--i) {
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sdhci_adma_desc(host, buf, ADMA_MAX_LEN, false);
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buf += ADMA_MAX_LEN;
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sdhci_adma_desc(host, dma_addr, ADMA_MAX_LEN, false);
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dma_addr += ADMA_MAX_LEN;
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trans_bytes -= ADMA_MAX_LEN;
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}
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sdhci_adma_desc(host, buf, trans_bytes, true);
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sdhci_adma_desc(host, dma_addr, trans_bytes, true);
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flush_cache((dma_addr_t)host->adma_desc_table,
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ROUND(desc_count * sizeof(struct sdhci_adma_desc),
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@ -125,11 +121,12 @@ static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data,
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int *is_aligned, int trans_bytes)
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{
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unsigned char ctrl;
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void *buf;
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if (data->flags == MMC_DATA_READ)
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host->start_addr = (dma_addr_t)data->dest;
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buf = data->dest;
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else
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host->start_addr = (dma_addr_t)data->src;
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buf = (void *)data->src;
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ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
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ctrl &= ~SDHCI_CTRL_DMA_MASK;
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@ -139,16 +136,20 @@ static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data,
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ctrl |= SDHCI_CTRL_ADMA32;
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sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
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if (host->flags & USE_SDMA &&
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(host->force_align_buffer ||
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(host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR &&
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((unsigned long)buf & 0x7) != 0x0))) {
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*is_aligned = 0;
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if (data->flags != MMC_DATA_READ)
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memcpy(host->align_buffer, buf, trans_bytes);
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buf = host->align_buffer;
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}
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host->start_addr = dma_map_single(buf, trans_bytes,
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mmc_get_dma_dir(data));
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if (host->flags & USE_SDMA) {
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if (host->force_align_buffer ||
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(host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR &&
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(host->start_addr & 0x7) != 0x0)) {
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*is_aligned = 0;
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host->start_addr = (unsigned long)host->align_buffer;
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if (data->flags != MMC_DATA_READ)
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memcpy(host->align_buffer, data->src,
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trans_bytes);
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}
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sdhci_writel(host, host->start_addr, SDHCI_DMA_ADDRESS);
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} else if (host->flags & (USE_ADMA | USE_ADMA64)) {
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sdhci_prepare_adma_table(host, data);
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@ -159,8 +160,6 @@ static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data,
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sdhci_writel(host, upper_32_bits(host->adma_addr),
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SDHCI_ADMA_ADDRESS_HI);
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}
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flush_cache(host->start_addr, ROUND(trans_bytes, ARCH_DMA_MINALIGN));
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}
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#else
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static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data,
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