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https://github.com/brain-hackers/u-boot-brain
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timer: cadence: Implement timer_get_boot_us
This function is required for adding bootstage support. Also enable it directly for ZynqMP R5 configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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@ -5,10 +5,12 @@ CONFIG_DEBUG_UART_BASE=0xff010000
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CONFIG_DEBUG_UART_CLOCK=100000000
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CONFIG_DEBUG_UART_CLOCK=100000000
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CONFIG_DEFAULT_DEVICE_TREE="zynqmp-r5"
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CONFIG_DEFAULT_DEVICE_TREE="zynqmp-r5"
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CONFIG_DEBUG_UART=y
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CONFIG_DEBUG_UART=y
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CONFIG_BOOTSTAGE=y
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# CONFIG_DISPLAY_CPUINFO is not set
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_SYS_PROMPT="ZynqMP r5> "
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CONFIG_SYS_PROMPT="ZynqMP r5> "
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# CONFIG_CMD_FLASH is not set
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# CONFIG_CMD_FLASH is not set
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# CONFIG_CMD_SETEXPR is not set
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_BOOTSTAGE=y
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CONFIG_OF_EMBED=y
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CONFIG_OF_EMBED=y
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CONFIG_DEBUG_UART_ZYNQ=y
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CONFIG_DEBUG_UART_ZYNQ=y
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CONFIG_ZYNQ_SERIAL=y
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CONFIG_ZYNQ_SERIAL=y
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@ -31,6 +31,28 @@ struct cadence_ttc_priv {
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struct cadence_ttc_regs *regs;
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struct cadence_ttc_regs *regs;
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};
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};
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#if CONFIG_IS_ENABLED(BOOTSTAGE)
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ulong timer_get_boot_us(void)
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{
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u64 ticks = 0;
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u32 rate = 1;
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u64 us;
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int ret;
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ret = dm_timer_init();
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if (!ret) {
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/* The timer is available */
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rate = timer_get_rate(gd->timer);
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timer_get_count(gd->timer, &ticks);
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} else {
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return 0;
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}
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us = (ticks * 1000) / rate;
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return us;
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}
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#endif
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static int cadence_ttc_get_count(struct udevice *dev, u64 *count)
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static int cadence_ttc_get_count(struct udevice *dev, u64 *count)
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{
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{
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struct cadence_ttc_priv *priv = dev_get_priv(dev);
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struct cadence_ttc_priv *priv = dev_get_priv(dev);
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