mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
board: armltd: Add support for Total Compute platform
Total Compute is based on ARM architecture and has the following features enabled in u-boot: - PL011 UART - PL180 MMC - NOR Flash - FIT image with Signature - AVB Signed-off-by: Usama Arif <usama.arif@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
parent
e61b41517d
commit
565add124d
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@ -1198,6 +1198,15 @@ config TARGET_VEXPRESS64_JUNO
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select USB
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select USB
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select DM_USB
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select DM_USB
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config TARGET_TOTAL_COMPUTE
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bool "Support Total Compute Platform"
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select ARM64
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select PL01X_SERIAL
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select DM
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select DM_SERIAL
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select DM_MMC
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select DM_GPIO
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config TARGET_LS2080A_EMU
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config TARGET_LS2080A_EMU
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bool "Support ls2080a_emu"
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bool "Support ls2080a_emu"
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select ARCH_LS2080A
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select ARCH_LS2080A
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@ -1904,6 +1913,8 @@ source "arch/arm/mach-imx/Kconfig"
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source "arch/arm/mach-nexell/Kconfig"
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source "arch/arm/mach-nexell/Kconfig"
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source "board/armltd/total_compute/Kconfig"
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source "board/bosch/shc/Kconfig"
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source "board/bosch/shc/Kconfig"
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source "board/bosch/guardian/Kconfig"
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source "board/bosch/guardian/Kconfig"
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source "board/CarMediaLab/flea3/Kconfig"
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source "board/CarMediaLab/flea3/Kconfig"
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@ -981,6 +981,8 @@ dtb-$(CONFIG_TARGET_VEXPRESS_CA5X2) += vexpress-v2p-ca5s.dtb
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dtb-$(CONFIG_TARGET_VEXPRESS_CA9X4) += vexpress-v2p-ca9.dtb
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dtb-$(CONFIG_TARGET_VEXPRESS_CA9X4) += vexpress-v2p-ca9.dtb
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dtb-$(CONFIG_TARGET_VEXPRESS_CA15_TC2) += vexpress-v2p-ca15_a7.dtb
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dtb-$(CONFIG_TARGET_VEXPRESS_CA15_TC2) += vexpress-v2p-ca15_a7.dtb
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dtb-$(CONFIG_TARGET_TOTAL_COMPUTE) += total_compute.dtb
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dtb-$(CONFIG_TARGET_DURIAN) += phytium-durian.dtb
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dtb-$(CONFIG_TARGET_DURIAN) += phytium-durian.dtb
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dtb-$(CONFIG_TARGET_PRESIDIO_ASIC) += ca-presidio-engboard.dtb
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dtb-$(CONFIG_TARGET_PRESIDIO_ASIC) += ca-presidio-engboard.dtb
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48
arch/arm/dts/total_compute.dts
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48
arch/arm/dts/total_compute.dts
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@ -0,0 +1,48 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2020 Arm Limited
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*/
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/dts-v1/;
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/ {
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model = "total_compute";
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compatible = "arm,total_compute";
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#address-cells = <2>;
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#size-cells = <2>;
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sysreg: sysreg@1c010000 {
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compatible = "arm,vexpress-sysreg";
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reg = <0x0 0x001c010000 0x0 0x1000>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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fixed_3v3: v2m-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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mmci@1c050000 {
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compatible = "arm,pl180", "arm,primecell";
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reg = <0x0 0x001c050000 0x0 0x1000>;
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cd-gpios = <&sysreg 0 0>;
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arm,primecell-periphid = <0x00880180>;
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wp-gpios = <&sysreg 1 0>;
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bus-width = <8>;
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max-frequency = <12000000>;
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vmmc-supply = <&fixed_3v3>;
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clocks = <&clock24mhz>, <&clock24mhz>;
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clock-names = "mclk", "apb_pclk";
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};
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clock24mhz: clock24mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24000000>;
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clock-output-names = "bp:clock24mhz";
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};
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};
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@ -3,7 +3,7 @@
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!defined(CONFIG_ARCH_BCM6858) && !defined(CONFIG_ARCH_BCM63158) && \
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!defined(CONFIG_ARCH_BCM6858) && !defined(CONFIG_ARCH_BCM63158) && \
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!defined(CONFIG_ARCH_ROCKCHIP) && !defined(CONFIG_ARCH_ASPEED) && \
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!defined(CONFIG_ARCH_ROCKCHIP) && !defined(CONFIG_ARCH_ASPEED) && \
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!defined(CONFIG_ARCH_U8500) && !defined(CONFIG_CORTINA_PLATFORM) && \
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!defined(CONFIG_ARCH_U8500) && !defined(CONFIG_CORTINA_PLATFORM) && \
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!defined(CONFIG_TARGET_BCMNS3)
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!defined(CONFIG_TARGET_BCMNS3) && !defined(CONFIG_TARGET_TOTAL_COMPUTE)
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#include <asm/arch/gpio.h>
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#include <asm/arch/gpio.h>
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#endif
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#endif
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#include <asm-generic/gpio.h>
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#include <asm-generic/gpio.h>
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12
board/armltd/total_compute/Kconfig
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12
board/armltd/total_compute/Kconfig
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@ -0,0 +1,12 @@
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if TARGET_TOTAL_COMPUTE
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config SYS_BOARD
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default "total_compute"
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config SYS_VENDOR
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default "armltd"
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config SYS_CONFIG_NAME
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default "total_compute"
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endif
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7
board/armltd/total_compute/MAINTAINERS
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7
board/armltd/total_compute/MAINTAINERS
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@ -0,0 +1,7 @@
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TOTAL_COMPUTE BOARD
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M: Usama Arif <usama.arif@arm.com>
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S: Maintained
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F: board/armltd/total_compute/
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F: include/configs/total_compute.h
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F: configs/total_compute_defconfig
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F: arch/arm/dts/total_compute.dts
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6
board/armltd/total_compute/Makefile
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6
board/armltd/total_compute/Makefile
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@ -0,0 +1,6 @@
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# SPDX-License-Identifier: GPL-2.0+
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#
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# (C) Copyright 2020 Arm Limited
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# Usama Arif <usama.arif@arm.com>
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obj-y := total_compute.o
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67
board/armltd/total_compute/total_compute.c
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67
board/armltd/total_compute/total_compute.c
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@ -0,0 +1,67 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2020 Arm Limited
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* Usama Arif <usama.arif@arm.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <dm/platform_data/serial_pl01x.h>
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#include <asm/armv8/mmu.h>
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static const struct pl01x_serial_platdata serial_platdata = {
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.base = UART0_BASE,
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.type = TYPE_PL011,
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.clock = CONFIG_PL011_CLOCK,
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};
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U_BOOT_DEVICE(total_compute_serials) = {
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.name = "serial_pl01x",
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.platdata = &serial_platdata,
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};
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static struct mm_region total_compute_mem_map[] = {
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{
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.virt = 0x0UL,
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.phys = 0x0UL,
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.size = 0x80000000UL,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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.virt = 0x80000000UL,
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.phys = 0x80000000UL,
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.size = 0xff80000000UL,
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.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
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PTE_BLOCK_INNER_SHARE
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}, {
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/* List terminator */
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0,
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}
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};
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struct mm_region *mem_map = total_compute_mem_map;
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int board_init(void)
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{
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return 0;
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}
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int dram_init(void)
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{
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gd->ram_size = PHYS_SDRAM_1_SIZE;
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return 0;
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}
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int dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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return 0;
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}
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/* Nothing to be done here as handled by PSCI interface */
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void reset_cpu(ulong addr)
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{
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}
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53
configs/total_compute_defconfig
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53
configs/total_compute_defconfig
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@ -0,0 +1,53 @@
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CONFIG_ARM=y
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CONFIG_TARGET_TOTAL_COMPUTE=y
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CONFIG_SYS_TEXT_BASE=0xe0000000
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_ENV_SIZE=0x2a00000
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_DEFAULT_DEVICE_TREE="total_compute"
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_ANDROID_BOOT_IMAGE=y
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CONFIG_FIT=y
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CONFIG_FIT_SIGNATURE=y
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CONFIG_LEGACY_IMAGE_FORMAT=y
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CONFIG_BOOTDELAY=5
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyAMA0 debug user_debug=31 earlycon=pl011,0x7ff80000 loglevel=9 androidboot.hardware=total_compute video=640x480-32@60 androidboot.boot_devices=1c050000.mmci ip=dhcp androidboot.selinux=permissive"
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# CONFIG_USE_BOOTCOMMAND is not set
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# CONFIG_DISPLAY_CPUINFO is not set
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_AVB_VERIFY=y
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CONFIG_AVB_BUF_ADDR=0x90000000
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CONFIG_AVB_BUF_SIZE=0x10000000
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CONFIG_SYS_PROMPT="TOTAL_COMPUTE# "
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# CONFIG_CMD_CONSOLE is not set
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# CONFIG_CMD_XIMG is not set
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# CONFIG_CMD_EDITENV is not set
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CONFIG_CMD_MEMTEST=y
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CONFIG_SYS_MEMTEST_START=0x80000000
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CONFIG_SYS_MEMTEST_END=0xff000000
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CONFIG_CMD_ARMFLASH=y
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CONFIG_CMD_GPT=y
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# CONFIG_RANDOM_UUID is not set
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# CONFIG_CMD_LOADS is not set
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CONFIG_CMD_MMC=y
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# CONFIG_CMD_ITEST is not set
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_CACHE=y
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# CONFIG_CMD_MISC is not set
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CONFIG_CMD_AVB=y
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CONFIG_CMD_UBI=y
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# CONFIG_ISO_PARTITION is not set
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CONFIG_OF_CONTROL=y
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# CONFIG_NET is not set
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CONFIG_CLK=y
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# CONFIG_MMC_WRITE is not set
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CONFIG_ARM_PL180_MMCI=y
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CONFIG_MTD=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_SYS_FLASH_PROTECTION=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_LIBAVB=y
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CONFIG_OF_LIBFDT_OVERLAY=y
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89
include/configs/total_compute.h
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89
include/configs/total_compute.h
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@ -0,0 +1,89 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Configuration for Total Compute platform. Parts were derived from other ARM
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* configurations.
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* (C) Copyright 2020 Arm Limited
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* Usama Arif <usama.arif@arm.com>
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*/
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#ifndef __TOTAL_COMPUTE_H
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#define __TOTAL_COMPUTE_H
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#define CONFIG_REMAKE_ELF
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/* Link Definitions */
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
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#define CONFIG_SYS_BOOTM_LEN (64 << 20)
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#define UART0_BASE 0x7ff80000
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20))
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/* PL011 Serial Configuration */
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#define CONFIG_PL011_CLOCK 7372800
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LOAD_ADDR 0x90000000
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/* Physical Memory Map */
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#define PHYS_SDRAM_1 0x80000000
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/* Top 48MB reserved for secure world use */
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#define DRAM_SEC_SIZE 0x03000000
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#define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_ARM_PL180_MMCI_BASE 0x001c050000
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#define CONFIG_SYS_MMC_MAX_BLK_COUNT 127
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#define CONFIG_ARM_PL180_MMCI_CLOCK_FREQ 12000000
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"bootm_size=0x20000000\0" \
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"load_addr=0xa0000000\0" \
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"kernel_addr_r=0x80080000\0" \
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"initrd_addr_r=0x88000000\0" \
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"fdt_addr_r=0x83000000\0"
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/*
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* If vbmeta partition is present, boot Android with verification using AVB.
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* Else if system partition is present (no vbmeta partition), boot Android
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* without verification (for development purposes).
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* Else boot FIT image.
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*/
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#define CONFIG_BOOTCOMMAND \
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"if part number mmc 0 vbmeta is_avb; then" \
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" echo MMC with vbmeta partition detected.;" \
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" echo starting Android Verified boot.;" \
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" avb init 0; " \
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" if avb verify; then " \
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" set bootargs $bootargs $avb_bootargs; " \
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" part start mmc 0 boot boot_start; " \
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" part size mmc 0 boot boot_size; " \
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" mmc read ${load_addr} ${boot_start} ${boot_size}; " \
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" bootm ${load_addr} ${load_addr} ${fdt_addr_r}; " \
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" else; " \
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" echo AVB verification failed.; " \
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" exit; " \
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" fi; " \
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"elif part number mmc 0 system is_non_avb_android; then " \
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" booti ${kernel_addr_r} ${initrd_addr_r} ${fdt_addr_r};" \
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"else;" \
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" echo Booting FIT image.;" \
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" bootm ${load_addr} ${load_addr} ${fdt_addr_r}; " \
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"fi;"
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
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#define CONFIG_SYS_MAXARGS 64 /* max command args */
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#define CONFIG_SYS_FLASH_BASE 0x0C000000
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/* 256 x 256KiB sectors */
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#define CONFIG_SYS_MAX_FLASH_SECT 256
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#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
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#define FLASH_MAX_SECTOR_SIZE 0x00040000
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#endif /* __TOTAL_COMPUTE_H */
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