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https://github.com/brain-hackers/u-boot-brain
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spl: fit: Move FPGA loading code to separate functions
The FPGA loading code in spl_simple_fit_read() can easily be separated from the rest of the logic. It is split into two functions instead of one because spl_fit_upload_fpga() is used in a subsequent patch. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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@ -529,6 +529,49 @@ __weak bool spl_load_simple_fit_skip_processing(void)
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return false;
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return false;
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}
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}
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static int spl_fit_upload_fpga(struct spl_fit_info *ctx, int node,
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struct spl_image_info *fpga_image)
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{
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int ret;
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debug("FPGA bitstream at: %x, size: %x\n",
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(u32)fpga_image->load_addr, fpga_image->size);
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ret = fpga_load(0, (void *)fpga_image->load_addr, fpga_image->size,
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BIT_FULL);
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if (ret) {
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printf("%s: Cannot load the image to the FPGA\n", __func__);
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return ret;
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}
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puts("FPGA image loaded from FIT\n");
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return 0;
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}
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static int spl_fit_load_fpga(struct spl_fit_info *ctx,
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struct spl_load_info *info, ulong sector)
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{
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int node, ret;
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struct spl_image_info fpga_image = {
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.load_addr = 0,
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};
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node = spl_fit_get_image_node(ctx, "fpga", 0);
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if (node < 0)
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return node;
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/* Load the image and set up the fpga_image structure */
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ret = spl_load_fit_image(info, sector, ctx, node, &fpga_image);
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if (ret) {
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printf("%s: Cannot load the FPGA: %i\n", __func__, ret);
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return ret;
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}
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return spl_fit_upload_fpga(ctx, node, &fpga_image);
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}
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static int spl_simple_fit_read(struct spl_fit_info *ctx,
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static int spl_simple_fit_read(struct spl_fit_info *ctx,
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struct spl_load_info *info, ulong sector,
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struct spl_load_info *info, ulong sector,
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const void *fit_header)
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const void *fit_header)
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@ -612,31 +655,8 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
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if (ret < 0)
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if (ret < 0)
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return ret;
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return ret;
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#ifdef CONFIG_SPL_FPGA
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if (IS_ENABLED(CONFIG_SPL_FPGA))
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node = spl_fit_get_image_node(&ctx, "fpga", 0);
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spl_fit_load_fpga(&ctx, info, sector);
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if (node >= 0) {
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/* Load the image and set up the spl_image structure */
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ret = spl_load_fit_image(info, sector, &ctx, node, spl_image);
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if (ret) {
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printf("%s: Cannot load the FPGA: %i\n", __func__, ret);
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return ret;
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}
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debug("FPGA bitstream at: %x, size: %x\n",
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(u32)spl_image->load_addr, spl_image->size);
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ret = fpga_load(0, (const void *)spl_image->load_addr,
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spl_image->size, BIT_FULL);
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if (ret) {
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printf("%s: Cannot load the image to the FPGA\n",
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__func__);
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return ret;
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}
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puts("FPGA image loaded from FIT\n");
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node = -1;
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}
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#endif
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/*
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/*
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* Find the U-Boot image using the following search order:
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* Find the U-Boot image using the following search order:
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