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x86: acpi: Add support for additional Intel tables
Apollo Lake needs to generate a few more table types used on Intel SoCs. Add support for these into the x86 ACPI code. Signed-off-by: Simon Glass <sjg@chromium.org>
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@ -98,4 +98,119 @@ int arch_write_sci_irq_select(uint scis);
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*/
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int arch_madt_sci_irq_polarity(int sci);
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/**
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* acpi_create_dmar_drhd() - Create a table for DMA remapping with the IOMMU
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*
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* See here for the specification
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* https://software.intel.com/sites/default/files/managed/c5/15/vt-directed-io-spec.pdf
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*
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* @ctx: ACPI context pointer
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* @flags: (DRHD_INCLUDE_...)
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* @segment: PCI segment asscociated with this unit
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* @bar: Base address of remapping hardware register-set for this unit
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*/
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void acpi_create_dmar_drhd(struct acpi_ctx *ctx, uint flags, uint segment,
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u64 bar);
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/**
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* acpi_create_dmar_rmrr() - Set up an RMRR
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*
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* This sets up a Reserved-Memory Region Reporting structure, used to allow
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* DMA to regions used by devices that the BIOS controls.
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*
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* @ctx: ACPI context pointer
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* @segment: PCI segment asscociated with this unit
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* @bar: Base address of mapping
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* @limit: End address of mapping
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*/
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void acpi_create_dmar_rmrr(struct acpi_ctx *ctx, uint segment, u64 bar,
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u64 limit);
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/**
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* acpi_dmar_drhd_fixup() - Set the length of an DRHD
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*
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* This sets the DRHD length field based on the current ctx->current
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*
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* @ctx: ACPI context pointer
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* @base: Address of the start of the DRHD
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*/
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void acpi_dmar_drhd_fixup(struct acpi_ctx *ctx, void *base);
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/**
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* acpi_dmar_rmrr_fixup() - Set the length of an RMRR
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*
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* This sets the RMRR length field based on the current ctx->current
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*
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* @ctx: ACPI context pointer
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* @base: Address of the start of the RMRR
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*/
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void acpi_dmar_rmrr_fixup(struct acpi_ctx *ctx, void *base);
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/**
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* acpi_create_dmar_ds_pci() - Set up a DMAR scope for a PCI device
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*
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* @ctx: ACPI context pointer
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* @bdf: PCI device to add
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* @return length of mapping in bytes
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*/
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int acpi_create_dmar_ds_pci(struct acpi_ctx *ctx, pci_dev_t bdf);
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/**
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* acpi_create_dmar_ds_pci_br() - Set up a DMAR scope for a PCI bridge
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*
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* This is used to provide a mapping for a PCI bridge
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*
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* @ctx: ACPI context pointer
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* @bdf: PCI device to add
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* @return length of mapping in bytes
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*/
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int acpi_create_dmar_ds_pci_br(struct acpi_ctx *ctx, pci_dev_t bdf);
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/**
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* acpi_create_dmar_ds_ioapic() - Set up a DMAR scope for an IOAPIC device
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*
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* @ctx: ACPI context pointer
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* @enumeration_id: Enumeration ID (typically 2)
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* @bdf: PCI device to add
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* @return length of mapping in bytes
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*/
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int acpi_create_dmar_ds_ioapic(struct acpi_ctx *ctx, uint enumeration_id,
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pci_dev_t bdf);
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/**
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* acpi_create_dmar_ds_msi_hpet() - Set up a DMAR scope for an HPET
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*
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* Sets up a scope for a High-Precision Event Timer that supports
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* Message-Signalled Interrupts
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*
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* @ctx: ACPI context pointer
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* @enumeration_id: Enumeration ID (typically 0)
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* @bdf: PCI device to add
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* @return length of mapping in bytes
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*/
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int acpi_create_dmar_ds_msi_hpet(struct acpi_ctx *ctx, uint enumeration_id,
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pci_dev_t bdf);
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/**
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* acpi_fadt_common() - Handle common parts of filling out an FADT
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*
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* This sets up the Fixed ACPI Description Table
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*
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* @fadt: Pointer to place to put FADT
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* @facs: Pointer to the FACS
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* @dsdt: Pointer to the DSDT
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*/
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void acpi_fadt_common(struct acpi_fadt *fadt, struct acpi_facs *facs,
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void *dsdt);
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/**
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* intel_acpi_fill_fadt() - Set up the contents of the FADT
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*
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* This sets up parts of the Fixed ACPI Description Table that are common to
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* Intel chips
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*
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* @fadt: Pointer to place to put FADT
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*/
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void intel_acpi_fill_fadt(struct acpi_fadt *fadt);
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#endif /* __ASM_ACPI_TABLE_H__ */
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@ -629,3 +629,114 @@ int acpi_write_dbg2_pci_uart(struct acpi_ctx *ctx, struct udevice *dev,
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return 0;
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}
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void acpi_fadt_common(struct acpi_fadt *fadt, struct acpi_facs *facs,
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void *dsdt)
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{
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struct acpi_table_header *header = &fadt->header;
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memset((void *)fadt, '\0', sizeof(struct acpi_fadt));
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acpi_fill_header(header, "FACP");
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header->length = sizeof(struct acpi_fadt);
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header->revision = 4;
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memcpy(header->oem_id, OEM_ID, 6);
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memcpy(header->oem_table_id, OEM_TABLE_ID, 8);
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memcpy(header->aslc_id, ASLC_ID, 4);
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header->aslc_revision = 1;
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fadt->firmware_ctrl = (unsigned long)facs;
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fadt->dsdt = (unsigned long)dsdt;
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fadt->x_firmware_ctl_l = (unsigned long)facs;
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fadt->x_firmware_ctl_h = 0;
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fadt->x_dsdt_l = (unsigned long)dsdt;
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fadt->x_dsdt_h = 0;
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fadt->preferred_pm_profile = ACPI_PM_MOBILE;
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/* Use ACPI 3.0 revision */
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fadt->header.revision = 4;
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}
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void acpi_create_dmar_drhd(struct acpi_ctx *ctx, uint flags, uint segment,
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u64 bar)
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{
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struct dmar_entry *drhd = ctx->current;
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memset(drhd, '\0', sizeof(*drhd));
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drhd->type = DMAR_DRHD;
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drhd->length = sizeof(*drhd); /* will be fixed up later */
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drhd->flags = flags;
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drhd->segment = segment;
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drhd->bar = bar;
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acpi_inc(ctx, drhd->length);
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}
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void acpi_create_dmar_rmrr(struct acpi_ctx *ctx, uint segment, u64 bar,
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u64 limit)
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{
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struct dmar_rmrr_entry *rmrr = ctx->current;
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memset(rmrr, '\0', sizeof(*rmrr));
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rmrr->type = DMAR_RMRR;
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rmrr->length = sizeof(*rmrr); /* will be fixed up later */
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rmrr->segment = segment;
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rmrr->bar = bar;
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rmrr->limit = limit;
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acpi_inc(ctx, rmrr->length);
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}
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void acpi_dmar_drhd_fixup(struct acpi_ctx *ctx, void *base)
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{
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struct dmar_entry *drhd = base;
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drhd->length = ctx->current - base;
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}
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void acpi_dmar_rmrr_fixup(struct acpi_ctx *ctx, void *base)
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{
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struct dmar_rmrr_entry *rmrr = base;
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rmrr->length = ctx->current - base;
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}
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static int acpi_create_dmar_ds(struct acpi_ctx *ctx, enum dev_scope_type type,
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uint enumeration_id, pci_dev_t bdf)
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{
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/* we don't support longer paths yet */
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const size_t dev_scope_length = sizeof(struct dev_scope) + 2;
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struct dev_scope *ds = ctx->current;
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memset(ds, '\0', dev_scope_length);
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ds->type = type;
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ds->length = dev_scope_length;
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ds->enumeration = enumeration_id;
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ds->start_bus = PCI_BUS(bdf);
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ds->path[0].dev = PCI_DEV(bdf);
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ds->path[0].fn = PCI_FUNC(bdf);
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return ds->length;
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}
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int acpi_create_dmar_ds_pci_br(struct acpi_ctx *ctx, pci_dev_t bdf)
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{
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return acpi_create_dmar_ds(ctx, SCOPE_PCI_SUB, 0, bdf);
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}
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int acpi_create_dmar_ds_pci(struct acpi_ctx *ctx, pci_dev_t bdf)
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{
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return acpi_create_dmar_ds(ctx, SCOPE_PCI_ENDPOINT, 0, bdf);
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}
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int acpi_create_dmar_ds_ioapic(struct acpi_ctx *ctx, uint enumeration_id,
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pci_dev_t bdf)
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{
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return acpi_create_dmar_ds(ctx, SCOPE_IOAPIC, enumeration_id, bdf);
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}
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int acpi_create_dmar_ds_msi_hpet(struct acpi_ctx *ctx, uint enumeration_id,
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pci_dev_t bdf)
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{
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return acpi_create_dmar_ds(ctx, SCOPE_MSI_HPET, enumeration_id, bdf);
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}
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@ -377,6 +377,49 @@ struct acpi_csrt_shared_info {
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u32 max_block_size;
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};
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/* Port types for ACPI _UPC object */
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enum acpi_upc_type {
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UPC_TYPE_A,
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UPC_TYPE_MINI_AB,
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UPC_TYPE_EXPRESSCARD,
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UPC_TYPE_USB3_A,
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UPC_TYPE_USB3_B,
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UPC_TYPE_USB3_MICRO_B,
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UPC_TYPE_USB3_MICRO_AB,
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UPC_TYPE_USB3_POWER_B,
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UPC_TYPE_C_USB2_ONLY,
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UPC_TYPE_C_USB2_SS_SWITCH,
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UPC_TYPE_C_USB2_SS,
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UPC_TYPE_PROPRIETARY = 0xff,
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/*
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* The following types are not directly defined in the ACPI
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* spec but are used by coreboot to identify a USB device type.
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*/
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UPC_TYPE_INTERNAL = 0xff,
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UPC_TYPE_UNUSED,
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UPC_TYPE_HUB
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};
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enum dev_scope_type {
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SCOPE_PCI_ENDPOINT = 1,
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SCOPE_PCI_SUB = 2,
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SCOPE_IOAPIC = 3,
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SCOPE_MSI_HPET = 4,
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SCOPE_ACPI_NAMESPACE_DEVICE = 5
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};
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struct __packed dev_scope {
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u8 type;
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u8 length;
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u8 reserved[2];
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u8 enumeration;
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u8 start_bus;
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struct {
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u8 dev;
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u8 fn;
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} __packed path[0];
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};
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enum dmar_type {
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DMAR_DRHD = 0,
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DMAR_RMRR = 1,
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