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x86: coral: Correct some FSP-M settings

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Some settings were modified slightly in the device-tree conversion. Return
these to their original values.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Simon Glass 2020-05-27 05:42:11 -06:00 committed by Bin Meng
parent 70c3c911cc
commit 537558b226
1 changed files with 5 additions and 0 deletions
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5
arch/x86/dts/chromebook_coral.dts
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@ -516,6 +516,11 @@
20 23 22 21 18 19 16 17
/* DQB[7:15] pins of LPDDR4 module with offset of 16 */
25 28 30 31 26 27 24 29>;
fspm,dimm0-spd-address = <0>;
fspm,dimm1-spd-address = <0>;
fspm,skip-cse-rbp = <1>;
fspm,enable-s3-heci2 = <0>;
};
&fsp_s {