armv8: layerscape: Add TFABOOT support

Adds TFABOOT support config option and add generic code to enable
execution from DDR.

Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
This commit is contained in:
Rajesh Bhagat 2018-11-05 18:01:37 +00:00 committed by York Sun
parent 9bd5fe7027
commit 535d76a121
2 changed files with 13 additions and 3 deletions

View File

@ -514,3 +514,10 @@ config HAS_FSL_XHCI_USB
help
For some SoC(such as LS1043A and LS1046A), USB and QE-HDLC multiplex use
pins, select it when the pins are assigned to USB.
config TFABOOT
bool "Support for booting from TFA"
default n
help
Enabling this will make a U-Boot binary that is capable of being
booted via TFA.

View File

@ -88,7 +88,8 @@ static struct mm_region early_map[] = {
#endif
{ CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1,
CONFIG_SYS_FSL_DRAM_SIZE1,
#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_TFABOOT) || \
(defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD))
PTE_BLOCK_MEMTYPE(MT_NORMAL) |
#else /* Start with nGnRnE and PXN and UXN to prevent speculative access */
PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_PXN | PTE_BLOCK_UXN |
@ -139,7 +140,8 @@ static struct mm_region early_map[] = {
#endif
{ CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1,
CONFIG_SYS_FSL_DRAM_SIZE1,
#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_TFABOOT) || \
(defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD))
PTE_BLOCK_MEMTYPE(MT_NORMAL) |
#else /* Start with nGnRnE and PXN and UXN to prevent speculative access */
PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_PXN | PTE_BLOCK_UXN |
@ -1236,7 +1238,8 @@ void update_early_mmu_table(void)
__weak int dram_init(void)
{
fsl_initdram();
#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
#if (!defined(CONFIG_SPL) && !defined(CONFIG_TFABOOT)) || \
defined(CONFIG_SPL_BUILD)
/* This will break-before-make MMU for DDR */
update_early_mmu_table();
#endif