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https://github.com/brain-hackers/u-boot-brain
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rockchip: clk: Add mention of four new clocks
These clocks are needed to get MMC running. We don't actually support setting them yet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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@ -925,7 +925,13 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
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case SCLK_SARADC:
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rate = rk3399_saradc_get_clk(priv->cru);
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break;
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case ACLK_VIO:
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case ACLK_HDCP:
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case ACLK_GIC_PRE:
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case PCLK_DDR:
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break;
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default:
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log_debug("Unknown clock %lu\n", clk->id);
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return -ENOENT;
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}
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@ -993,7 +999,13 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
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case SCLK_SARADC:
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ret = rk3399_saradc_set_clk(priv->cru, rate);
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break;
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case ACLK_VIO:
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case ACLK_HDCP:
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case ACLK_GIC_PRE:
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case PCLK_DDR:
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return 0;
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default:
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log_debug("Unknown clock %lu\n", clk->id);
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return -ENOENT;
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}
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