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Merge git://git.denx.de/u-boot-x86

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- Enable RTC for Intel Tangier
- Wrap the call to 8259 PIC with Kconfig options for old targets without
  8259
- Warp the call to USB init with Kconfg options for coreboot & EFI
  payload
This commit is contained in:
Tom Rini 2018-12-10 07:14:48 -05:00
commit 53287a89e9
8 changed files with 46 additions and 16 deletions
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11
arch/x86/Kconfig
View File

@ -729,13 +729,22 @@ config PCIE_ECAM_SIZE
maximum number of PCI buses as defined by the PCI specification.
config I8259_PIC
bool
bool "Enable Intel 8259 compatible interrupt controller"
default y
help
Intel 8259 ISA compatible chipset incorporates two 8259 (master and
slave) interrupt controllers. Include this to have U-Boot set up
the interrupt correctly.
config APIC
bool "Enable Intel Advanced Programmable Interrupt Controller"
default y
help
The (A)dvanced (P)rogrammable (I)nterrupt (C)ontroller is responsible
for catching interrupts and distributing them to one or more CPU
cores. In most cases there are some LAPICs (local) for each core and
one I/O APIC. This conjunction is found on most modern x86 systems.
config PINCTRL_ICH6
bool
help

2
arch/x86/cpu/Makefile
View File

@ -35,7 +35,7 @@ obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/
obj-$(CONFIG_INTEL_QUARK) += quark/
obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/
obj-$(CONFIG_INTEL_TANGIER) += tangier/
obj-y += lapic.o ioapic.o
obj-$(CONFIG_APIC) += lapic.o ioapic.o
obj-y += irq.o
ifndef CONFIG_$(SPL_)X86_64
obj-$(CONFIG_SMP) += mp_init.o

3
arch/x86/cpu/coreboot/coreboot.c
View File

@ -77,7 +77,8 @@ int last_stage_init(void)
timestamp_add_to_bootstage();
/* start usb so that usb keyboard can be used as input device */
usb_init();
if (CONFIG_IS_ENABLED(USB_KEYBOARD))
usb_init();
board_final_cleanup();

3
arch/x86/cpu/efi/payload.c
View File

@ -166,7 +166,8 @@ int reserve_arch(void)
int last_stage_init(void)
{
/* start usb so that usb keyboard can be used as input device */
usb_init();
if (CONFIG_IS_ENABLED(USB_KEYBOARD))
usb_init();
return 0;
}

2
arch/x86/cpu/i386/interrupt.c
View File

@ -264,7 +264,9 @@ int interrupt_init(void)
i8259_init();
#endif
#ifdef CONFIG_APIC
lapic_setup();
#endif
/* Initialize core interrupt and exception functionality of CPU */
cpu_init_interrupts();

13
arch/x86/include/asm/arch-tangier/acpi/platform.asl
View File

@ -21,6 +21,19 @@ Method(_WAK, 1)
Return (Package() {0, 0})
}
Scope (_SB)
{
/* Real Time Clock */
Device (RTC0)
{
Name (_HID, EisaId ("PNP0B00"))
Name (_CRS, ResourceTemplate()
{
IO(Decode16, 0x70, 0x70, 0x01, 0x08)
})
}
}
/* ACPI global NVS */
#include "global_nvs.asl"

12
arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
View File

@ -295,16 +295,16 @@ Device (PCI0)
Method (_CRS, 0, Serialized)
{
Name (RBUF, ResourceTemplate ()
Name (RBUF, ResourceTemplate()
{
UartSerialBus (0x0001C200, DataBitsEight, StopBitsOne,
UartSerialBus(0x0001C200, DataBitsEight, StopBitsOne,
0xFC, LittleEndian, ParityTypeNone, FlowControlHardware,
0x20, 0x20, "\\_SB.PCI0.HSU0", 0, ResourceConsumer, , )
GpioInt (Level, ActiveHigh, Exclusive, PullNone, 0,
GpioInt(Level, ActiveHigh, Exclusive, PullNone, 0,
"\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 185 }
GpioIo (Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly,
GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly,
"\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 184 }
GpioIo (Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly,
GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly,
"\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 71 }
})
Return (RBUF)
@ -328,7 +328,7 @@ Device (FLIS)
Name (_DDN, "Intel Merrifield Family-Level Interface Shim")
Name (RBUF, ResourceTemplate()
{
Memory32Fixed(ReadWrite, 0xFF0C0000, 0x00008000, )
Memory32Fixed(ReadWrite, 0xFF0C0000, 0x00008000)
PinGroup("spi5", ResourceProducer, ) { 90, 91, 92, 93, 94, 95, 96 }
PinGroup("uart0", ResourceProducer, ) { 115, 116, 117, 118 }
PinGroup("uart1", ResourceProducer, ) { 119, 120, 121, 122 }

16
arch/x86/lib/interrupts.c
View File

@ -64,7 +64,8 @@ void irq_install_handler(int irq, interrupt_handler_t *handler, void *arg)
irq_handlers[irq].arg = arg;
irq_handlers[irq].count = 0;
unmask_irq(irq);
if (CONFIG_IS_ENABLED(I8259_PIC))
unmask_irq(irq);
if (status)
enable_interrupts();
@ -83,7 +84,8 @@ void irq_free_handler(int irq)
status = disable_interrupts();
mask_irq(irq);
if (CONFIG_IS_ENABLED(I8259_PIC))
mask_irq(irq);
irq_handlers[irq].handler = NULL;
irq_handlers[irq].arg = NULL;
@ -104,14 +106,16 @@ void do_irq(int hw_irq)
}
if (irq_handlers[irq].handler) {
mask_irq(irq);
if (CONFIG_IS_ENABLED(I8259_PIC))
mask_irq(irq);
irq_handlers[irq].handler(irq_handlers[irq].arg);
irq_handlers[irq].count++;
unmask_irq(irq);
specific_eoi(irq);
if (CONFIG_IS_ENABLED(I8259_PIC)) {
unmask_irq(irq);
specific_eoi(irq);
}
} else {
if ((irq & 7) != 7) {
spurious_irq_cnt++;