mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-10-04 10:30:50 +09:00
Merge branch '2020-09-29-dev_xxx-print-improvement' into next
- Improve our dev_xxx(..) wrappers to be generally used and available rather than discarded at link/compile time.
This commit is contained in:
commit
527fad0b24
@ -70,7 +70,7 @@ static int syscon_probe_by_ofnode(ofnode node, struct udevice **devp)
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/* found node with "syscon" compatible, not bounded to SYSCON UCLASS */
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/* found node with "syscon" compatible, not bounded to SYSCON UCLASS */
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if (!ofnode_device_is_compatible(node, "syscon")) {
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if (!ofnode_device_is_compatible(node, "syscon")) {
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dev_dbg(dev, "invalid compatible for syscon device\n");
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log_debug("invalid compatible for syscon device\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -619,7 +619,7 @@ static int ti_sci_get_device_state(const struct ti_sci_handle *handle,
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ret = ti_sci_do_xfer(info, xfer);
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ret = ti_sci_do_xfer(info, xfer);
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if (ret) {
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if (ret) {
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dev_err(dev, "Mbox send fail %d\n", ret);
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dev_err(info->dev, "Mbox send fail %d\n", ret);
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return ret;
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return ret;
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}
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}
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@ -1591,7 +1591,7 @@ static int ti_sci_cmd_core_reboot(const struct ti_sci_handle *handle)
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ret = ti_sci_do_xfer(info, xfer);
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ret = ti_sci_do_xfer(info, xfer);
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if (ret) {
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if (ret) {
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dev_err(dev, "Mbox send fail %d\n", ret);
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dev_err(info->dev, "Mbox send fail %d\n", ret);
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return ret;
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return ret;
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}
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}
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@ -1639,7 +1639,7 @@ static int ti_sci_get_resource_range(const struct ti_sci_handle *handle,
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(u32 *)&req, sizeof(req), sizeof(*resp));
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(u32 *)&req, sizeof(req), sizeof(*resp));
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if (IS_ERR(xfer)) {
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if (IS_ERR(xfer)) {
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ret = PTR_ERR(xfer);
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ret = PTR_ERR(xfer);
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dev_err(dev, "Message alloc failed(%d)\n", ret);
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dev_err(info->dev, "Message alloc failed(%d)\n", ret);
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return ret;
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return ret;
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}
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}
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@ -1649,7 +1649,7 @@ static int ti_sci_get_resource_range(const struct ti_sci_handle *handle,
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ret = ti_sci_do_xfer(info, xfer);
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ret = ti_sci_do_xfer(info, xfer);
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if (ret) {
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if (ret) {
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dev_err(dev, "Mbox send fail %d\n", ret);
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dev_err(info->dev, "Mbox send fail %d\n", ret);
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goto fail;
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goto fail;
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}
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}
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@ -1745,7 +1745,7 @@ static int ti_sci_cmd_query_msmc(const struct ti_sci_handle *handle,
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ret = ti_sci_do_xfer(info, xfer);
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ret = ti_sci_do_xfer(info, xfer);
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if (ret) {
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if (ret) {
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dev_err(dev, "Mbox send fail %d\n", ret);
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dev_err(info->dev, "Mbox send fail %d\n", ret);
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return ret;
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return ret;
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}
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}
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@ -2229,6 +2229,14 @@ static int ti_sci_cmd_proc_shutdown_no_wait(const struct ti_sci_handle *handle,
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u8 proc_id)
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u8 proc_id)
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{
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{
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int ret;
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int ret;
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struct ti_sci_info *info;
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if (IS_ERR(handle))
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return PTR_ERR(handle);
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if (!handle)
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return -EINVAL;
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info = handle_to_ti_sci_info(handle);
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/*
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/*
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* Send the core boot status wait message waiting for either WFE or
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* Send the core boot status wait message waiting for either WFE or
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@ -2554,7 +2562,8 @@ static int ti_sci_cmd_rm_udmap_rx_flow_cfg(
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(u32 *)&req, sizeof(req), sizeof(*resp));
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(u32 *)&req, sizeof(req), sizeof(*resp));
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if (IS_ERR(xfer)) {
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if (IS_ERR(xfer)) {
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ret = PTR_ERR(xfer);
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ret = PTR_ERR(xfer);
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dev_err(dev, "RX_FL_CFG: Message alloc failed(%d)\n", ret);
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dev_err(info->dev, "RX_FL_CFG: Message alloc failed(%d)\n",
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ret);
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return ret;
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return ret;
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}
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}
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@ -2583,7 +2592,7 @@ static int ti_sci_cmd_rm_udmap_rx_flow_cfg(
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ret = ti_sci_do_xfer(info, xfer);
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ret = ti_sci_do_xfer(info, xfer);
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if (ret) {
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if (ret) {
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dev_err(dev, "RX_FL_CFG: Mbox send fail %d\n", ret);
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dev_err(info->dev, "RX_FL_CFG: Mbox send fail %d\n", ret);
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goto fail;
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goto fail;
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}
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}
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@ -941,7 +941,8 @@ static int mxc_i2c_probe(struct udevice *bus)
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*/
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*/
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ret = fdt_stringlist_search(fdt, node, "pinctrl-names", "gpio");
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ret = fdt_stringlist_search(fdt, node, "pinctrl-names", "gpio");
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if (ret < 0) {
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if (ret < 0) {
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debug("i2c bus %d at 0x%2lx, no gpio pinctrl state.\n", bus->seq, i2c_bus->base);
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debug("i2c bus %d at 0x%2lx, no gpio pinctrl state.\n",
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bus->seq, i2c_bus->base);
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} else {
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} else {
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ret = gpio_request_by_name_nodev(offset_to_ofnode(node),
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ret = gpio_request_by_name_nodev(offset_to_ofnode(node),
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"scl-gpios", 0, &i2c_bus->scl_gpio,
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"scl-gpios", 0, &i2c_bus->scl_gpio,
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@ -952,7 +953,9 @@ static int mxc_i2c_probe(struct udevice *bus)
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if (!dm_gpio_is_valid(&i2c_bus->sda_gpio) ||
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if (!dm_gpio_is_valid(&i2c_bus->sda_gpio) ||
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!dm_gpio_is_valid(&i2c_bus->scl_gpio) ||
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!dm_gpio_is_valid(&i2c_bus->scl_gpio) ||
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ret || ret2) {
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ret || ret2) {
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dev_err(dev, "i2c bus %d at %lu, fail to request scl/sda gpio\n", bus->seq, i2c_bus->base);
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dev_err(bus,
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"i2c bus %d at %lu, fail to request scl/sda gpio\n",
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bus->seq, i2c_bus->base);
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return -EINVAL;
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return -EINVAL;
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}
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}
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}
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}
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@ -212,14 +212,16 @@ static int k3_sec_proxy_send(struct mbox_chan *chan, const void *data)
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ret = k3_sec_proxy_verify_thread(spt, THREAD_IS_TX);
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ret = k3_sec_proxy_verify_thread(spt, THREAD_IS_TX);
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if (ret) {
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if (ret) {
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dev_err(dev, "%s: Thread%d verification failed. ret = %d\n",
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dev_err(chan->dev,
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"%s: Thread%d verification failed. ret = %d\n",
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__func__, spt->id, ret);
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__func__, spt->id, ret);
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return ret;
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return ret;
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}
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}
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/* Check the message size. */
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/* Check the message size. */
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if (msg->len > spm->desc->max_msg_size) {
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if (msg->len > spm->desc->max_msg_size) {
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printf("%s: Thread %ld message length %zu > max msg size %d\n",
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dev_err(chan->dev,
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"%s: Thread %ld message length %zu > max msg size %d\n",
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__func__, chan->id, msg->len, spm->desc->max_msg_size);
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__func__, chan->id, msg->len, spm->desc->max_msg_size);
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -185,22 +185,22 @@ struct bcm2835_host {
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static void bcm2835_dumpregs(struct bcm2835_host *host)
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static void bcm2835_dumpregs(struct bcm2835_host *host)
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{
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{
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dev_dbg(dev, "=========== REGISTER DUMP ===========\n");
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dev_dbg(host->dev, "=========== REGISTER DUMP ===========\n");
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dev_dbg(dev, "SDCMD 0x%08x\n", readl(host->ioaddr + SDCMD));
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dev_dbg(host->dev, "SDCMD 0x%08x\n", readl(host->ioaddr + SDCMD));
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dev_dbg(dev, "SDARG 0x%08x\n", readl(host->ioaddr + SDARG));
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dev_dbg(host->dev, "SDARG 0x%08x\n", readl(host->ioaddr + SDARG));
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dev_dbg(dev, "SDTOUT 0x%08x\n", readl(host->ioaddr + SDTOUT));
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dev_dbg(host->dev, "SDTOUT 0x%08x\n", readl(host->ioaddr + SDTOUT));
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dev_dbg(dev, "SDCDIV 0x%08x\n", readl(host->ioaddr + SDCDIV));
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dev_dbg(host->dev, "SDCDIV 0x%08x\n", readl(host->ioaddr + SDCDIV));
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dev_dbg(dev, "SDRSP0 0x%08x\n", readl(host->ioaddr + SDRSP0));
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dev_dbg(host->dev, "SDRSP0 0x%08x\n", readl(host->ioaddr + SDRSP0));
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dev_dbg(dev, "SDRSP1 0x%08x\n", readl(host->ioaddr + SDRSP1));
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dev_dbg(host->dev, "SDRSP1 0x%08x\n", readl(host->ioaddr + SDRSP1));
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dev_dbg(dev, "SDRSP2 0x%08x\n", readl(host->ioaddr + SDRSP2));
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dev_dbg(host->dev, "SDRSP2 0x%08x\n", readl(host->ioaddr + SDRSP2));
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dev_dbg(dev, "SDRSP3 0x%08x\n", readl(host->ioaddr + SDRSP3));
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dev_dbg(host->dev, "SDRSP3 0x%08x\n", readl(host->ioaddr + SDRSP3));
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dev_dbg(dev, "SDHSTS 0x%08x\n", readl(host->ioaddr + SDHSTS));
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dev_dbg(host->dev, "SDHSTS 0x%08x\n", readl(host->ioaddr + SDHSTS));
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dev_dbg(dev, "SDVDD 0x%08x\n", readl(host->ioaddr + SDVDD));
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dev_dbg(host->dev, "SDVDD 0x%08x\n", readl(host->ioaddr + SDVDD));
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dev_dbg(dev, "SDEDM 0x%08x\n", readl(host->ioaddr + SDEDM));
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dev_dbg(host->dev, "SDEDM 0x%08x\n", readl(host->ioaddr + SDEDM));
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dev_dbg(dev, "SDHCFG 0x%08x\n", readl(host->ioaddr + SDHCFG));
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dev_dbg(host->dev, "SDHCFG 0x%08x\n", readl(host->ioaddr + SDHCFG));
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dev_dbg(dev, "SDHBCT 0x%08x\n", readl(host->ioaddr + SDHBCT));
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dev_dbg(host->dev, "SDHBCT 0x%08x\n", readl(host->ioaddr + SDHBCT));
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dev_dbg(dev, "SDHBLC 0x%08x\n", readl(host->ioaddr + SDHBLC));
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dev_dbg(host->dev, "SDHBLC 0x%08x\n", readl(host->ioaddr + SDHBLC));
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dev_dbg(dev, "===========================================\n");
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dev_dbg(host->dev, "===========================================\n");
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}
|
}
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|
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static void bcm2835_reset_internal(struct bcm2835_host *host)
|
static void bcm2835_reset_internal(struct bcm2835_host *host)
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@ -738,7 +738,7 @@ static void bcm2835_add_host(struct bcm2835_host *host)
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cfg->f_min = host->max_clk / SDCDIV_MAX_CDIV;
|
cfg->f_min = host->max_clk / SDCDIV_MAX_CDIV;
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cfg->b_max = 65535;
|
cfg->b_max = 65535;
|
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|
|
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dev_dbg(dev, "f_max %d, f_min %d\n",
|
dev_dbg(host->dev, "f_max %d, f_min %d\n",
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cfg->f_max, cfg->f_min);
|
cfg->f_max, cfg->f_min);
|
||||||
|
|
||||||
/* host controller capabilities */
|
/* host controller capabilities */
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||||||
|
@ -774,7 +774,8 @@ static void msdc_set_buswidth(struct msdc_host *host, u32 width)
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|||||||
writel(val, &host->base->sdc_cfg);
|
writel(val, &host->base->sdc_cfg);
|
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}
|
}
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||||||
|
|
||||||
static void msdc_set_mclk(struct msdc_host *host, enum bus_mode timing, u32 hz)
|
static void msdc_set_mclk(struct udevice *dev,
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||||||
|
struct msdc_host *host, enum bus_mode timing, u32 hz)
|
||||||
{
|
{
|
||||||
u32 mode;
|
u32 mode;
|
||||||
u32 div;
|
u32 div;
|
||||||
@ -897,7 +898,7 @@ static int msdc_ops_set_ios(struct udevice *dev)
|
|||||||
clock = mmc->cfg->f_min;
|
clock = mmc->cfg->f_min;
|
||||||
|
|
||||||
if (host->mclk != clock || host->timing != mmc->selected_mode)
|
if (host->mclk != clock || host->timing != mmc->selected_mode)
|
||||||
msdc_set_mclk(host, mmc->selected_mode, clock);
|
msdc_set_mclk(dev, host, mmc->selected_mode, clock);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
@ -957,7 +958,8 @@ static int get_delay_len(u32 delay, u32 start_bit)
|
|||||||
return PAD_DELAY_MAX - start_bit;
|
return PAD_DELAY_MAX - start_bit;
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct msdc_delay_phase get_best_delay(struct msdc_host *host, u32 delay)
|
static struct msdc_delay_phase get_best_delay(struct udevice *dev,
|
||||||
|
struct msdc_host *host, u32 delay)
|
||||||
{
|
{
|
||||||
int start = 0, len = 0;
|
int start = 0, len = 0;
|
||||||
int start_final = 0, len_final = 0;
|
int start_final = 0, len_final = 0;
|
||||||
@ -1067,7 +1069,7 @@ static int hs400_tune_response(struct udevice *dev, u32 opcode)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
final_cmd_delay = get_best_delay(host, cmd_delay);
|
final_cmd_delay = get_best_delay(dev, host, cmd_delay);
|
||||||
clrsetbits_le32(tune_reg, PAD_CMD_TUNE_RX_DLY3,
|
clrsetbits_le32(tune_reg, PAD_CMD_TUNE_RX_DLY3,
|
||||||
final_cmd_delay.final_phase <<
|
final_cmd_delay.final_phase <<
|
||||||
PAD_CMD_TUNE_RX_DLY3_S);
|
PAD_CMD_TUNE_RX_DLY3_S);
|
||||||
@ -1117,7 +1119,7 @@ static int msdc_tune_response(struct udevice *dev, u32 opcode)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
final_rise_delay = get_best_delay(host, rise_delay);
|
final_rise_delay = get_best_delay(dev, host, rise_delay);
|
||||||
/* if rising edge has enough margin, do not scan falling edge */
|
/* if rising edge has enough margin, do not scan falling edge */
|
||||||
if (final_rise_delay.maxlen >= 12 ||
|
if (final_rise_delay.maxlen >= 12 ||
|
||||||
(final_rise_delay.start == 0 && final_rise_delay.maxlen >= 4))
|
(final_rise_delay.start == 0 && final_rise_delay.maxlen >= 4))
|
||||||
@ -1139,7 +1141,7 @@ static int msdc_tune_response(struct udevice *dev, u32 opcode)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
final_fall_delay = get_best_delay(host, fall_delay);
|
final_fall_delay = get_best_delay(dev, host, fall_delay);
|
||||||
|
|
||||||
skip_fall:
|
skip_fall:
|
||||||
final_maxlen = max(final_rise_delay.maxlen, final_fall_delay.maxlen);
|
final_maxlen = max(final_rise_delay.maxlen, final_fall_delay.maxlen);
|
||||||
@ -1171,7 +1173,7 @@ skip_fall:
|
|||||||
|
|
||||||
dev_err(dev, "Final internal delay: 0x%x\n", internal_delay);
|
dev_err(dev, "Final internal delay: 0x%x\n", internal_delay);
|
||||||
|
|
||||||
internal_delay_phase = get_best_delay(host, internal_delay);
|
internal_delay_phase = get_best_delay(dev, host, internal_delay);
|
||||||
clrsetbits_le32(tune_reg, MSDC_PAD_TUNE_CMDRRDLY_M,
|
clrsetbits_le32(tune_reg, MSDC_PAD_TUNE_CMDRRDLY_M,
|
||||||
internal_delay_phase.final_phase <<
|
internal_delay_phase.final_phase <<
|
||||||
MSDC_PAD_TUNE_CMDRRDLY_S);
|
MSDC_PAD_TUNE_CMDRRDLY_S);
|
||||||
@ -1214,7 +1216,7 @@ static int msdc_tune_data(struct udevice *dev, u32 opcode)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
final_rise_delay = get_best_delay(host, rise_delay);
|
final_rise_delay = get_best_delay(dev, host, rise_delay);
|
||||||
if (final_rise_delay.maxlen >= 12 ||
|
if (final_rise_delay.maxlen >= 12 ||
|
||||||
(final_rise_delay.start == 0 && final_rise_delay.maxlen >= 4))
|
(final_rise_delay.start == 0 && final_rise_delay.maxlen >= 4))
|
||||||
goto skip_fall;
|
goto skip_fall;
|
||||||
@ -1237,7 +1239,7 @@ static int msdc_tune_data(struct udevice *dev, u32 opcode)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
final_fall_delay = get_best_delay(host, fall_delay);
|
final_fall_delay = get_best_delay(dev, host, fall_delay);
|
||||||
|
|
||||||
skip_fall:
|
skip_fall:
|
||||||
final_maxlen = max(final_rise_delay.maxlen, final_fall_delay.maxlen);
|
final_maxlen = max(final_rise_delay.maxlen, final_fall_delay.maxlen);
|
||||||
@ -1293,7 +1295,7 @@ static int msdc_tune_together(struct udevice *dev, u32 opcode)
|
|||||||
rise_delay |= (1 << i);
|
rise_delay |= (1 << i);
|
||||||
}
|
}
|
||||||
|
|
||||||
final_rise_delay = get_best_delay(host, rise_delay);
|
final_rise_delay = get_best_delay(dev, host, rise_delay);
|
||||||
if (final_rise_delay.maxlen >= 12 ||
|
if (final_rise_delay.maxlen >= 12 ||
|
||||||
(final_rise_delay.start == 0 && final_rise_delay.maxlen >= 4))
|
(final_rise_delay.start == 0 && final_rise_delay.maxlen >= 4))
|
||||||
goto skip_fall;
|
goto skip_fall;
|
||||||
@ -1309,7 +1311,7 @@ static int msdc_tune_together(struct udevice *dev, u32 opcode)
|
|||||||
fall_delay |= (1 << i);
|
fall_delay |= (1 << i);
|
||||||
}
|
}
|
||||||
|
|
||||||
final_fall_delay = get_best_delay(host, fall_delay);
|
final_fall_delay = get_best_delay(dev, host, fall_delay);
|
||||||
|
|
||||||
skip_fall:
|
skip_fall:
|
||||||
final_maxlen = max(final_rise_delay.maxlen, final_fall_delay.maxlen);
|
final_maxlen = max(final_rise_delay.maxlen, final_fall_delay.maxlen);
|
||||||
|
@ -424,7 +424,8 @@ static int pmecc_err_location(struct mtd_info *mtd)
|
|||||||
}
|
}
|
||||||
|
|
||||||
if (!timeout) {
|
if (!timeout) {
|
||||||
dev_err(host->dev, "atmel_nand : Timeout to calculate PMECC error location\n");
|
dev_err(mtd->dev,
|
||||||
|
"Timeout to calculate PMECC error location\n");
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -464,7 +465,8 @@ static void pmecc_correct_data(struct mtd_info *mtd, uint8_t *buf, uint8_t *ecc,
|
|||||||
*(buf + byte_pos) ^= (1 << bit_pos);
|
*(buf + byte_pos) ^= (1 << bit_pos);
|
||||||
|
|
||||||
pos = sector_num * host->pmecc_sector_size + byte_pos;
|
pos = sector_num * host->pmecc_sector_size + byte_pos;
|
||||||
dev_dbg(host->dev, "Bit flip in data area, byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n",
|
dev_dbg(mtd->dev,
|
||||||
|
"Bit flip in data area, byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n",
|
||||||
pos, bit_pos, err_byte, *(buf + byte_pos));
|
pos, bit_pos, err_byte, *(buf + byte_pos));
|
||||||
} else {
|
} else {
|
||||||
/* Bit flip in OOB area */
|
/* Bit flip in OOB area */
|
||||||
@ -474,7 +476,8 @@ static void pmecc_correct_data(struct mtd_info *mtd, uint8_t *buf, uint8_t *ecc,
|
|||||||
ecc[tmp] ^= (1 << bit_pos);
|
ecc[tmp] ^= (1 << bit_pos);
|
||||||
|
|
||||||
pos = tmp + nand_chip->ecc.layout->eccpos[0];
|
pos = tmp + nand_chip->ecc.layout->eccpos[0];
|
||||||
dev_dbg(host->dev, "Bit flip in OOB, oob_byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n",
|
dev_dbg(mtd->dev,
|
||||||
|
"Bit flip in OOB, oob_byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n",
|
||||||
pos, bit_pos, err_byte, ecc[tmp]);
|
pos, bit_pos, err_byte, ecc[tmp]);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -516,7 +519,7 @@ normal_check:
|
|||||||
|
|
||||||
err_nbr = pmecc_err_location(mtd);
|
err_nbr = pmecc_err_location(mtd);
|
||||||
if (err_nbr == -1) {
|
if (err_nbr == -1) {
|
||||||
dev_err(host->dev, "PMECC: Too many errors\n");
|
dev_err(mtd->dev, "PMECC: Too many errors\n");
|
||||||
mtd->ecc_stats.failed++;
|
mtd->ecc_stats.failed++;
|
||||||
return -EBADMSG;
|
return -EBADMSG;
|
||||||
} else {
|
} else {
|
||||||
@ -560,7 +563,7 @@ static int atmel_nand_pmecc_read_page(struct mtd_info *mtd,
|
|||||||
}
|
}
|
||||||
|
|
||||||
if (!timeout) {
|
if (!timeout) {
|
||||||
dev_err(host->dev, "atmel_nand : Timeout to read PMECC page\n");
|
dev_err(mtd->dev, "Timeout to read PMECC page\n");
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -600,7 +603,8 @@ static int atmel_nand_pmecc_write_page(struct mtd_info *mtd,
|
|||||||
}
|
}
|
||||||
|
|
||||||
if (!timeout) {
|
if (!timeout) {
|
||||||
dev_err(host->dev, "atmel_nand : Timeout to read PMECC status, fail to write PMECC in oob\n");
|
dev_err(mtd->dev,
|
||||||
|
"Timeout to read PMECC status, fail to write PMECC in oob\n");
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -713,7 +717,8 @@ static int pmecc_choose_ecc(struct atmel_nand_host *host,
|
|||||||
|
|
||||||
if (*cap == 0 && *sector_size == 0) {
|
if (*cap == 0 && *sector_size == 0) {
|
||||||
/* Non-ONFI compliant */
|
/* Non-ONFI compliant */
|
||||||
dev_info(host->dev, "NAND chip is not ONFI compliant, assume ecc_bits is 2 in 512 bytes\n");
|
dev_info(chip->mtd.dev,
|
||||||
|
"NAND chip is not ONFI compliant, assume ecc_bits is 2 in 512 bytes\n");
|
||||||
*cap = 2;
|
*cap = 2;
|
||||||
*sector_size = 512;
|
*sector_size = 512;
|
||||||
}
|
}
|
||||||
@ -835,17 +840,20 @@ static int atmel_pmecc_nand_init_params(struct nand_chip *nand,
|
|||||||
* from ONFI.
|
* from ONFI.
|
||||||
*/
|
*/
|
||||||
if (pmecc_choose_ecc(host, nand, &cap, §or_size)) {
|
if (pmecc_choose_ecc(host, nand, &cap, §or_size)) {
|
||||||
dev_err(host->dev, "Required ECC %d bits in %d bytes not supported!\n",
|
dev_err(mtd->dev,
|
||||||
|
"Required ECC %d bits in %d bytes not supported!\n",
|
||||||
cap, sector_size);
|
cap, sector_size);
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (cap > host->pmecc_corr_cap)
|
if (cap > host->pmecc_corr_cap)
|
||||||
dev_info(host->dev, "WARNING: Using different ecc correct bits(%d bit) from Nand ONFI ECC reqirement (%d bit).\n",
|
dev_info(mtd->dev,
|
||||||
host->pmecc_corr_cap, cap);
|
"WARNING: Using different ecc correct bits(%d bit) from Nand ONFI ECC reqirement (%d bit).\n",
|
||||||
|
host->pmecc_corr_cap, cap);
|
||||||
if (sector_size < host->pmecc_sector_size)
|
if (sector_size < host->pmecc_sector_size)
|
||||||
dev_info(host->dev, "WARNING: Using different ecc correct sector size (%d bytes) from Nand ONFI ECC reqirement (%d bytes).\n",
|
dev_info(mtd->dev,
|
||||||
host->pmecc_sector_size, sector_size);
|
"WARNING: Using different ecc correct sector size (%d bytes) from Nand ONFI ECC reqirement (%d bytes).\n",
|
||||||
|
host->pmecc_sector_size, sector_size);
|
||||||
#else /* CONFIG_SYS_NAND_ONFI_DETECTION */
|
#else /* CONFIG_SYS_NAND_ONFI_DETECTION */
|
||||||
host->pmecc_corr_cap = CONFIG_PMECC_CAP;
|
host->pmecc_corr_cap = CONFIG_PMECC_CAP;
|
||||||
host->pmecc_sector_size = CONFIG_PMECC_SECTOR_SIZE;
|
host->pmecc_sector_size = CONFIG_PMECC_SECTOR_SIZE;
|
||||||
@ -877,7 +885,7 @@ static int atmel_pmecc_nand_init_params(struct nand_chip *nand,
|
|||||||
#if defined(NO_GALOIS_TABLE_IN_ROM)
|
#if defined(NO_GALOIS_TABLE_IN_ROM)
|
||||||
pmecc_galois_table = create_lookup_table(host->pmecc_sector_size);
|
pmecc_galois_table = create_lookup_table(host->pmecc_sector_size);
|
||||||
if (!pmecc_galois_table) {
|
if (!pmecc_galois_table) {
|
||||||
dev_err(host->dev, "out of memory\n");
|
dev_err(mtd->dev, "out of memory\n");
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -909,13 +917,14 @@ static int atmel_pmecc_nand_init_params(struct nand_chip *nand,
|
|||||||
host->pmecc_sector_number;
|
host->pmecc_sector_number;
|
||||||
|
|
||||||
if (nand->ecc.bytes > MTD_MAX_ECCPOS_ENTRIES_LARGE) {
|
if (nand->ecc.bytes > MTD_MAX_ECCPOS_ENTRIES_LARGE) {
|
||||||
dev_err(host->dev, "too large eccpos entries. max support ecc.bytes is %d\n",
|
dev_err(mtd->dev,
|
||||||
MTD_MAX_ECCPOS_ENTRIES_LARGE);
|
"too large eccpos entries. max support ecc.bytes is %d\n",
|
||||||
|
MTD_MAX_ECCPOS_ENTRIES_LARGE);
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (nand->ecc.bytes > mtd->oobsize - PMECC_OOB_RESERVED_BYTES) {
|
if (nand->ecc.bytes > mtd->oobsize - PMECC_OOB_RESERVED_BYTES) {
|
||||||
dev_err(host->dev, "No room for ECC bytes\n");
|
dev_err(mtd->dev, "No room for ECC bytes\n");
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
pmecc_config_ecc_layout(&atmel_pmecc_oobinfo,
|
pmecc_config_ecc_layout(&atmel_pmecc_oobinfo,
|
||||||
@ -926,7 +935,8 @@ static int atmel_pmecc_nand_init_params(struct nand_chip *nand,
|
|||||||
case 512:
|
case 512:
|
||||||
case 1024:
|
case 1024:
|
||||||
/* TODO */
|
/* TODO */
|
||||||
dev_err(host->dev, "Unsupported page size for PMECC, use Software ECC\n");
|
dev_err(mtd->dev,
|
||||||
|
"Unsupported page size for PMECC, use Software ECC\n");
|
||||||
default:
|
default:
|
||||||
/* page size not handled by HW ECC */
|
/* page size not handled by HW ECC */
|
||||||
/* switching back to soft ECC */
|
/* switching back to soft ECC */
|
||||||
@ -940,7 +950,8 @@ static int atmel_pmecc_nand_init_params(struct nand_chip *nand,
|
|||||||
|
|
||||||
/* Allocate data for PMECC computation */
|
/* Allocate data for PMECC computation */
|
||||||
if (pmecc_data_alloc(host)) {
|
if (pmecc_data_alloc(host)) {
|
||||||
dev_err(host->dev, "Cannot allocate memory for PMECC computation!\n");
|
dev_err(mtd->dev,
|
||||||
|
"Cannot allocate memory for PMECC computation!\n");
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -951,7 +962,7 @@ static int atmel_pmecc_nand_init_params(struct nand_chip *nand,
|
|||||||
|
|
||||||
/* Check the PMECC ip version */
|
/* Check the PMECC ip version */
|
||||||
host->pmecc_version = pmecc_readl(host->pmerrloc, version);
|
host->pmecc_version = pmecc_readl(host->pmerrloc, version);
|
||||||
dev_dbg(host->dev, "PMECC IP version is: %x\n", host->pmecc_version);
|
dev_dbg(mtd->dev, "PMECC IP version is: %x\n", host->pmecc_version);
|
||||||
|
|
||||||
atmel_pmecc_core_init(mtd);
|
atmel_pmecc_core_init(mtd);
|
||||||
|
|
||||||
@ -1114,8 +1125,8 @@ static int atmel_nand_correct(struct mtd_info *mtd, u_char *dat,
|
|||||||
/* it doesn't seems to be a freshly
|
/* it doesn't seems to be a freshly
|
||||||
* erased block.
|
* erased block.
|
||||||
* We can't correct so many errors */
|
* We can't correct so many errors */
|
||||||
dev_warn(host->dev, "atmel_nand : multiple errors detected."
|
dev_warn(mtd->dev,
|
||||||
" Unable to correct.\n");
|
"multiple errors detected. Unable to correct.\n");
|
||||||
return -EBADMSG;
|
return -EBADMSG;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1124,15 +1135,14 @@ static int atmel_nand_correct(struct mtd_info *mtd, u_char *dat,
|
|||||||
/* there's nothing much to do here.
|
/* there's nothing much to do here.
|
||||||
* the bit error is on the ECC itself.
|
* the bit error is on the ECC itself.
|
||||||
*/
|
*/
|
||||||
dev_warn(host->dev, "atmel_nand : one bit error on ECC code."
|
dev_warn(mtd->dev,
|
||||||
" Nothing to correct\n");
|
"one bit error on ECC code. Nothing to correct\n");
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
dev_warn(host->dev, "atmel_nand : one bit error on data."
|
dev_warn(mtd->dev,
|
||||||
" (word offset in the page :"
|
"one bit error on data. (word offset in the page : 0x%x bit offset : 0x%x)\n",
|
||||||
" 0x%x bit offset : 0x%x)\n",
|
ecc_word, ecc_bit);
|
||||||
ecc_word, ecc_bit);
|
|
||||||
/* correct the error */
|
/* correct the error */
|
||||||
if (nand_chip->options & NAND_BUSWIDTH_16) {
|
if (nand_chip->options & NAND_BUSWIDTH_16) {
|
||||||
/* 16 bits words */
|
/* 16 bits words */
|
||||||
@ -1141,7 +1151,7 @@ static int atmel_nand_correct(struct mtd_info *mtd, u_char *dat,
|
|||||||
/* 8 bits words */
|
/* 8 bits words */
|
||||||
dat[ecc_word] ^= (1 << ecc_bit);
|
dat[ecc_word] ^= (1 << ecc_bit);
|
||||||
}
|
}
|
||||||
dev_warn(host->dev, "atmel_nand : error corrected\n");
|
dev_warn(mtd->dev, "error corrected\n");
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1511,7 +1521,6 @@ void board_nand_init(void)
|
|||||||
int i;
|
int i;
|
||||||
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
|
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
|
||||||
if (atmel_nand_chip_init(i, base_addr[i]))
|
if (atmel_nand_chip_init(i, base_addr[i]))
|
||||||
dev_err(host->dev, "atmel_nand: Fail to initialize #%d chip",
|
log_err("atmel_nand: Fail to initialize #%d chip", i);
|
||||||
i);
|
|
||||||
}
|
}
|
||||||
#endif /* CONFIG_SPL_BUILD */
|
#endif /* CONFIG_SPL_BUILD */
|
||||||
|
@ -956,7 +956,7 @@ static struct nand_ecclayout *brcmnand_create_layout(int ecc_level,
|
|||||||
*/
|
*/
|
||||||
req = DIV_ROUND_UP(ecc_level * 14, 8);
|
req = DIV_ROUND_UP(ecc_level * 14, 8);
|
||||||
if (req >= sas) {
|
if (req >= sas) {
|
||||||
dev_err(&host->pdev->dev,
|
dev_err(host->pdev,
|
||||||
"error: ECC too large for OOB (ECC bytes %d, spare sector %d)\n",
|
"error: ECC too large for OOB (ECC bytes %d, spare sector %d)\n",
|
||||||
req, sas);
|
req, sas);
|
||||||
return NULL;
|
return NULL;
|
||||||
@ -1012,8 +1012,8 @@ static struct nand_ecclayout *brcmstb_choose_ecc_layout(
|
|||||||
|
|
||||||
layout = brcmnand_create_layout(ecc_level, host);
|
layout = brcmnand_create_layout(ecc_level, host);
|
||||||
if (!layout) {
|
if (!layout) {
|
||||||
dev_err(&host->pdev->dev,
|
dev_err(host->pdev,
|
||||||
"no proper ecc_layout for this NAND cfg\n");
|
"no proper ecc_layout for this NAND cfg\n");
|
||||||
return NULL;
|
return NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1056,17 +1056,9 @@ static void brcmnand_wp(struct mtd_info *mtd, int wp)
|
|||||||
NAND_CTRL_RDY |
|
NAND_CTRL_RDY |
|
||||||
NAND_STATUS_READY |
|
NAND_STATUS_READY |
|
||||||
(wp ? 0 : NAND_STATUS_WP), 0);
|
(wp ? 0 : NAND_STATUS_WP), 0);
|
||||||
#ifndef __UBOOT__
|
|
||||||
if (ret)
|
if (ret)
|
||||||
dev_err_ratelimited(&host->pdev->dev,
|
dev_err(host->pdev, "nand #WP expected %s\n",
|
||||||
"nand #WP expected %s\n",
|
wp ? "on" : "off");
|
||||||
wp ? "on" : "off");
|
|
||||||
#else
|
|
||||||
if (ret)
|
|
||||||
dev_err(&host->pdev->dev,
|
|
||||||
"nand #WP expected %s\n",
|
|
||||||
wp ? "on" : "off");
|
|
||||||
#endif /* __UBOOT__ */
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -2257,7 +2249,7 @@ static int brcmnand_init_cs(struct brcmnand_host *host, ofnode dn)
|
|||||||
ret = ofnode_read_s32(dn, "reg", &host->cs);
|
ret = ofnode_read_s32(dn, "reg", &host->cs);
|
||||||
#endif
|
#endif
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(&pdev->dev, "can't get chip-select\n");
|
dev_err(pdev, "can't get chip-select\n");
|
||||||
return -ENXIO;
|
return -ENXIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -512,7 +512,7 @@ static int pxa3xx_nand_init_timings(struct pxa3xx_nand_host *host)
|
|||||||
}
|
}
|
||||||
|
|
||||||
if (i == ntypes) {
|
if (i == ntypes) {
|
||||||
dev_err(&info->pdev->dev, "Error: timings not found\n");
|
dev_err(mtd->dev, "Error: timings not found\n");
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -603,7 +603,7 @@ static void drain_fifo(struct pxa3xx_nand_info *info, void *data, int len)
|
|||||||
ts = get_timer(0);
|
ts = get_timer(0);
|
||||||
while (!(nand_readl(info, NDSR) & NDSR_RDDREQ)) {
|
while (!(nand_readl(info, NDSR) & NDSR_RDDREQ)) {
|
||||||
if (get_timer(ts) > TIMEOUT_DRAIN_FIFO) {
|
if (get_timer(ts) > TIMEOUT_DRAIN_FIFO) {
|
||||||
dev_err(&info->pdev->dev,
|
dev_err(info->controller.active->mtd.dev,
|
||||||
"Timeout on RDDREQ while draining the FIFO\n");
|
"Timeout on RDDREQ while draining the FIFO\n");
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
@ -656,8 +656,8 @@ static void handle_data_pio(struct pxa3xx_nand_info *info)
|
|||||||
DIV_ROUND_UP(info->step_spare_size, 4));
|
DIV_ROUND_UP(info->step_spare_size, 4));
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
dev_err(&info->pdev->dev, "%s: invalid state %d\n", __func__,
|
dev_err(info->controller.active->mtd.dev,
|
||||||
info->state);
|
"%s: invalid state %d\n", __func__, info->state);
|
||||||
BUG();
|
BUG();
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1027,7 +1027,7 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
|
|||||||
|
|
||||||
default:
|
default:
|
||||||
exec_cmd = 0;
|
exec_cmd = 0;
|
||||||
dev_err(&info->pdev->dev, "non-supported command %x\n",
|
dev_err(mtd->dev, "non-supported command %x\n",
|
||||||
command);
|
command);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
@ -1087,7 +1087,7 @@ static void nand_cmdfunc(struct mtd_info *mtd, unsigned command,
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
if (get_timer(ts) > CHIP_DELAY_TIMEOUT) {
|
if (get_timer(ts) > CHIP_DELAY_TIMEOUT) {
|
||||||
dev_err(&info->pdev->dev, "Wait timeout!!!\n");
|
dev_err(mtd->dev, "Wait timeout!!!\n");
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -1180,7 +1180,7 @@ static void nand_cmdfunc_extended(struct mtd_info *mtd,
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
if (get_timer(ts) > CHIP_DELAY_TIMEOUT) {
|
if (get_timer(ts) > CHIP_DELAY_TIMEOUT) {
|
||||||
dev_err(&info->pdev->dev, "Wait timeout!!!\n");
|
dev_err(mtd->dev, "Wait timeout!!!\n");
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -1426,7 +1426,7 @@ static int pxa3xx_nand_waitfunc(struct mtd_info *mtd, struct nand_chip *this)
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
if (get_timer(ts) > CHIP_DELAY_TIMEOUT) {
|
if (get_timer(ts) > CHIP_DELAY_TIMEOUT) {
|
||||||
dev_err(&info->pdev->dev, "Ready timeout!!!\n");
|
dev_err(mtd->dev, "Ready timeout!!!\n");
|
||||||
return NAND_STATUS_FAIL;
|
return NAND_STATUS_FAIL;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -1633,7 +1633,7 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
|
|||||||
ecc->strength = 16;
|
ecc->strength = 16;
|
||||||
|
|
||||||
} else {
|
} else {
|
||||||
dev_err(&info->pdev->dev,
|
dev_err(info->controller.active->mtd.dev,
|
||||||
"ECC strength %d at page size %d is not supported\n",
|
"ECC strength %d at page size %d is not supported\n",
|
||||||
strength, page_size);
|
strength, page_size);
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
@ -1659,8 +1659,7 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
|
|||||||
return ret;
|
return ret;
|
||||||
ret = pxa3xx_nand_sensing(host);
|
ret = pxa3xx_nand_sensing(host);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_info(&info->pdev->dev,
|
dev_info(mtd->dev, "There is no chip on cs %d!\n",
|
||||||
"There is no chip on cs %d!\n",
|
|
||||||
info->cs);
|
info->cs);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
@ -1676,7 +1675,7 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
|
|||||||
if (!pdata->keep_config) {
|
if (!pdata->keep_config) {
|
||||||
ret = pxa3xx_nand_init_timings(host);
|
ret = pxa3xx_nand_init_timings(host);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(&info->pdev->dev,
|
dev_err(mtd->dev,
|
||||||
"Failed to set timings: %d\n", ret);
|
"Failed to set timings: %d\n", ret);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
@ -1720,7 +1719,7 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
|
|||||||
if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370) {
|
if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370) {
|
||||||
chip->cmdfunc = nand_cmdfunc_extended;
|
chip->cmdfunc = nand_cmdfunc_extended;
|
||||||
} else {
|
} else {
|
||||||
dev_err(&info->pdev->dev,
|
dev_err(mtd->dev,
|
||||||
"unsupported page size on this variant\n");
|
"unsupported page size on this variant\n");
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
}
|
}
|
||||||
@ -1873,6 +1872,7 @@ static int pxa3xx_nand_probe_dt(struct pxa3xx_nand_info *info)
|
|||||||
|
|
||||||
static int pxa3xx_nand_probe(struct pxa3xx_nand_info *info)
|
static int pxa3xx_nand_probe(struct pxa3xx_nand_info *info)
|
||||||
{
|
{
|
||||||
|
struct mtd_info *mtd = &info->controller.active->mtd;
|
||||||
struct pxa3xx_nand_platform_data *pdata;
|
struct pxa3xx_nand_platform_data *pdata;
|
||||||
int ret, cs, probe_success;
|
int ret, cs, probe_success;
|
||||||
|
|
||||||
@ -1884,7 +1884,7 @@ static int pxa3xx_nand_probe(struct pxa3xx_nand_info *info)
|
|||||||
|
|
||||||
ret = alloc_nand_resource(info);
|
ret = alloc_nand_resource(info);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(&pdev->dev, "alloc nand resource failed\n");
|
dev_err(mtd->dev, "alloc nand resource failed\n");
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1901,7 +1901,7 @@ static int pxa3xx_nand_probe(struct pxa3xx_nand_info *info)
|
|||||||
info->cs = cs;
|
info->cs = cs;
|
||||||
ret = pxa3xx_nand_scan(mtd);
|
ret = pxa3xx_nand_scan(mtd);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_info(&pdev->dev, "failed to scan nand at cs %d\n",
|
dev_info(mtd->dev, "failed to scan nand at cs %d\n",
|
||||||
cs);
|
cs);
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
@ -1226,7 +1226,8 @@ static int _sunxi_nand_lookup_timing(const s32 *lut, int lut_size, u32 duration,
|
|||||||
#define sunxi_nand_lookup_timing(l, p, c) \
|
#define sunxi_nand_lookup_timing(l, p, c) \
|
||||||
_sunxi_nand_lookup_timing(l, ARRAY_SIZE(l), p, c)
|
_sunxi_nand_lookup_timing(l, ARRAY_SIZE(l), p, c)
|
||||||
|
|
||||||
static int sunxi_nand_chip_set_timings(struct sunxi_nand_chip *chip,
|
static int sunxi_nand_chip_set_timings(struct sunxi_nfc *nfc,
|
||||||
|
struct sunxi_nand_chip *chip,
|
||||||
const struct nand_sdr_timings *timings)
|
const struct nand_sdr_timings *timings)
|
||||||
{
|
{
|
||||||
u32 min_clk_period = 0;
|
u32 min_clk_period = 0;
|
||||||
@ -1349,7 +1350,8 @@ static int sunxi_nand_chip_set_timings(struct sunxi_nand_chip *chip,
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int sunxi_nand_chip_init_timings(struct sunxi_nand_chip *chip)
|
static int sunxi_nand_chip_init_timings(struct sunxi_nfc *nfc,
|
||||||
|
struct sunxi_nand_chip *chip)
|
||||||
{
|
{
|
||||||
struct mtd_info *mtd = nand_to_mtd(&chip->nand);
|
struct mtd_info *mtd = nand_to_mtd(&chip->nand);
|
||||||
const struct nand_sdr_timings *timings;
|
const struct nand_sdr_timings *timings;
|
||||||
@ -1384,7 +1386,7 @@ static int sunxi_nand_chip_init_timings(struct sunxi_nand_chip *chip)
|
|||||||
if (IS_ERR(timings))
|
if (IS_ERR(timings))
|
||||||
return PTR_ERR(timings);
|
return PTR_ERR(timings);
|
||||||
|
|
||||||
return sunxi_nand_chip_set_timings(chip, timings);
|
return sunxi_nand_chip_set_timings(nfc, chip, timings);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int sunxi_nand_hw_common_ecc_ctrl_init(struct mtd_info *mtd,
|
static int sunxi_nand_hw_common_ecc_ctrl_init(struct mtd_info *mtd,
|
||||||
@ -1423,7 +1425,7 @@ static int sunxi_nand_hw_common_ecc_ctrl_init(struct mtd_info *mtd,
|
|||||||
}
|
}
|
||||||
|
|
||||||
if (i >= ARRAY_SIZE(strengths)) {
|
if (i >= ARRAY_SIZE(strengths)) {
|
||||||
dev_err(nfc->dev, "unsupported strength\n");
|
dev_err(mtd->dev, "unsupported strength\n");
|
||||||
ret = -ENOTSUPP;
|
ret = -ENOTSUPP;
|
||||||
goto err;
|
goto err;
|
||||||
}
|
}
|
||||||
@ -1619,7 +1621,7 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum)
|
|||||||
|
|
||||||
nsels /= sizeof(u32);
|
nsels /= sizeof(u32);
|
||||||
if (!nsels || nsels > 8) {
|
if (!nsels || nsels > 8) {
|
||||||
dev_err(dev, "invalid reg property size\n");
|
dev_err(nfc->dev, "invalid reg property size\n");
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1627,7 +1629,7 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum)
|
|||||||
(nsels * sizeof(struct sunxi_nand_chip_sel)),
|
(nsels * sizeof(struct sunxi_nand_chip_sel)),
|
||||||
GFP_KERNEL);
|
GFP_KERNEL);
|
||||||
if (!chip) {
|
if (!chip) {
|
||||||
dev_err(dev, "could not allocate chip\n");
|
dev_err(nfc->dev, "could not allocate chip\n");
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1641,14 +1643,14 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum)
|
|||||||
|
|
||||||
ret = fdtdec_get_int_array(gd->fdt_blob, node, "reg", cs, nsels);
|
ret = fdtdec_get_int_array(gd->fdt_blob, node, "reg", cs, nsels);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "could not retrieve reg property: %d\n", ret);
|
dev_err(nfc->dev, "could not retrieve reg property: %d\n", ret);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = fdtdec_get_int_array(gd->fdt_blob, node, "allwinner,rb", rb,
|
ret = fdtdec_get_int_array(gd->fdt_blob, node, "allwinner,rb", rb,
|
||||||
nsels);
|
nsels);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "could not retrieve reg property: %d\n", ret);
|
dev_err(nfc->dev, "could not retrieve reg property: %d\n", ret);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1656,14 +1658,13 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum)
|
|||||||
int tmp = cs[i];
|
int tmp = cs[i];
|
||||||
|
|
||||||
if (tmp > NFC_MAX_CS) {
|
if (tmp > NFC_MAX_CS) {
|
||||||
dev_err(dev,
|
dev_err(nfc->dev,
|
||||||
"invalid reg value: %u (max CS = 7)\n",
|
"invalid reg value: %u (max CS = 7)\n", tmp);
|
||||||
tmp);
|
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (test_and_set_bit(tmp, &nfc->assigned_cs)) {
|
if (test_and_set_bit(tmp, &nfc->assigned_cs)) {
|
||||||
dev_err(dev, "CS %d already assigned\n", tmp);
|
dev_err(nfc->dev, "CS %d already assigned\n", tmp);
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1688,15 +1689,15 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum)
|
|||||||
timings = onfi_async_timing_mode_to_sdr_timings(0);
|
timings = onfi_async_timing_mode_to_sdr_timings(0);
|
||||||
if (IS_ERR(timings)) {
|
if (IS_ERR(timings)) {
|
||||||
ret = PTR_ERR(timings);
|
ret = PTR_ERR(timings);
|
||||||
dev_err(dev,
|
dev_err(nfc->dev,
|
||||||
"could not retrieve timings for ONFI mode 0: %d\n",
|
"could not retrieve timings for ONFI mode 0: %d\n",
|
||||||
ret);
|
ret);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = sunxi_nand_chip_set_timings(chip, timings);
|
ret = sunxi_nand_chip_set_timings(nfc, chip, timings);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "could not configure chip timings: %d\n", ret);
|
dev_err(nfc->dev, "could not configure chip timings: %d\n", ret);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1729,27 +1730,27 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum)
|
|||||||
|
|
||||||
nand->options |= NAND_SUBPAGE_READ;
|
nand->options |= NAND_SUBPAGE_READ;
|
||||||
|
|
||||||
ret = sunxi_nand_chip_init_timings(chip);
|
ret = sunxi_nand_chip_init_timings(nfc, chip);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "could not configure chip timings: %d\n", ret);
|
dev_err(nfc->dev, "could not configure chip timings: %d\n", ret);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = sunxi_nand_ecc_init(mtd, &nand->ecc);
|
ret = sunxi_nand_ecc_init(mtd, &nand->ecc);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "ECC init failed: %d\n", ret);
|
dev_err(nfc->dev, "ECC init failed: %d\n", ret);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = nand_scan_tail(mtd);
|
ret = nand_scan_tail(mtd);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "nand_scan_tail failed: %d\n", ret);
|
dev_err(nfc->dev, "nand_scan_tail failed: %d\n", ret);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = nand_register(devnum, mtd);
|
ret = nand_register(devnum, mtd);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to register mtd device: %d\n", ret);
|
dev_err(nfc->dev, "failed to register mtd device: %d\n", ret);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1769,7 +1770,7 @@ static int sunxi_nand_chips_init(int node, struct sunxi_nfc *nfc)
|
|||||||
i++;
|
i++;
|
||||||
|
|
||||||
if (i > 8) {
|
if (i > 8) {
|
||||||
dev_err(dev, "too many NAND chips: %d (max = 8)\n", i);
|
dev_err(nfc->dev, "too many NAND chips: %d (max = 8)\n", i);
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1841,7 +1842,7 @@ void sunxi_nand_init(void)
|
|||||||
|
|
||||||
ret = sunxi_nand_chips_init(node, nfc);
|
ret = sunxi_nand_chips_init(node, nfc);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to init nand chips\n");
|
dev_err(nfc->dev, "failed to init nand chips\n");
|
||||||
goto err;
|
goto err;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -152,6 +152,8 @@ enum vf610_nfc_alt_buf {
|
|||||||
|
|
||||||
struct vf610_nfc {
|
struct vf610_nfc {
|
||||||
struct nand_chip chip;
|
struct nand_chip chip;
|
||||||
|
/* NULL without CONFIG_NAND_VF610_NFC_DT */
|
||||||
|
struct udevice *dev;
|
||||||
void __iomem *regs;
|
void __iomem *regs;
|
||||||
uint buf_offset;
|
uint buf_offset;
|
||||||
int write_sz;
|
int write_sz;
|
||||||
@ -631,11 +633,10 @@ struct vf610_nfc_config {
|
|||||||
int flash_bbt;
|
int flash_bbt;
|
||||||
};
|
};
|
||||||
|
|
||||||
static int vf610_nfc_nand_init(int devnum, void __iomem *addr)
|
static int vf610_nfc_nand_init(struct vf610_nfc *nfc, int devnum)
|
||||||
{
|
{
|
||||||
struct mtd_info *mtd;
|
struct nand_chip *chip = &nfc->chip;
|
||||||
struct nand_chip *chip;
|
struct mtd_info *mtd = nand_to_mtd(chip);
|
||||||
struct vf610_nfc *nfc;
|
|
||||||
int err = 0;
|
int err = 0;
|
||||||
struct vf610_nfc_config cfg = {
|
struct vf610_nfc_config cfg = {
|
||||||
.hardware_ecc = 1,
|
.hardware_ecc = 1,
|
||||||
@ -647,16 +648,6 @@ static int vf610_nfc_nand_init(int devnum, void __iomem *addr)
|
|||||||
.flash_bbt = 1,
|
.flash_bbt = 1,
|
||||||
};
|
};
|
||||||
|
|
||||||
nfc = calloc(1, sizeof(*nfc));
|
|
||||||
if (!nfc) {
|
|
||||||
printf(KERN_ERR "%s: Memory exhausted!\n", __func__);
|
|
||||||
return -ENOMEM;
|
|
||||||
}
|
|
||||||
|
|
||||||
chip = &nfc->chip;
|
|
||||||
nfc->regs = addr;
|
|
||||||
|
|
||||||
mtd = nand_to_mtd(chip);
|
|
||||||
nand_set_controller_data(chip, nfc);
|
nand_set_controller_data(chip, nfc);
|
||||||
|
|
||||||
if (cfg.width == 16)
|
if (cfg.width == 16)
|
||||||
@ -777,20 +768,23 @@ static const struct udevice_id vf610_nfc_dt_ids[] = {
|
|||||||
static int vf610_nfc_dt_probe(struct udevice *dev)
|
static int vf610_nfc_dt_probe(struct udevice *dev)
|
||||||
{
|
{
|
||||||
struct resource res;
|
struct resource res;
|
||||||
|
struct vf610_nfc *nfc = dev_get_priv(dev);
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
ret = dev_read_resource(dev, 0, &res);
|
ret = dev_read_resource(dev, 0, &res);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
return vf610_nfc_nand_init(0, devm_ioremap(dev, res.start,
|
nfc->regs = devm_ioremap(dev, res.start, resource_size(&res));
|
||||||
resource_size(&res)));
|
nfc->dev = dev;
|
||||||
|
return vf610_nfc_nand_init(nfc, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
U_BOOT_DRIVER(vf610_nfc_dt) = {
|
U_BOOT_DRIVER(vf610_nfc_dt) = {
|
||||||
.name = "vf610-nfc-dt",
|
.name = "vf610-nfc-dt",
|
||||||
.id = UCLASS_MTD,
|
.id = UCLASS_MTD,
|
||||||
.of_match = vf610_nfc_dt_ids,
|
.of_match = vf610_nfc_dt_ids,
|
||||||
|
.priv_auto_alloc_size = sizeof(struct vf610_nfc),
|
||||||
.probe = vf610_nfc_dt_probe,
|
.probe = vf610_nfc_dt_probe,
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -809,7 +803,17 @@ void board_nand_init(void)
|
|||||||
#else
|
#else
|
||||||
void board_nand_init(void)
|
void board_nand_init(void)
|
||||||
{
|
{
|
||||||
int err = vf610_nfc_nand_init(0, (void __iomem *)CONFIG_SYS_NAND_BASE);
|
int err;
|
||||||
|
struct vf610_nfc *nfc;
|
||||||
|
|
||||||
|
nfc = calloc(1, sizeof(*nfc));
|
||||||
|
if (!nfc) {
|
||||||
|
printf("%s: Out of memory\n", __func__);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
nfc->regs = (void __iomem *)CONFIG_SYS_NAND_BASE;
|
||||||
|
err = vf610_nfc_nand_init(nfc, 0);
|
||||||
if (err)
|
if (err)
|
||||||
printf("VF610 NAND init failed (err %d)\n", err);
|
printf("VF610 NAND init failed (err %d)\n", err);
|
||||||
}
|
}
|
||||||
|
@ -984,13 +984,13 @@ static int spinand_detect(struct spinand_device *spinand)
|
|||||||
|
|
||||||
ret = spinand_manufacturer_detect(spinand);
|
ret = spinand_manufacturer_detect(spinand);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "unknown raw ID %*phN\n", SPINAND_MAX_ID_LEN,
|
dev_err(spinand->slave->dev, "unknown raw ID %*phN\n",
|
||||||
spinand->id.data);
|
SPINAND_MAX_ID_LEN, spinand->id.data);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (nand->memorg.ntargets > 1 && !spinand->select_target) {
|
if (nand->memorg.ntargets > 1 && !spinand->select_target) {
|
||||||
dev_err(dev,
|
dev_err(spinand->slave->dev,
|
||||||
"SPI NANDs with more than one die must implement ->select_target()\n");
|
"SPI NANDs with more than one die must implement ->select_target()\n");
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
@ -1076,7 +1076,7 @@ static int spinand_init(struct spinand_device *spinand)
|
|||||||
|
|
||||||
ret = spinand_manufacturer_init(spinand);
|
ret = spinand_manufacturer_init(spinand);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev,
|
dev_err(spinand->slave->dev,
|
||||||
"Failed to initialize the SPI NAND chip (err = %d)\n",
|
"Failed to initialize the SPI NAND chip (err = %d)\n",
|
||||||
ret);
|
ret);
|
||||||
goto err_free_bufs;
|
goto err_free_bufs;
|
||||||
|
@ -11,6 +11,7 @@
|
|||||||
|
|
||||||
#include <common.h>
|
#include <common.h>
|
||||||
#include <log.h>
|
#include <log.h>
|
||||||
|
#include <dm.h>
|
||||||
#include <dm/device_compat.h>
|
#include <dm/device_compat.h>
|
||||||
#include <dm/devres.h>
|
#include <dm/devres.h>
|
||||||
#include <linux/bitops.h>
|
#include <linux/bitops.h>
|
||||||
|
@ -55,9 +55,19 @@ static int spi_nor_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len)
|
|||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
ret = spi_nor_read_write_reg(nor, &op, val);
|
ret = spi_nor_read_write_reg(nor, &op, val);
|
||||||
if (ret < 0)
|
if (ret < 0) {
|
||||||
dev_dbg(&flash->spimem->spi->dev, "error %d reading %x\n", ret,
|
/*
|
||||||
|
* spi_slave does not have a struct udevice member without DM,
|
||||||
|
* so use the bus and cs instead.
|
||||||
|
*/
|
||||||
|
#if CONFIG_IS_ENABLED(DM_SPI)
|
||||||
|
dev_dbg(nor->spi->dev, "error %d reading %x\n", ret,
|
||||||
code);
|
code);
|
||||||
|
#else
|
||||||
|
log_debug("spi%u.%u: error %d reading %x\n",
|
||||||
|
nor->spi->bus, nor->spi->cs, ret, code);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
@ -512,7 +522,8 @@ static int spansion_read_cr_quad_enable(struct spi_nor *nor)
|
|||||||
/* Check current Quad Enable bit value. */
|
/* Check current Quad Enable bit value. */
|
||||||
ret = read_cr(nor);
|
ret = read_cr(nor);
|
||||||
if (ret < 0) {
|
if (ret < 0) {
|
||||||
dev_dbg(dev, "error while reading configuration register\n");
|
dev_dbg(nor->dev,
|
||||||
|
"error while reading configuration register\n");
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -524,7 +535,7 @@ static int spansion_read_cr_quad_enable(struct spi_nor *nor)
|
|||||||
/* Keep the current value of the Status Register. */
|
/* Keep the current value of the Status Register. */
|
||||||
ret = read_sr(nor);
|
ret = read_sr(nor);
|
||||||
if (ret < 0) {
|
if (ret < 0) {
|
||||||
dev_dbg(dev, "error while reading status register\n");
|
dev_dbg(nor->dev, "error while reading status register\n");
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
sr_cr[0] = ret;
|
sr_cr[0] = ret;
|
||||||
@ -785,7 +796,7 @@ int spi_nor_scan(struct spi_nor *nor)
|
|||||||
}
|
}
|
||||||
|
|
||||||
if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
|
if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
|
||||||
dev_dbg(dev, "address width is too large: %u\n",
|
dev_dbg(nor->dev, "address width is too large: %u\n",
|
||||||
nor->addr_width);
|
nor->addr_width);
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
@ -249,8 +249,7 @@ static int bcm6368_eth_adjust_link(struct udevice *dev)
|
|||||||
|
|
||||||
/* link changed */
|
/* link changed */
|
||||||
if (!up) {
|
if (!up) {
|
||||||
dev_info(&priv->pdev->dev, "link DOWN on %s\n",
|
dev_info(dev, "link DOWN on %s\n", port->name);
|
||||||
port->name);
|
|
||||||
writeb_be(ETH_PORTOV_ENABLE_MASK,
|
writeb_be(ETH_PORTOV_ENABLE_MASK,
|
||||||
priv->base + ETH_PORTOV_REG(i));
|
priv->base + ETH_PORTOV_REG(i));
|
||||||
writeb_be(ETH_PTCTRL_RXDIS_MASK |
|
writeb_be(ETH_PTCTRL_RXDIS_MASK |
|
||||||
|
@ -625,9 +625,9 @@ static void mvneta_port_down(struct mvneta_port *pp)
|
|||||||
count = 0;
|
count = 0;
|
||||||
do {
|
do {
|
||||||
if (count++ >= MVNETA_RX_DISABLE_TIMEOUT_MSEC) {
|
if (count++ >= MVNETA_RX_DISABLE_TIMEOUT_MSEC) {
|
||||||
netdev_warn(pp->dev,
|
dev_warn(pp->phydev->dev,
|
||||||
"TIMEOUT for RX stopped ! rx_queue_cmd: 0x08%x\n",
|
"TIMEOUT for RX stopped ! rx_queue_cmd: 0x08%x\n",
|
||||||
val);
|
val);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
mdelay(1);
|
mdelay(1);
|
||||||
@ -648,9 +648,9 @@ static void mvneta_port_down(struct mvneta_port *pp)
|
|||||||
count = 0;
|
count = 0;
|
||||||
do {
|
do {
|
||||||
if (count++ >= MVNETA_TX_DISABLE_TIMEOUT_MSEC) {
|
if (count++ >= MVNETA_TX_DISABLE_TIMEOUT_MSEC) {
|
||||||
netdev_warn(pp->dev,
|
dev_warn(pp->phydev->dev,
|
||||||
"TIMEOUT for TX stopped status=0x%08x\n",
|
"TIMEOUT for TX stopped status=0x%08x\n",
|
||||||
val);
|
val);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
mdelay(1);
|
mdelay(1);
|
||||||
@ -664,9 +664,9 @@ static void mvneta_port_down(struct mvneta_port *pp)
|
|||||||
count = 0;
|
count = 0;
|
||||||
do {
|
do {
|
||||||
if (count++ >= MVNETA_TX_FIFO_EMPTY_TIMEOUT) {
|
if (count++ >= MVNETA_TX_FIFO_EMPTY_TIMEOUT) {
|
||||||
netdev_warn(pp->dev,
|
dev_warn(pp->phydev->dev,
|
||||||
"TX FIFO empty timeout status=0x08%x\n",
|
"TX FIFO empty timeout status=0x08%x\n",
|
||||||
val);
|
val);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
mdelay(1);
|
mdelay(1);
|
||||||
@ -949,28 +949,32 @@ static void mvneta_rx_error(struct mvneta_port *pp,
|
|||||||
u32 status = rx_desc->status;
|
u32 status = rx_desc->status;
|
||||||
|
|
||||||
if (!mvneta_rxq_desc_is_first_last(status)) {
|
if (!mvneta_rxq_desc_is_first_last(status)) {
|
||||||
netdev_err(pp->dev,
|
dev_err(pp->phydev->dev,
|
||||||
"bad rx status %08x (buffer oversize), size=%d\n",
|
"bad rx status %08x (buffer oversize), size=%d\n",
|
||||||
status, rx_desc->data_size);
|
status, rx_desc->data_size);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
switch (status & MVNETA_RXD_ERR_CODE_MASK) {
|
switch (status & MVNETA_RXD_ERR_CODE_MASK) {
|
||||||
case MVNETA_RXD_ERR_CRC:
|
case MVNETA_RXD_ERR_CRC:
|
||||||
netdev_err(pp->dev, "bad rx status %08x (crc error), size=%d\n",
|
dev_err(pp->phydev->dev,
|
||||||
status, rx_desc->data_size);
|
"bad rx status %08x (crc error), size=%d\n", status,
|
||||||
|
rx_desc->data_size);
|
||||||
break;
|
break;
|
||||||
case MVNETA_RXD_ERR_OVERRUN:
|
case MVNETA_RXD_ERR_OVERRUN:
|
||||||
netdev_err(pp->dev, "bad rx status %08x (overrun error), size=%d\n",
|
dev_err(pp->phydev->dev,
|
||||||
status, rx_desc->data_size);
|
"bad rx status %08x (overrun error), size=%d\n", status,
|
||||||
|
rx_desc->data_size);
|
||||||
break;
|
break;
|
||||||
case MVNETA_RXD_ERR_LEN:
|
case MVNETA_RXD_ERR_LEN:
|
||||||
netdev_err(pp->dev, "bad rx status %08x (max frame length error), size=%d\n",
|
dev_err(pp->phydev->dev,
|
||||||
status, rx_desc->data_size);
|
"bad rx status %08x (max frame length error), size=%d\n",
|
||||||
|
status, rx_desc->data_size);
|
||||||
break;
|
break;
|
||||||
case MVNETA_RXD_ERR_RESOURCE:
|
case MVNETA_RXD_ERR_RESOURCE:
|
||||||
netdev_err(pp->dev, "bad rx status %08x (resource error), size=%d\n",
|
dev_err(pp->phydev->dev,
|
||||||
status, rx_desc->data_size);
|
"bad rx status %08x (resource error), size=%d\n",
|
||||||
|
status, rx_desc->data_size);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -1127,8 +1131,8 @@ static int mvneta_setup_rxqs(struct mvneta_port *pp)
|
|||||||
for (queue = 0; queue < rxq_number; queue++) {
|
for (queue = 0; queue < rxq_number; queue++) {
|
||||||
int err = mvneta_rxq_init(pp, &pp->rxqs[queue]);
|
int err = mvneta_rxq_init(pp, &pp->rxqs[queue]);
|
||||||
if (err) {
|
if (err) {
|
||||||
netdev_err(pp->dev, "%s: can't create rxq=%d\n",
|
dev_err(pp->phydev->dev, "%s: can't create rxq=%d\n",
|
||||||
__func__, queue);
|
__func__, queue);
|
||||||
mvneta_cleanup_rxqs(pp);
|
mvneta_cleanup_rxqs(pp);
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
@ -1145,8 +1149,8 @@ static int mvneta_setup_txqs(struct mvneta_port *pp)
|
|||||||
for (queue = 0; queue < txq_number; queue++) {
|
for (queue = 0; queue < txq_number; queue++) {
|
||||||
int err = mvneta_txq_init(pp, &pp->txqs[queue]);
|
int err = mvneta_txq_init(pp, &pp->txqs[queue]);
|
||||||
if (err) {
|
if (err) {
|
||||||
netdev_err(pp->dev, "%s: can't create txq=%d\n",
|
dev_err(pp->phydev->dev, "%s: can't create txq=%d\n",
|
||||||
__func__, queue);
|
__func__, queue);
|
||||||
mvneta_cleanup_txqs(pp);
|
mvneta_cleanup_txqs(pp);
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
@ -1402,7 +1406,7 @@ static int mvneta_init(struct udevice *dev)
|
|||||||
|
|
||||||
err = mvneta_init2(pp);
|
err = mvneta_init2(pp);
|
||||||
if (err < 0) {
|
if (err < 0) {
|
||||||
dev_err(&pdev->dev, "can't init eth hal\n");
|
dev_err(dev, "can't init eth hal\n");
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1410,7 +1414,7 @@ static int mvneta_init(struct udevice *dev)
|
|||||||
|
|
||||||
err = mvneta_port_power_up(pp, pp->phy_interface);
|
err = mvneta_port_power_up(pp, pp->phy_interface);
|
||||||
if (err < 0) {
|
if (err < 0) {
|
||||||
dev_err(&pdev->dev, "can't power up port\n");
|
dev_err(dev, "can't power up port\n");
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -2568,7 +2568,7 @@ static int mvpp2_bm_pool_create(struct udevice *dev,
|
|||||||
|
|
||||||
if (!IS_ALIGNED((unsigned long)bm_pool->virt_addr,
|
if (!IS_ALIGNED((unsigned long)bm_pool->virt_addr,
|
||||||
MVPP2_BM_POOL_PTR_ALIGN)) {
|
MVPP2_BM_POOL_PTR_ALIGN)) {
|
||||||
dev_err(&pdev->dev, "BM pool %d is not %d bytes aligned\n",
|
dev_err(dev, "BM pool %d is not %d bytes aligned\n",
|
||||||
bm_pool->id, MVPP2_BM_POOL_PTR_ALIGN);
|
bm_pool->id, MVPP2_BM_POOL_PTR_ALIGN);
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
@ -2659,7 +2659,7 @@ static int mvpp2_bm_pools_init(struct udevice *dev,
|
|||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
err_unroll_pools:
|
err_unroll_pools:
|
||||||
dev_err(&pdev->dev, "failed to create BM pool %d, size %d\n", i, size);
|
dev_err(dev, "failed to create BM pool %d, size %d\n", i, size);
|
||||||
for (i = i - 1; i >= 0; i--)
|
for (i = i - 1; i >= 0; i--)
|
||||||
mvpp2_bm_pool_destroy(dev, priv, &priv->bm_pools[i]);
|
mvpp2_bm_pool_destroy(dev, priv, &priv->bm_pools[i]);
|
||||||
return err;
|
return err;
|
||||||
@ -2773,9 +2773,9 @@ static int mvpp2_bm_bufs_add(struct mvpp2_port *port,
|
|||||||
|
|
||||||
if (buf_num < 0 ||
|
if (buf_num < 0 ||
|
||||||
(buf_num + bm_pool->buf_num > bm_pool->size)) {
|
(buf_num + bm_pool->buf_num > bm_pool->size)) {
|
||||||
netdev_err(port->dev,
|
dev_err(port->phy_dev->dev,
|
||||||
"cannot allocate %d buffers for pool %d\n",
|
"cannot allocate %d buffers for pool %d\n", buf_num,
|
||||||
buf_num, bm_pool->id);
|
bm_pool->id);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -2803,7 +2803,7 @@ mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type,
|
|||||||
int num;
|
int num;
|
||||||
|
|
||||||
if (new_pool->type != MVPP2_BM_FREE && new_pool->type != type) {
|
if (new_pool->type != MVPP2_BM_FREE && new_pool->type != type) {
|
||||||
netdev_err(port->dev, "mixing pool types is forbidden\n");
|
dev_err(port->phy_dev->dev, "mixing pool types is forbidden\n");
|
||||||
return NULL;
|
return NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -2834,8 +2834,9 @@ mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type,
|
|||||||
/* Allocate buffers for this pool */
|
/* Allocate buffers for this pool */
|
||||||
num = mvpp2_bm_bufs_add(port, new_pool, pkts_num);
|
num = mvpp2_bm_bufs_add(port, new_pool, pkts_num);
|
||||||
if (num != pkts_num) {
|
if (num != pkts_num) {
|
||||||
dev_err(dev, "pool %d: %d of %d allocated\n",
|
dev_err(port->phy_dev->dev,
|
||||||
new_pool->id, num, pkts_num);
|
"pool %d: %d of %d allocated\n", new_pool->id,
|
||||||
|
num, pkts_num);
|
||||||
return NULL;
|
return NULL;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -3344,8 +3345,7 @@ static int gop_port_init(struct mvpp2_port *port)
|
|||||||
int num_of_act_lanes;
|
int num_of_act_lanes;
|
||||||
|
|
||||||
if (mac_num >= MVPP22_GOP_MAC_NUM) {
|
if (mac_num >= MVPP22_GOP_MAC_NUM) {
|
||||||
netdev_err(NULL, "%s: illegal port number %d", __func__,
|
log_err("illegal port number %d", mac_num);
|
||||||
mac_num);
|
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -3399,8 +3399,8 @@ static int gop_port_init(struct mvpp2_port *port)
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
netdev_err(NULL, "%s: Requested port mode (%d) not supported\n",
|
log_err("Requested port mode (%d) not supported\n",
|
||||||
__func__, port->phy_interface);
|
port->phy_interface);
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -3440,8 +3440,8 @@ static void gop_port_enable(struct mvpp2_port *port, int enable)
|
|||||||
|
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
netdev_err(NULL, "%s: Wrong port mode (%d)\n", __func__,
|
log_err("%s: Wrong port mode (%d)\n", __func__,
|
||||||
port->phy_interface);
|
port->phy_interface);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -3811,9 +3811,9 @@ static void mvpp2_egress_disable(struct mvpp2_port *port)
|
|||||||
delay = 0;
|
delay = 0;
|
||||||
do {
|
do {
|
||||||
if (delay >= MVPP2_TX_DISABLE_TIMEOUT_MSEC) {
|
if (delay >= MVPP2_TX_DISABLE_TIMEOUT_MSEC) {
|
||||||
netdev_warn(port->dev,
|
dev_warn(port->phy_dev->dev,
|
||||||
"Tx stop timed out, status=0x%08x\n",
|
"Tx stop timed out, status=0x%08x\n",
|
||||||
reg_data);
|
reg_data);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
mdelay(1);
|
mdelay(1);
|
||||||
@ -4261,9 +4261,9 @@ static void mvpp2_txq_clean(struct mvpp2_port *port, struct mvpp2_tx_queue *txq)
|
|||||||
delay = 0;
|
delay = 0;
|
||||||
do {
|
do {
|
||||||
if (delay >= MVPP2_TX_PENDING_TIMEOUT_MSEC) {
|
if (delay >= MVPP2_TX_PENDING_TIMEOUT_MSEC) {
|
||||||
netdev_warn(port->dev,
|
dev_warn(port->phy_dev->dev,
|
||||||
"port %d: cleaning queue %d timed out\n",
|
"port %d: cleaning queue %d timed out\n",
|
||||||
port->id, txq->log_id);
|
port->id, txq->log_id);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
mdelay(1);
|
mdelay(1);
|
||||||
@ -4430,16 +4430,19 @@ static void mvpp2_rx_error(struct mvpp2_port *port,
|
|||||||
|
|
||||||
switch (status & MVPP2_RXD_ERR_CODE_MASK) {
|
switch (status & MVPP2_RXD_ERR_CODE_MASK) {
|
||||||
case MVPP2_RXD_ERR_CRC:
|
case MVPP2_RXD_ERR_CRC:
|
||||||
netdev_err(port->dev, "bad rx status %08x (crc error), size=%zu\n",
|
dev_err(port->phy_dev->dev,
|
||||||
status, sz);
|
"bad rx status %08x (crc error), size=%zu\n", status,
|
||||||
|
sz);
|
||||||
break;
|
break;
|
||||||
case MVPP2_RXD_ERR_OVERRUN:
|
case MVPP2_RXD_ERR_OVERRUN:
|
||||||
netdev_err(port->dev, "bad rx status %08x (overrun error), size=%zu\n",
|
dev_err(port->phy_dev->dev,
|
||||||
status, sz);
|
"bad rx status %08x (overrun error), size=%zu\n",
|
||||||
|
status, sz);
|
||||||
break;
|
break;
|
||||||
case MVPP2_RXD_ERR_RESOURCE:
|
case MVPP2_RXD_ERR_RESOURCE:
|
||||||
netdev_err(port->dev, "bad rx status %08x (resource error), size=%zu\n",
|
dev_err(port->phy_dev->dev,
|
||||||
status, sz);
|
"bad rx status %08x (resource error), size=%zu\n",
|
||||||
|
status, sz);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -4507,8 +4510,8 @@ static void mvpp2_phy_connect(struct udevice *dev, struct mvpp2_port *port)
|
|||||||
*/
|
*/
|
||||||
if (phy_dev &&
|
if (phy_dev &&
|
||||||
phy_dev->drv->uid == 0xffffffff) {/* Generic phy */
|
phy_dev->drv->uid == 0xffffffff) {/* Generic phy */
|
||||||
netdev_warn(port->dev,
|
dev_warn(port->phy_dev->dev,
|
||||||
"Marking phy as invalid, link will not be checked\n");
|
"Marking phy as invalid, link will not be checked\n");
|
||||||
/* set phy_addr to invalid value */
|
/* set phy_addr to invalid value */
|
||||||
port->phyaddr = PHY_MAX_ADDR;
|
port->phyaddr = PHY_MAX_ADDR;
|
||||||
mvpp2_egress_enable(port);
|
mvpp2_egress_enable(port);
|
||||||
@ -4519,7 +4522,7 @@ static void mvpp2_phy_connect(struct udevice *dev, struct mvpp2_port *port)
|
|||||||
|
|
||||||
port->phy_dev = phy_dev;
|
port->phy_dev = phy_dev;
|
||||||
if (!phy_dev) {
|
if (!phy_dev) {
|
||||||
netdev_err(port->dev, "cannot connect to phy\n");
|
dev_err(port->phy_dev->dev, "cannot connect to phy\n");
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
phy_dev->supported &= PHY_GBIT_FEATURES;
|
phy_dev->supported &= PHY_GBIT_FEATURES;
|
||||||
@ -4550,31 +4553,31 @@ static int mvpp2_open(struct udevice *dev, struct mvpp2_port *port)
|
|||||||
|
|
||||||
err = mvpp2_prs_mac_da_accept(port->priv, port->id, mac_bcast, true);
|
err = mvpp2_prs_mac_da_accept(port->priv, port->id, mac_bcast, true);
|
||||||
if (err) {
|
if (err) {
|
||||||
netdev_err(dev, "mvpp2_prs_mac_da_accept BC failed\n");
|
dev_err(dev, "mvpp2_prs_mac_da_accept BC failed\n");
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
err = mvpp2_prs_mac_da_accept(port->priv, port->id,
|
err = mvpp2_prs_mac_da_accept(port->priv, port->id,
|
||||||
port->dev_addr, true);
|
port->dev_addr, true);
|
||||||
if (err) {
|
if (err) {
|
||||||
netdev_err(dev, "mvpp2_prs_mac_da_accept MC failed\n");
|
dev_err(dev, "mvpp2_prs_mac_da_accept MC failed\n");
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
err = mvpp2_prs_def_flow(port);
|
err = mvpp2_prs_def_flow(port);
|
||||||
if (err) {
|
if (err) {
|
||||||
netdev_err(dev, "mvpp2_prs_def_flow failed\n");
|
dev_err(dev, "mvpp2_prs_def_flow failed\n");
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Allocate the Rx/Tx queues */
|
/* Allocate the Rx/Tx queues */
|
||||||
err = mvpp2_setup_rxqs(port);
|
err = mvpp2_setup_rxqs(port);
|
||||||
if (err) {
|
if (err) {
|
||||||
netdev_err(port->dev, "cannot allocate Rx queues\n");
|
dev_err(port->phy_dev->dev, "cannot allocate Rx queues\n");
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
|
|
||||||
err = mvpp2_setup_txqs(port);
|
err = mvpp2_setup_txqs(port);
|
||||||
if (err) {
|
if (err) {
|
||||||
netdev_err(port->dev, "cannot allocate Tx queues\n");
|
dev_err(port->phy_dev->dev, "cannot allocate Tx queues\n");
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -4725,7 +4728,7 @@ static int phy_info_parse(struct udevice *dev, struct mvpp2_port *port)
|
|||||||
int parent;
|
int parent;
|
||||||
phyaddr = fdtdec_get_int(gd->fdt_blob, phy_node, "reg", 0);
|
phyaddr = fdtdec_get_int(gd->fdt_blob, phy_node, "reg", 0);
|
||||||
if (phyaddr < 0) {
|
if (phyaddr < 0) {
|
||||||
dev_err(&pdev->dev, "could not find phy address\n");
|
dev_err(dev, "could not find phy address\n");
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
parent = fdt_parent_offset(gd->fdt_blob, phy_node);
|
parent = fdt_parent_offset(gd->fdt_blob, phy_node);
|
||||||
@ -4742,13 +4745,13 @@ static int phy_info_parse(struct udevice *dev, struct mvpp2_port *port)
|
|||||||
if (phy_mode_str)
|
if (phy_mode_str)
|
||||||
phy_mode = phy_get_interface_by_name(phy_mode_str);
|
phy_mode = phy_get_interface_by_name(phy_mode_str);
|
||||||
if (phy_mode == -1) {
|
if (phy_mode == -1) {
|
||||||
dev_err(&pdev->dev, "incorrect phy mode\n");
|
dev_err(dev, "incorrect phy mode\n");
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
id = fdtdec_get_int(gd->fdt_blob, port_node, "port-id", -1);
|
id = fdtdec_get_int(gd->fdt_blob, port_node, "port-id", -1);
|
||||||
if (id == -1) {
|
if (id == -1) {
|
||||||
dev_err(&pdev->dev, "missing port-id value\n");
|
dev_err(dev, "missing port-id value\n");
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -4807,7 +4810,7 @@ static int mvpp2_port_probe(struct udevice *dev,
|
|||||||
|
|
||||||
err = mvpp2_port_init(dev, port);
|
err = mvpp2_port_init(dev, port);
|
||||||
if (err < 0) {
|
if (err < 0) {
|
||||||
dev_err(&pdev->dev, "failed to init port %d\n", port->id);
|
dev_err(dev, "failed to init port %d\n", port->id);
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
mvpp2_port_power_up(port);
|
mvpp2_port_power_up(port);
|
||||||
@ -4978,7 +4981,7 @@ static int mvpp2_init(struct udevice *dev, struct mvpp2 *priv)
|
|||||||
/* Checks for hardware constraints (U-Boot uses only one rxq) */
|
/* Checks for hardware constraints (U-Boot uses only one rxq) */
|
||||||
if ((rxq_number > priv->max_port_rxqs) ||
|
if ((rxq_number > priv->max_port_rxqs) ||
|
||||||
(txq_number > MVPP2_MAX_TXQ)) {
|
(txq_number > MVPP2_MAX_TXQ)) {
|
||||||
dev_err(&pdev->dev, "invalid queue size parameter\n");
|
dev_err(dev, "invalid queue size parameter\n");
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -5099,7 +5102,7 @@ static int mvpp2_recv(struct udevice *dev, int flags, uchar **packetp)
|
|||||||
|
|
||||||
err = mvpp2_rx_refill(port, bm_pool, bm, dma_addr);
|
err = mvpp2_rx_refill(port, bm_pool, bm, dma_addr);
|
||||||
if (err) {
|
if (err) {
|
||||||
netdev_err(port->dev, "failed to refill BM pools\n");
|
dev_err(port->phy_dev->dev, "failed to refill BM pools\n");
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -5345,7 +5348,7 @@ static int mvpp2_probe(struct udevice *dev)
|
|||||||
port->gop_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
|
port->gop_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
|
||||||
"gop-port-id", -1);
|
"gop-port-id", -1);
|
||||||
if (port->id == -1) {
|
if (port->id == -1) {
|
||||||
dev_err(&pdev->dev, "missing gop-port-id value\n");
|
dev_err(dev, "missing gop-port-id value\n");
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -5364,7 +5367,7 @@ static int mvpp2_probe(struct udevice *dev)
|
|||||||
/* Initialize network controller */
|
/* Initialize network controller */
|
||||||
err = mvpp2_init(dev, priv);
|
err = mvpp2_init(dev, priv);
|
||||||
if (err < 0) {
|
if (err < 0) {
|
||||||
dev_err(&pdev->dev, "failed to initialize controller\n");
|
dev_err(dev, "failed to initialize controller\n");
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
priv->num_ports = 0;
|
priv->num_ports = 0;
|
||||||
|
@ -663,7 +663,8 @@ static int sun8i_eth_write_hwaddr(struct udevice *dev)
|
|||||||
return _sun8i_write_hwaddr(priv, pdata->enetaddr);
|
return _sun8i_write_hwaddr(priv, pdata->enetaddr);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int sun8i_emac_board_setup(struct emac_eth_dev *priv)
|
static int sun8i_emac_board_setup(struct udevice *dev,
|
||||||
|
struct emac_eth_dev *priv)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
@ -833,7 +834,7 @@ static int sun8i_emac_eth_probe(struct udevice *dev)
|
|||||||
|
|
||||||
priv->mac_reg = (void *)pdata->iobase;
|
priv->mac_reg = (void *)pdata->iobase;
|
||||||
|
|
||||||
ret = sun8i_emac_board_setup(priv);
|
ret = sun8i_emac_board_setup(dev, priv);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
@ -854,7 +855,7 @@ static const struct eth_ops sun8i_emac_eth_ops = {
|
|||||||
.stop = sun8i_emac_eth_stop,
|
.stop = sun8i_emac_eth_stop,
|
||||||
};
|
};
|
||||||
|
|
||||||
static int sun8i_get_ephy_nodes(struct emac_eth_dev *priv)
|
static int sun8i_get_ephy_nodes(struct udevice *dev, struct emac_eth_dev *priv)
|
||||||
{
|
{
|
||||||
int emac_node, ephy_node, ret, ephy_handle;
|
int emac_node, ephy_node, ret, ephy_handle;
|
||||||
|
|
||||||
@ -986,7 +987,7 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)
|
|||||||
}
|
}
|
||||||
|
|
||||||
if (priv->variant == H3_EMAC) {
|
if (priv->variant == H3_EMAC) {
|
||||||
ret = sun8i_get_ephy_nodes(priv);
|
ret = sun8i_get_ephy_nodes(dev, priv);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
@ -505,7 +505,8 @@ static int _sunxi_emac_eth_send(struct emac_eth_dev *priv, void *packet,
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int sunxi_emac_board_setup(struct emac_eth_dev *priv)
|
static int sunxi_emac_board_setup(struct udevice *dev,
|
||||||
|
struct emac_eth_dev *priv)
|
||||||
{
|
{
|
||||||
struct sunxi_sramc_regs *sram =
|
struct sunxi_sramc_regs *sram =
|
||||||
(struct sunxi_sramc_regs *)SUNXI_SRAMC_BASE;
|
(struct sunxi_sramc_regs *)SUNXI_SRAMC_BASE;
|
||||||
@ -576,7 +577,7 @@ static int sunxi_emac_eth_probe(struct udevice *dev)
|
|||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = sunxi_emac_board_setup(priv);
|
ret = sunxi_emac_board_setup(dev, priv);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
|
@ -856,8 +856,14 @@ static int cpsw_phy_init(struct cpsw_priv *priv, struct cpsw_slave *slave)
|
|||||||
ret = phy_set_supported(phydev, slave->data->max_speed);
|
ret = phy_set_supported(phydev, slave->data->max_speed);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
#if CONFIG_IS_ENABLED(DM_ETH)
|
||||||
dev_dbg(priv->dev, "Port %u speed forced to %uMbit\n",
|
dev_dbg(priv->dev, "Port %u speed forced to %uMbit\n",
|
||||||
slave->slave_num + 1, slave->data->max_speed);
|
slave->slave_num + 1, slave->data->max_speed);
|
||||||
|
#else
|
||||||
|
log_debug("%s: Port %u speed forced to %uMbit\n",
|
||||||
|
priv->dev->name, slave->slave_num + 1,
|
||||||
|
slave->data->max_speed);
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
phydev->advertising = phydev->supported;
|
phydev->advertising = phydev->supported;
|
||||||
|
|
||||||
|
@ -272,13 +272,15 @@ static int sun4i_usb_phy_init(struct phy *phy)
|
|||||||
|
|
||||||
ret = clk_enable(&usb_phy->clocks);
|
ret = clk_enable(&usb_phy->clocks);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to enable usb_%ldphy clock\n", phy->id);
|
dev_err(phy->dev, "failed to enable usb_%ldphy clock\n",
|
||||||
|
phy->id);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = reset_deassert(&usb_phy->resets);
|
ret = reset_deassert(&usb_phy->resets);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to deassert usb_%ldreset reset\n", phy->id);
|
dev_err(phy->dev, "failed to deassert usb_%ldreset reset\n",
|
||||||
|
phy->id);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -338,13 +340,15 @@ static int sun4i_usb_phy_exit(struct phy *phy)
|
|||||||
|
|
||||||
ret = clk_disable(&usb_phy->clocks);
|
ret = clk_disable(&usb_phy->clocks);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to disable usb_%ldphy clock\n", phy->id);
|
dev_err(phy->dev, "failed to disable usb_%ldphy clock\n",
|
||||||
|
phy->id);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = reset_assert(&usb_phy->resets);
|
ret = reset_assert(&usb_phy->resets);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to assert usb_%ldreset reset\n", phy->id);
|
dev_err(phy->dev, "failed to assert usb_%ldreset reset\n",
|
||||||
|
phy->id);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -98,14 +98,14 @@ static int comphy_probe(struct udevice *dev)
|
|||||||
chip_cfg->comphy_lanes_count = fdtdec_get_int(blob, node,
|
chip_cfg->comphy_lanes_count = fdtdec_get_int(blob, node,
|
||||||
"max-lanes", 0);
|
"max-lanes", 0);
|
||||||
if (chip_cfg->comphy_lanes_count <= 0) {
|
if (chip_cfg->comphy_lanes_count <= 0) {
|
||||||
dev_err(&dev->dev, "comphy max lanes is wrong\n");
|
dev_err(dev, "comphy max lanes is wrong\n");
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
chip_cfg->comphy_mux_bitcount = fdtdec_get_int(blob, node,
|
chip_cfg->comphy_mux_bitcount = fdtdec_get_int(blob, node,
|
||||||
"mux-bitcount", 0);
|
"mux-bitcount", 0);
|
||||||
if (chip_cfg->comphy_mux_bitcount <= 0) {
|
if (chip_cfg->comphy_mux_bitcount <= 0) {
|
||||||
dev_err(&dev->dev, "comphy mux bit count is wrong\n");
|
dev_err(dev, "comphy mux bit count is wrong\n");
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -124,7 +124,7 @@ static int comphy_probe(struct udevice *dev)
|
|||||||
* compatible node is found
|
* compatible node is found
|
||||||
*/
|
*/
|
||||||
if (!chip_cfg->ptr_comphy_chip_init) {
|
if (!chip_cfg->ptr_comphy_chip_init) {
|
||||||
dev_err(&dev->dev, "comphy: No compatible DT node found\n");
|
dev_err(dev, "comphy: No compatible DT node found\n");
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -311,7 +311,7 @@ static int stm32_usbphyc_of_xlate(struct phy *phy,
|
|||||||
|
|
||||||
if ((phy->id == 0 && args->args_count != 1) ||
|
if ((phy->id == 0 && args->args_count != 1) ||
|
||||||
(phy->id == 1 && args->args_count != 2)) {
|
(phy->id == 1 && args->args_count != 2)) {
|
||||||
dev_err(dev, "invalid number of cells for phy port%ld\n",
|
dev_err(phy->dev, "invalid number of cells for phy port%ld\n",
|
||||||
phy->id);
|
phy->id);
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
@ -318,13 +318,13 @@ static int serdes_am654_of_xlate(struct phy *x,
|
|||||||
struct serdes_am654 *phy = dev_get_priv(x->dev);
|
struct serdes_am654 *phy = dev_get_priv(x->dev);
|
||||||
|
|
||||||
if (args->args_count != 2) {
|
if (args->args_count != 2) {
|
||||||
dev_err(phy->dev, "Invalid DT PHY argument count: %d\n",
|
dev_err(x->dev, "Invalid DT PHY argument count: %d\n",
|
||||||
args->args_count);
|
args->args_count);
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (args->args[0] != PHY_TYPE_PCIE) {
|
if (args->args[0] != PHY_TYPE_PCIE) {
|
||||||
dev_err(phy->dev, "Unrecognized PHY type: %d\n",
|
dev_err(x->dev, "Unrecognized PHY type: %d\n",
|
||||||
args->args[0]);
|
args->args[0]);
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
@ -98,7 +98,7 @@ static int rockchip_pcie_phy_power_on(struct phy *phy)
|
|||||||
|
|
||||||
ret = reset_deassert(&priv->phy_rst);
|
ret = reset_deassert(&priv->phy_rst);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to assert phy reset\n");
|
dev_err(phy->dev, "failed to assert phy reset\n");
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -119,7 +119,7 @@ static int rockchip_pcie_phy_power_on(struct phy *phy)
|
|||||||
20 * 1000,
|
20 * 1000,
|
||||||
50);
|
50);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(&priv->dev, "pll lock timeout!\n");
|
dev_err(phy->dev, "pll lock timeout!\n");
|
||||||
goto err_pll_lock;
|
goto err_pll_lock;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -133,7 +133,7 @@ static int rockchip_pcie_phy_power_on(struct phy *phy)
|
|||||||
20 * 1000,
|
20 * 1000,
|
||||||
50);
|
50);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(&priv->dev, "pll output enable timeout!\n");
|
dev_err(phy->dev, "pll output enable timeout!\n");
|
||||||
goto err_pll_lock;
|
goto err_pll_lock;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -149,7 +149,7 @@ static int rockchip_pcie_phy_power_on(struct phy *phy)
|
|||||||
20 * 1000,
|
20 * 1000,
|
||||||
50);
|
50);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(&priv->dev, "pll relock timeout!\n");
|
dev_err(phy->dev, "pll relock timeout!\n");
|
||||||
goto err_pll_lock;
|
goto err_pll_lock;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -173,7 +173,7 @@ static int rockchip_pcie_phy_power_off(struct phy *phy)
|
|||||||
|
|
||||||
ret = reset_assert(&priv->phy_rst);
|
ret = reset_assert(&priv->phy_rst);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to assert phy reset\n");
|
dev_err(phy->dev, "failed to assert phy reset\n");
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -187,13 +187,13 @@ static int rockchip_pcie_phy_init(struct phy *phy)
|
|||||||
|
|
||||||
ret = clk_enable(&priv->refclk);
|
ret = clk_enable(&priv->refclk);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to enable refclk clock\n");
|
dev_err(phy->dev, "failed to enable refclk clock\n");
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = reset_assert(&priv->phy_rst);
|
ret = reset_assert(&priv->phy_rst);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to assert phy reset\n");
|
dev_err(phy->dev, "failed to assert phy reset\n");
|
||||||
goto err_reset;
|
goto err_reset;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -448,7 +448,7 @@ static void rockchip_tcphy_rx_usb3_cfg_lane(struct rockchip_tcphy *priv,
|
|||||||
writel(0xfb, priv->reg_base + XCVR_DIAG_BIDI_CTRL(lane));
|
writel(0xfb, priv->reg_base + XCVR_DIAG_BIDI_CTRL(lane));
|
||||||
}
|
}
|
||||||
|
|
||||||
static int rockchip_tcphy_init(struct rockchip_tcphy *priv)
|
static int rockchip_tcphy_init(struct phy *phy, struct rockchip_tcphy *priv)
|
||||||
{
|
{
|
||||||
const struct rockchip_usb3phy_port_cfg *cfg = priv->port_cfgs;
|
const struct rockchip_usb3phy_port_cfg *cfg = priv->port_cfgs;
|
||||||
u32 val;
|
u32 val;
|
||||||
@ -559,9 +559,9 @@ static int rockchip_usb3_phy_power_on(struct phy *phy)
|
|||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
if (priv->mode == MODE_DISCONNECT) {
|
if (priv->mode == MODE_DISCONNECT) {
|
||||||
ret = rockchip_tcphy_init(priv);
|
ret = rockchip_tcphy_init(phy, priv);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to init tcphy (ret=%d)\n", ret);
|
dev_err(phy->dev, "failed to init tcphy (ret=%d)\n", ret);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -100,7 +100,7 @@ void k3_sysctrler_load_msg_setup(struct k3_sysctrler_load_msg *fw,
|
|||||||
fw->buffer_size = size;
|
fw->buffer_size = size;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int k3_sysctrler_load_response(u32 *buf)
|
static int k3_sysctrler_load_response(struct udevice *dev, u32 *buf)
|
||||||
{
|
{
|
||||||
struct k3_sysctrler_load_msg *fw;
|
struct k3_sysctrler_load_msg *fw;
|
||||||
|
|
||||||
@ -129,7 +129,8 @@ static int k3_sysctrler_load_response(u32 *buf)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int k3_sysctrler_boot_notification_response(u32 *buf)
|
static int k3_sysctrler_boot_notification_response(struct udevice *dev,
|
||||||
|
u32 *buf)
|
||||||
{
|
{
|
||||||
struct k3_sysctrler_boot_notification_msg *boot;
|
struct k3_sysctrler_boot_notification_msg *boot;
|
||||||
|
|
||||||
@ -193,7 +194,7 @@ static int k3_sysctrler_load(struct udevice *dev, ulong addr, ulong size)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Process the response */
|
/* Process the response */
|
||||||
ret = k3_sysctrler_load_response(msg.buf);
|
ret = k3_sysctrler_load_response(dev, msg.buf);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
@ -230,7 +231,7 @@ static int k3_sysctrler_start(struct udevice *dev)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Process the response */
|
/* Process the response */
|
||||||
ret = k3_sysctrler_boot_notification_response(msg.buf);
|
ret = k3_sysctrler_boot_notification_response(dev, msg.buf);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
|
@ -158,22 +158,6 @@ int rproc_elf64_sanity_check(ulong addr, ulong size)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Basic function to verify ELF image format */
|
|
||||||
int rproc_elf_sanity_check(ulong addr, ulong size)
|
|
||||||
{
|
|
||||||
Elf32_Ehdr *ehdr = (Elf32_Ehdr *)addr;
|
|
||||||
|
|
||||||
if (!addr) {
|
|
||||||
dev_err(dev, "Invalid firmware address\n");
|
|
||||||
return -EFAULT;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (ehdr->e_ident[EI_CLASS] == ELFCLASS64)
|
|
||||||
return rproc_elf64_sanity_check(addr, size);
|
|
||||||
else
|
|
||||||
return rproc_elf32_sanity_check(addr, size);
|
|
||||||
}
|
|
||||||
|
|
||||||
int rproc_elf32_load_image(struct udevice *dev, unsigned long addr, ulong size)
|
int rproc_elf32_load_image(struct udevice *dev, unsigned long addr, ulong size)
|
||||||
{
|
{
|
||||||
Elf32_Ehdr *ehdr; /* Elf header structure pointer */
|
Elf32_Ehdr *ehdr; /* Elf header structure pointer */
|
||||||
|
@ -165,7 +165,7 @@ static int k3_r5f_lockstep_release(struct k3_r5f_cluster *cluster)
|
|||||||
{
|
{
|
||||||
int ret, c;
|
int ret, c;
|
||||||
|
|
||||||
dev_dbg(dev, "%s\n", __func__);
|
debug("%s\n", __func__);
|
||||||
|
|
||||||
for (c = NR_CORES - 1; c >= 0; c--) {
|
for (c = NR_CORES - 1; c >= 0; c--) {
|
||||||
ret = ti_sci_proc_power_domain_on(&cluster->cores[c]->tsp);
|
ret = ti_sci_proc_power_domain_on(&cluster->cores[c]->tsp);
|
||||||
@ -201,7 +201,7 @@ static int k3_r5f_split_release(struct k3_r5f_core *core)
|
|||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
dev_dbg(dev, "%s\n", __func__);
|
dev_dbg(core->dev, "%s\n", __func__);
|
||||||
|
|
||||||
ret = ti_sci_proc_power_domain_on(&core->tsp);
|
ret = ti_sci_proc_power_domain_on(&core->tsp);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
@ -246,25 +246,29 @@ static int k3_r5f_core_sanity_check(struct k3_r5f_core *core)
|
|||||||
struct k3_r5f_cluster *cluster = core->cluster;
|
struct k3_r5f_cluster *cluster = core->cluster;
|
||||||
|
|
||||||
if (core->in_use) {
|
if (core->in_use) {
|
||||||
dev_err(dev, "Invalid op: Trying to load/start on already running core %d\n",
|
dev_err(core->dev,
|
||||||
|
"Invalid op: Trying to load/start on already running core %d\n",
|
||||||
core->tsp.proc_id);
|
core->tsp.proc_id);
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (cluster->mode == CLUSTER_MODE_LOCKSTEP && !cluster->cores[1]) {
|
if (cluster->mode == CLUSTER_MODE_LOCKSTEP && !cluster->cores[1]) {
|
||||||
printf("Secondary core is not probed in this cluster\n");
|
dev_err(core->dev,
|
||||||
|
"Secondary core is not probed in this cluster\n");
|
||||||
return -EAGAIN;
|
return -EAGAIN;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (cluster->mode == CLUSTER_MODE_LOCKSTEP && !is_primary_core(core)) {
|
if (cluster->mode == CLUSTER_MODE_LOCKSTEP && !is_primary_core(core)) {
|
||||||
dev_err(dev, "Invalid op: Trying to start secondary core %d in lockstep mode\n",
|
dev_err(core->dev,
|
||||||
|
"Invalid op: Trying to start secondary core %d in lockstep mode\n",
|
||||||
core->tsp.proc_id);
|
core->tsp.proc_id);
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (cluster->mode == CLUSTER_MODE_SPLIT && !is_primary_core(core)) {
|
if (cluster->mode == CLUSTER_MODE_SPLIT && !is_primary_core(core)) {
|
||||||
if (!core->cluster->cores[0]->in_use) {
|
if (!core->cluster->cores[0]->in_use) {
|
||||||
dev_err(dev, "Invalid seq: Enable primary core before loading secondary core\n");
|
dev_err(core->dev,
|
||||||
|
"Invalid seq: Enable primary core before loading secondary core\n");
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -432,7 +436,7 @@ static int k3_r5f_split_reset(struct k3_r5f_core *core)
|
|||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
dev_dbg(dev, "%s\n", __func__);
|
dev_dbg(core->dev, "%s\n", __func__);
|
||||||
|
|
||||||
if (reset_assert(&core->reset))
|
if (reset_assert(&core->reset))
|
||||||
ret = -EINVAL;
|
ret = -EINVAL;
|
||||||
@ -447,7 +451,7 @@ static int k3_r5f_lockstep_reset(struct k3_r5f_cluster *cluster)
|
|||||||
{
|
{
|
||||||
int ret = 0, c;
|
int ret = 0, c;
|
||||||
|
|
||||||
dev_dbg(dev, "%s\n", __func__);
|
debug("%s\n", __func__);
|
||||||
|
|
||||||
for (c = 0; c < NR_CORES; c++)
|
for (c = 0; c < NR_CORES; c++)
|
||||||
if (reset_assert(&cluster->cores[c]->reset))
|
if (reset_assert(&cluster->cores[c]->reset))
|
||||||
@ -579,7 +583,7 @@ static int k3_r5f_rproc_configure(struct k3_r5f_core *core)
|
|||||||
u64 boot_vec = 0;
|
u64 boot_vec = 0;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
dev_dbg(dev, "%s\n", __func__);
|
dev_dbg(core->dev, "%s\n", __func__);
|
||||||
|
|
||||||
ret = ti_sci_proc_request(&core->tsp);
|
ret = ti_sci_proc_request(&core->tsp);
|
||||||
if (ret < 0)
|
if (ret < 0)
|
||||||
@ -672,7 +676,7 @@ static int k3_r5f_of_to_priv(struct k3_r5f_core *core)
|
|||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
dev_dbg(dev, "%s\n", __func__);
|
dev_dbg(core->dev, "%s\n", __func__);
|
||||||
|
|
||||||
core->atcm_enable = dev_read_u32_default(core->dev, "atcm-enable", 0);
|
core->atcm_enable = dev_read_u32_default(core->dev, "atcm-enable", 0);
|
||||||
core->btcm_enable = dev_read_u32_default(core->dev, "btcm-enable", 1);
|
core->btcm_enable = dev_read_u32_default(core->dev, "btcm-enable", 1);
|
||||||
|
@ -879,7 +879,7 @@ static int qcom_smem_probe(struct udevice *dev)
|
|||||||
header = smem->regions[0].virt_base;
|
header = smem->regions[0].virt_base;
|
||||||
if (le32_to_cpu(header->initialized) != 1 ||
|
if (le32_to_cpu(header->initialized) != 1 ||
|
||||||
le32_to_cpu(header->reserved)) {
|
le32_to_cpu(header->reserved)) {
|
||||||
dev_err(&pdev->dev, "SMEM is not initialized by SBL\n");
|
dev_err(dev, "SMEM is not initialized by SBL\n");
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -489,19 +489,19 @@ static int sun4i_spi_probe(struct udevice *bus)
|
|||||||
|
|
||||||
ret = clk_get_by_name(bus, "ahb", &priv->clk_ahb);
|
ret = clk_get_by_name(bus, "ahb", &priv->clk_ahb);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to get ahb clock\n");
|
dev_err(bus, "failed to get ahb clock\n");
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = clk_get_by_name(bus, "mod", &priv->clk_mod);
|
ret = clk_get_by_name(bus, "mod", &priv->clk_mod);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to get mod clock\n");
|
dev_err(bus, "failed to get mod clock\n");
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = reset_get_by_index(bus, 0, &priv->reset);
|
ret = reset_get_by_index(bus, 0, &priv->reset);
|
||||||
if (ret && ret != -ENOENT) {
|
if (ret && ret != -ENOENT) {
|
||||||
dev_err(dev, "failed to get reset\n");
|
dev_err(bus, "failed to get reset\n");
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -346,20 +346,20 @@ static int zynqmp_qspi_probe(struct udevice *bus)
|
|||||||
|
|
||||||
ret = clk_get_by_index(bus, 0, &clk);
|
ret = clk_get_by_index(bus, 0, &clk);
|
||||||
if (ret < 0) {
|
if (ret < 0) {
|
||||||
dev_err(dev, "failed to get clock\n");
|
dev_err(bus, "failed to get clock\n");
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
clock = clk_get_rate(&clk);
|
clock = clk_get_rate(&clk);
|
||||||
if (IS_ERR_VALUE(clock)) {
|
if (IS_ERR_VALUE(clock)) {
|
||||||
dev_err(dev, "failed to get rate\n");
|
dev_err(bus, "failed to get rate\n");
|
||||||
return clock;
|
return clock;
|
||||||
}
|
}
|
||||||
debug("%s: CLK %ld\n", __func__, clock);
|
debug("%s: CLK %ld\n", __func__, clock);
|
||||||
|
|
||||||
ret = clk_enable(&clk);
|
ret = clk_enable(&clk);
|
||||||
if (ret && ret != -ENOSYS) {
|
if (ret && ret != -ENOSYS) {
|
||||||
dev_err(dev, "failed to enable clock\n");
|
dev_err(bus, "failed to enable clock\n");
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
plat->frequency = clock;
|
plat->frequency = clock;
|
||||||
|
@ -51,8 +51,7 @@ static int ti_sci_sysreset_request(struct udevice *dev, enum sysreset_t type)
|
|||||||
|
|
||||||
ret = cops->reboot_device(sci);
|
ret = cops->reboot_device(sci);
|
||||||
if (ret)
|
if (ret)
|
||||||
dev_err(rst->dev, "%s: reboot_device failed (%d)\n",
|
dev_err(dev, "%s: reboot_device failed (%d)\n", __func__, ret);
|
||||||
__func__, ret);
|
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
@ -11,8 +11,9 @@
|
|||||||
*/
|
*/
|
||||||
|
|
||||||
#include <cpu_func.h>
|
#include <cpu_func.h>
|
||||||
#include <asm/cache.h>
|
#include <dm.h>
|
||||||
#include <dm/device_compat.h>
|
#include <dm/device_compat.h>
|
||||||
|
#include <asm/cache.h>
|
||||||
#include <linux/bitops.h>
|
#include <linux/bitops.h>
|
||||||
#include <linux/delay.h>
|
#include <linux/delay.h>
|
||||||
#include <linux/usb/composite.h>
|
#include <linux/usb/composite.h>
|
||||||
@ -810,7 +811,7 @@ int cdns3_gadget_ep_set_wedge(struct usb_ep *ep)
|
|||||||
{
|
{
|
||||||
struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
|
struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
|
||||||
|
|
||||||
dev_dbg(priv_dev->dev, "Wedge for %s\n", ep->name);
|
dev_dbg(priv_ep->cdns3_dev->dev, "Wedge for %s\n", ep->name);
|
||||||
cdns3_gadget_ep_set_halt(ep, 1);
|
cdns3_gadget_ep_set_halt(ep, 1);
|
||||||
priv_ep->flags |= EP_WEDGE;
|
priv_ep->flags |= EP_WEDGE;
|
||||||
|
|
||||||
|
@ -2399,8 +2399,7 @@ static void cdns3_gadget_udc_set_speed(struct usb_gadget *gadget,
|
|||||||
case USB_SPEED_SUPER:
|
case USB_SPEED_SUPER:
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
dev_err(cdns->dev, "invalid speed parameter %d\n",
|
dev_err(priv_dev->dev, "invalid speed parameter %d\n", speed);
|
||||||
speed);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
priv_dev->gadget.speed = speed;
|
priv_dev->gadget.speed = speed;
|
||||||
|
@ -592,7 +592,7 @@ static int dwc3_core_init_mode(struct dwc3 *dwc)
|
|||||||
dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_DEVICE);
|
dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_DEVICE);
|
||||||
ret = dwc3_gadget_init(dwc);
|
ret = dwc3_gadget_init(dwc);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to initialize gadget\n");
|
dev_err(dwc->dev, "failed to initialize gadget\n");
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
@ -600,7 +600,7 @@ static int dwc3_core_init_mode(struct dwc3 *dwc)
|
|||||||
dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST);
|
dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST);
|
||||||
ret = dwc3_host_init(dwc);
|
ret = dwc3_host_init(dwc);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to initialize host\n");
|
dev_err(dwc->dev, "failed to initialize host\n");
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
@ -608,18 +608,19 @@ static int dwc3_core_init_mode(struct dwc3 *dwc)
|
|||||||
dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_OTG);
|
dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_OTG);
|
||||||
ret = dwc3_host_init(dwc);
|
ret = dwc3_host_init(dwc);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to initialize host\n");
|
dev_err(dwc->dev, "failed to initialize host\n");
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = dwc3_gadget_init(dwc);
|
ret = dwc3_gadget_init(dwc);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to initialize gadget\n");
|
dev_err(dwc->dev, "failed to initialize gadget\n");
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
dev_err(dev, "Unsupported mode of operation %d\n", dwc->dr_mode);
|
dev_err(dwc->dev,
|
||||||
|
"Unsupported mode of operation %d\n", dwc->dr_mode);
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -768,7 +769,7 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
|
|||||||
|
|
||||||
ret = dwc3_core_init(dwc);
|
ret = dwc3_core_init(dwc);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to initialize core\n");
|
dev_err(dwc->dev, "failed to initialize core\n");
|
||||||
goto err0;
|
goto err0;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -974,7 +975,7 @@ int dwc3_init(struct dwc3 *dwc)
|
|||||||
|
|
||||||
ret = dwc3_core_init(dwc);
|
ret = dwc3_core_init(dwc);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to initialize core\n");
|
dev_err(dwc->dev, "failed to initialize core\n");
|
||||||
goto core_fail;
|
goto core_fail;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -10,7 +10,6 @@
|
|||||||
#include <common.h>
|
#include <common.h>
|
||||||
#include <cpu_func.h>
|
#include <cpu_func.h>
|
||||||
#include <log.h>
|
#include <log.h>
|
||||||
#include <asm-generic/io.h>
|
|
||||||
#include <dm.h>
|
#include <dm.h>
|
||||||
#include <dm/device-internal.h>
|
#include <dm/device-internal.h>
|
||||||
#include <dm/lists.h>
|
#include <dm/lists.h>
|
||||||
|
@ -14,6 +14,7 @@
|
|||||||
*/
|
*/
|
||||||
#include <common.h>
|
#include <common.h>
|
||||||
#include <cpu_func.h>
|
#include <cpu_func.h>
|
||||||
|
#include <dm.h>
|
||||||
#include <dm/device_compat.h>
|
#include <dm/device_compat.h>
|
||||||
#include <linux/bug.h>
|
#include <linux/bug.h>
|
||||||
#include <linux/kernel.h>
|
#include <linux/kernel.h>
|
||||||
|
@ -17,6 +17,7 @@
|
|||||||
#include <cpu_func.h>
|
#include <cpu_func.h>
|
||||||
#include <log.h>
|
#include <log.h>
|
||||||
#include <malloc.h>
|
#include <malloc.h>
|
||||||
|
#include <dm.h>
|
||||||
#include <dm/device_compat.h>
|
#include <dm/device_compat.h>
|
||||||
#include <dm/devres.h>
|
#include <dm/devres.h>
|
||||||
#include <linux/bug.h>
|
#include <linux/bug.h>
|
||||||
@ -633,7 +634,7 @@ static int dwc3_gadget_ep_enable(struct usb_ep *ep,
|
|||||||
strlcat(dep->name, "-int", sizeof(dep->name));
|
strlcat(dep->name, "-int", sizeof(dep->name));
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
dev_err(dwc->dev, "invalid endpoint transfer type\n");
|
dev_err(dep->dwc->dev, "invalid endpoint transfer type\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
spin_lock_irqsave(&dwc->lock, flags);
|
spin_lock_irqsave(&dwc->lock, flags);
|
||||||
@ -708,10 +709,9 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
|
|||||||
{
|
{
|
||||||
struct dwc3_trb *trb;
|
struct dwc3_trb *trb;
|
||||||
|
|
||||||
dev_vdbg(dwc->dev, "%s: req %p dma %08llx length %d%s%s\n",
|
dev_vdbg(dep->dwc->dev, "%s: req %p dma %08llx length %d%s%s\n",
|
||||||
dep->name, req, (unsigned long long) dma,
|
dep->name, req, (unsigned long long)dma,
|
||||||
length, last ? " last" : "",
|
length, last ? " last" : "", chain ? " chain" : "");
|
||||||
chain ? " chain" : "");
|
|
||||||
|
|
||||||
|
|
||||||
trb = &dep->trb_pool[dep->free_slot & DWC3_TRB_MASK];
|
trb = &dep->trb_pool[dep->free_slot & DWC3_TRB_MASK];
|
||||||
@ -1074,21 +1074,22 @@ static int dwc3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request,
|
|||||||
|
|
||||||
spin_lock_irqsave(&dwc->lock, flags);
|
spin_lock_irqsave(&dwc->lock, flags);
|
||||||
if (!dep->endpoint.desc) {
|
if (!dep->endpoint.desc) {
|
||||||
dev_dbg(dwc->dev, "trying to queue request %p to disabled %s\n",
|
dev_dbg(dep->dwc->dev,
|
||||||
request, ep->name);
|
"trying to queue request %p to disabled %s\n", request,
|
||||||
|
ep->name);
|
||||||
ret = -ESHUTDOWN;
|
ret = -ESHUTDOWN;
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (req->dep != dep) {
|
if (req->dep != dep) {
|
||||||
WARN(true, "request %p belongs to '%s'\n",
|
WARN(true, "request %p belongs to '%s'\n", request,
|
||||||
request, req->dep->name);
|
req->dep->name);
|
||||||
ret = -EINVAL;
|
ret = -EINVAL;
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
dev_vdbg(dwc->dev, "queing request %p to %s length %d\n",
|
dev_vdbg(dep->dwc->dev, "queing request %p to %s length %d\n",
|
||||||
request, ep->name, request->length);
|
request, ep->name, request->length);
|
||||||
|
|
||||||
ret = __dwc3_gadget_ep_queue(dep, req);
|
ret = __dwc3_gadget_ep_queue(dep, req);
|
||||||
|
|
||||||
|
@ -129,7 +129,7 @@ static struct usb3_dpll_params *ti_usb3_get_dpll_params(struct ti_usb_phy *phy)
|
|||||||
return &dpll_map->params;
|
return &dpll_map->params;
|
||||||
}
|
}
|
||||||
|
|
||||||
dev_err(phy->dev, "No DPLL configuration for %lu Hz SYS CLK\n", rate);
|
log_err("No DPLL configuration for %lu Hz SYS CLK\n", rate);
|
||||||
|
|
||||||
return NULL;
|
return NULL;
|
||||||
}
|
}
|
||||||
@ -269,7 +269,7 @@ int ti_usb_phy_uboot_init(struct ti_usb_phy_device *dev)
|
|||||||
|
|
||||||
phy = devm_kzalloc(NULL, sizeof(*phy), GFP_KERNEL);
|
phy = devm_kzalloc(NULL, sizeof(*phy), GFP_KERNEL);
|
||||||
if (!phy) {
|
if (!phy) {
|
||||||
dev_err(NULL, "unable to alloc mem for TI USB3 PHY\n");
|
log_err("unable to alloc mem for TI USB3 PHY\n");
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -114,7 +114,8 @@ static void init_fslspclksel(struct dwc2_core_regs *regs)
|
|||||||
* @param regs Programming view of DWC_otg controller.
|
* @param regs Programming view of DWC_otg controller.
|
||||||
* @param num Tx FIFO to flush.
|
* @param num Tx FIFO to flush.
|
||||||
*/
|
*/
|
||||||
static void dwc_otg_flush_tx_fifo(struct dwc2_core_regs *regs, const int num)
|
static void dwc_otg_flush_tx_fifo(struct udevice *dev,
|
||||||
|
struct dwc2_core_regs *regs, const int num)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
@ -134,7 +135,8 @@ static void dwc_otg_flush_tx_fifo(struct dwc2_core_regs *regs, const int num)
|
|||||||
*
|
*
|
||||||
* @param regs Programming view of DWC_otg controller.
|
* @param regs Programming view of DWC_otg controller.
|
||||||
*/
|
*/
|
||||||
static void dwc_otg_flush_rx_fifo(struct dwc2_core_regs *regs)
|
static void dwc_otg_flush_rx_fifo(struct udevice *dev,
|
||||||
|
struct dwc2_core_regs *regs)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
@ -152,7 +154,8 @@ static void dwc_otg_flush_rx_fifo(struct dwc2_core_regs *regs)
|
|||||||
* Do core a soft reset of the core. Be careful with this because it
|
* Do core a soft reset of the core. Be careful with this because it
|
||||||
* resets all the internal state machines of the core.
|
* resets all the internal state machines of the core.
|
||||||
*/
|
*/
|
||||||
static void dwc_otg_core_reset(struct dwc2_core_regs *regs)
|
static void dwc_otg_core_reset(struct udevice *dev,
|
||||||
|
struct dwc2_core_regs *regs)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
@ -284,8 +287,8 @@ static void dwc_otg_core_host_init(struct udevice *dev,
|
|||||||
clrbits_le32(®s->gotgctl, DWC2_GOTGCTL_HSTSETHNPEN);
|
clrbits_le32(®s->gotgctl, DWC2_GOTGCTL_HSTSETHNPEN);
|
||||||
|
|
||||||
/* Make sure the FIFOs are flushed. */
|
/* Make sure the FIFOs are flushed. */
|
||||||
dwc_otg_flush_tx_fifo(regs, 0x10); /* All Tx FIFOs */
|
dwc_otg_flush_tx_fifo(dev, regs, 0x10); /* All Tx FIFOs */
|
||||||
dwc_otg_flush_rx_fifo(regs);
|
dwc_otg_flush_rx_fifo(dev, regs);
|
||||||
|
|
||||||
/* Flush out any leftover queued requests. */
|
/* Flush out any leftover queued requests. */
|
||||||
num_channels = readl(®s->ghwcfg2);
|
num_channels = readl(®s->ghwcfg2);
|
||||||
@ -306,7 +309,7 @@ static void dwc_otg_core_host_init(struct udevice *dev,
|
|||||||
ret = wait_for_bit_le32(®s->hc_regs[i].hcchar,
|
ret = wait_for_bit_le32(®s->hc_regs[i].hcchar,
|
||||||
DWC2_HCCHAR_CHEN, false, 1000, false);
|
DWC2_HCCHAR_CHEN, false, 1000, false);
|
||||||
if (ret)
|
if (ret)
|
||||||
dev_info("%s: Timeout!\n", __func__);
|
dev_info(dev, "%s: Timeout!\n", __func__);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Turn on the vbus power. */
|
/* Turn on the vbus power. */
|
||||||
@ -330,8 +333,9 @@ static void dwc_otg_core_host_init(struct udevice *dev,
|
|||||||
*
|
*
|
||||||
* @param regs Programming view of the DWC_otg controller
|
* @param regs Programming view of the DWC_otg controller
|
||||||
*/
|
*/
|
||||||
static void dwc_otg_core_init(struct dwc2_priv *priv)
|
static void dwc_otg_core_init(struct udevice *dev)
|
||||||
{
|
{
|
||||||
|
struct dwc2_priv *priv = dev_get_priv(dev);
|
||||||
struct dwc2_core_regs *regs = priv->regs;
|
struct dwc2_core_regs *regs = priv->regs;
|
||||||
uint32_t ahbcfg = 0;
|
uint32_t ahbcfg = 0;
|
||||||
uint32_t usbcfg = 0;
|
uint32_t usbcfg = 0;
|
||||||
@ -360,7 +364,7 @@ static void dwc_otg_core_init(struct dwc2_priv *priv)
|
|||||||
writel(usbcfg, ®s->gusbcfg);
|
writel(usbcfg, ®s->gusbcfg);
|
||||||
|
|
||||||
/* Reset the Controller */
|
/* Reset the Controller */
|
||||||
dwc_otg_core_reset(regs);
|
dwc_otg_core_reset(dev, regs);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* This programming sequence needs to happen in FS mode before
|
* This programming sequence needs to happen in FS mode before
|
||||||
@ -372,7 +376,7 @@ static void dwc_otg_core_init(struct dwc2_priv *priv)
|
|||||||
setbits_le32(®s->gusbcfg, DWC2_GUSBCFG_PHYSEL);
|
setbits_le32(®s->gusbcfg, DWC2_GUSBCFG_PHYSEL);
|
||||||
|
|
||||||
/* Reset after a PHY select */
|
/* Reset after a PHY select */
|
||||||
dwc_otg_core_reset(regs);
|
dwc_otg_core_reset(dev, regs);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Program DCFG.DevSpd or HCFG.FSLSPclkSel to 48Mhz in FS.
|
* Program DCFG.DevSpd or HCFG.FSLSPclkSel to 48Mhz in FS.
|
||||||
@ -419,7 +423,7 @@ static void dwc_otg_core_init(struct dwc2_priv *priv)
|
|||||||
writel(usbcfg, ®s->gusbcfg);
|
writel(usbcfg, ®s->gusbcfg);
|
||||||
|
|
||||||
/* Reset after setting the PHY parameters */
|
/* Reset after setting the PHY parameters */
|
||||||
dwc_otg_core_reset(regs);
|
dwc_otg_core_reset(dev, regs);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
usbcfg = readl(®s->gusbcfg);
|
usbcfg = readl(®s->gusbcfg);
|
||||||
@ -1128,7 +1132,12 @@ int _submit_int_msg(struct dwc2_priv *priv, struct usb_device *dev,
|
|||||||
timeout = get_timer(0) + USB_TIMEOUT_MS(pipe);
|
timeout = get_timer(0) + USB_TIMEOUT_MS(pipe);
|
||||||
for (;;) {
|
for (;;) {
|
||||||
if (get_timer(0) > timeout) {
|
if (get_timer(0) > timeout) {
|
||||||
dev_err(dev, "Timeout poll on interrupt endpoint\n");
|
#if CONFIG_IS_ENABLED(DM_USB)
|
||||||
|
dev_err(dev->dev,
|
||||||
|
"Timeout poll on interrupt endpoint\n");
|
||||||
|
#else
|
||||||
|
log_err("Timeout poll on interrupt endpoint\n");
|
||||||
|
#endif
|
||||||
return -ETIMEDOUT;
|
return -ETIMEDOUT;
|
||||||
}
|
}
|
||||||
ret = _submit_bulk_msg(priv, dev, pipe, buffer, len);
|
ret = _submit_bulk_msg(priv, dev, pipe, buffer, len);
|
||||||
@ -1194,7 +1203,7 @@ static int dwc2_init_common(struct udevice *dev, struct dwc2_priv *priv)
|
|||||||
priv->ext_vbus = 0;
|
priv->ext_vbus = 0;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
dwc_otg_core_init(priv);
|
dwc_otg_core_init(dev);
|
||||||
dwc_otg_core_host_init(dev, regs);
|
dwc_otg_core_host_init(dev, regs);
|
||||||
|
|
||||||
clrsetbits_le32(®s->hprt0, DWC2_HPRT0_PRTENA |
|
clrsetbits_le32(®s->hprt0, DWC2_HPRT0_PRTENA |
|
||||||
@ -1320,12 +1329,10 @@ static int dwc2_submit_int_msg(struct udevice *dev, struct usb_device *udev,
|
|||||||
static int dwc2_usb_ofdata_to_platdata(struct udevice *dev)
|
static int dwc2_usb_ofdata_to_platdata(struct udevice *dev)
|
||||||
{
|
{
|
||||||
struct dwc2_priv *priv = dev_get_priv(dev);
|
struct dwc2_priv *priv = dev_get_priv(dev);
|
||||||
fdt_addr_t addr;
|
|
||||||
|
|
||||||
addr = dev_read_addr(dev);
|
priv->regs = dev_read_addr_ptr(dev);
|
||||||
if (addr == FDT_ADDR_T_NONE)
|
if (!priv->regs)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
priv->regs = (struct dwc2_core_regs *)addr;
|
|
||||||
|
|
||||||
priv->oc_disable = dev_read_bool(dev, "disable-over-current");
|
priv->oc_disable = dev_read_bool(dev, "disable-over-current");
|
||||||
priv->hnp_srp_disable = dev_read_bool(dev, "hnp-srp-disable");
|
priv->hnp_srp_disable = dev_read_bool(dev, "hnp-srp-disable");
|
||||||
|
@ -301,21 +301,21 @@ static int sunxi_musb_init(struct musb *musb)
|
|||||||
|
|
||||||
ret = clk_enable(&glue->clk);
|
ret = clk_enable(&glue->clk);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to enable clock\n");
|
dev_err(musb->controller, "failed to enable clock\n");
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (reset_valid(&glue->rst)) {
|
if (reset_valid(&glue->rst)) {
|
||||||
ret = reset_deassert(&glue->rst);
|
ret = reset_deassert(&glue->rst);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "failed to deassert reset\n");
|
dev_err(musb->controller, "failed to deassert reset\n");
|
||||||
goto err_clk;
|
goto err_clk;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = generic_phy_init(&glue->phy);
|
ret = generic_phy_init(&glue->phy);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_dbg(dev, "failed to init USB PHY\n");
|
dev_dbg(musb->controller, "failed to init USB PHY\n");
|
||||||
goto err_rst;
|
goto err_rst;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -352,7 +352,8 @@ static int sunxi_musb_exit(struct musb *musb)
|
|||||||
if (generic_phy_valid(&glue->phy)) {
|
if (generic_phy_valid(&glue->phy)) {
|
||||||
ret = generic_phy_exit(&glue->phy);
|
ret = generic_phy_exit(&glue->phy);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_dbg(dev, "failed to power off usb phy\n");
|
dev_dbg(musb->controller,
|
||||||
|
"failed to power off usb phy\n");
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -314,7 +314,8 @@ static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 hdr_val)
|
|||||||
val, !(val & GEN_CMD_FULL),
|
val, !(val & GEN_CMD_FULL),
|
||||||
CMD_PKT_STATUS_TIMEOUT_US);
|
CMD_PKT_STATUS_TIMEOUT_US);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dsi->dev, "failed to get available command FIFO\n");
|
dev_err(dsi->dsi_host.dev,
|
||||||
|
"failed to get available command FIFO\n");
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -325,7 +326,7 @@ static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 hdr_val)
|
|||||||
val, (val & mask) == mask,
|
val, (val & mask) == mask,
|
||||||
CMD_PKT_STATUS_TIMEOUT_US);
|
CMD_PKT_STATUS_TIMEOUT_US);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dsi->dev, "failed to write command FIFO\n");
|
dev_err(dsi->dsi_host.dev, "failed to write command FIFO\n");
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -357,7 +358,7 @@ static int dw_mipi_dsi_write(struct dw_mipi_dsi *dsi,
|
|||||||
val, !(val & GEN_PLD_W_FULL),
|
val, !(val & GEN_PLD_W_FULL),
|
||||||
CMD_PKT_STATUS_TIMEOUT_US);
|
CMD_PKT_STATUS_TIMEOUT_US);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dsi->dev,
|
dev_err(dsi->dsi_host.dev,
|
||||||
"failed to get available write payload FIFO\n");
|
"failed to get available write payload FIFO\n");
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
@ -380,7 +381,7 @@ static int dw_mipi_dsi_read(struct dw_mipi_dsi *dsi,
|
|||||||
val, !(val & GEN_RD_CMD_BUSY),
|
val, !(val & GEN_RD_CMD_BUSY),
|
||||||
CMD_PKT_STATUS_TIMEOUT_US);
|
CMD_PKT_STATUS_TIMEOUT_US);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dsi->dev, "Timeout during read operation\n");
|
dev_err(dsi->dsi_host.dev, "Timeout during read operation\n");
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -390,7 +391,8 @@ static int dw_mipi_dsi_read(struct dw_mipi_dsi *dsi,
|
|||||||
val, !(val & GEN_PLD_R_EMPTY),
|
val, !(val & GEN_PLD_R_EMPTY),
|
||||||
CMD_PKT_STATUS_TIMEOUT_US);
|
CMD_PKT_STATUS_TIMEOUT_US);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dsi->dev, "Read payload FIFO is empty\n");
|
dev_err(dsi->dsi_host.dev,
|
||||||
|
"Read payload FIFO is empty\n");
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -411,7 +413,7 @@ static ssize_t dw_mipi_dsi_host_transfer(struct mipi_dsi_host *host,
|
|||||||
|
|
||||||
ret = mipi_dsi_create_packet(&packet, msg);
|
ret = mipi_dsi_create_packet(&packet, msg);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dsi->dev, "failed to create packet: %d\n", ret);
|
dev_err(host->dev, "failed to create packet: %d\n", ret);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -702,13 +704,15 @@ static void dw_mipi_dsi_dphy_enable(struct dw_mipi_dsi *dsi)
|
|||||||
ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS, val,
|
ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS, val,
|
||||||
val & PHY_LOCK, PHY_STATUS_TIMEOUT_US);
|
val & PHY_LOCK, PHY_STATUS_TIMEOUT_US);
|
||||||
if (ret)
|
if (ret)
|
||||||
dev_warn(dsi->dev, "failed to wait phy lock state\n");
|
dev_warn(dsi->dsi_host.dev,
|
||||||
|
"failed to wait phy lock state\n");
|
||||||
|
|
||||||
ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
|
ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
|
||||||
val, val & PHY_STOP_STATE_CLK_LANE,
|
val, val & PHY_STOP_STATE_CLK_LANE,
|
||||||
PHY_STATUS_TIMEOUT_US);
|
PHY_STATUS_TIMEOUT_US);
|
||||||
if (ret)
|
if (ret)
|
||||||
dev_warn(dsi->dev, "failed to wait phy clk lane stop state\n");
|
dev_warn(dsi->dsi_host.dev,
|
||||||
|
"failed to wait phy clk lane stop state\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
static void dw_mipi_dsi_clear_err(struct dw_mipi_dsi *dsi)
|
static void dw_mipi_dsi_clear_err(struct dw_mipi_dsi *dsi)
|
||||||
@ -729,7 +733,7 @@ static void dw_mipi_dsi_bridge_set(struct dw_mipi_dsi *dsi,
|
|||||||
ret = phy_ops->get_lane_mbps(dsi->device, timings, device->lanes,
|
ret = phy_ops->get_lane_mbps(dsi->device, timings, device->lanes,
|
||||||
device->format, &dsi->lane_mbps);
|
device->format, &dsi->lane_mbps);
|
||||||
if (ret)
|
if (ret)
|
||||||
dev_warn(dsi->dev, "Phy get_lane_mbps() failed\n");
|
dev_warn(dsi->dsi_host.dev, "Phy get_lane_mbps() failed\n");
|
||||||
|
|
||||||
dw_mipi_dsi_init_pll(dsi);
|
dw_mipi_dsi_init_pll(dsi);
|
||||||
dw_mipi_dsi_dpi_config(dsi, timings);
|
dw_mipi_dsi_dpi_config(dsi, timings);
|
||||||
@ -748,7 +752,7 @@ static void dw_mipi_dsi_bridge_set(struct dw_mipi_dsi *dsi,
|
|||||||
|
|
||||||
ret = phy_ops->init(dsi->device);
|
ret = phy_ops->init(dsi->device);
|
||||||
if (ret)
|
if (ret)
|
||||||
dev_warn(dsi->dev, "Phy init() failed\n");
|
dev_warn(dsi->dsi_host.dev, "Phy init() failed\n");
|
||||||
|
|
||||||
dw_mipi_dsi_dphy_enable(dsi);
|
dw_mipi_dsi_dphy_enable(dsi);
|
||||||
|
|
||||||
|
@ -1,5 +1,6 @@
|
|||||||
/* SPDX-License-Identifier: GPL-2.0+ */
|
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||||
/*
|
/*
|
||||||
|
* Copyright (C) 2020 Sean Anderson <seanga2@gmail.com>
|
||||||
* Copyright (c) 2013 Google, Inc
|
* Copyright (c) 2013 Google, Inc
|
||||||
*
|
*
|
||||||
* (C) Copyright 2012
|
* (C) Copyright 2012
|
||||||
@ -10,6 +11,8 @@
|
|||||||
#ifndef _DM_DEVICE_COMPAT_H
|
#ifndef _DM_DEVICE_COMPAT_H
|
||||||
#define _DM_DEVICE_COMPAT_H
|
#define _DM_DEVICE_COMPAT_H
|
||||||
|
|
||||||
|
#include <log.h>
|
||||||
|
#include <linux/build_bug.h>
|
||||||
#include <linux/compat.h>
|
#include <linux/compat.h>
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@ -33,54 +36,106 @@
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* REVISIT:
|
* Define a new identifier which can be tested on by C code. A similar
|
||||||
* print device name like Linux
|
* definition is made for DEBUG in <log.h>.
|
||||||
*/
|
*/
|
||||||
#define dev_printk(dev, fmt, ...) \
|
#ifdef VERBOSE_DEBUG
|
||||||
({ \
|
#define _VERBOSE_DEBUG 1
|
||||||
printk(fmt, ##__VA_ARGS__); \
|
#else
|
||||||
|
#define _VERBOSE_DEBUG 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* dev_printk_emit() - Emit a formatted log message
|
||||||
|
* @cat: Category of the message
|
||||||
|
* @level: Log level of the message
|
||||||
|
* @fmt: Format string
|
||||||
|
* @...: Arguments for @fmt
|
||||||
|
*
|
||||||
|
* This macro logs a message through the appropriate channel. It is a macro so
|
||||||
|
* the if statements can be optimized out (as @level should be a constant known
|
||||||
|
* at compile-time).
|
||||||
|
*
|
||||||
|
* If DEBUG or VERBOSE_DEBUG is defined, then some messages are always printed
|
||||||
|
* (through printf()). This is to match the historical behavior of the dev_xxx
|
||||||
|
* functions.
|
||||||
|
*
|
||||||
|
* If LOG is enabled, use log() to emit the message, otherwise print it based on
|
||||||
|
* the console loglevel.
|
||||||
|
*/
|
||||||
|
#define dev_printk_emit(cat, level, fmt, ...) \
|
||||||
|
({ \
|
||||||
|
if ((_DEBUG && level == LOGL_DEBUG) || \
|
||||||
|
(_VERBOSE_DEBUG && level == LOGL_DEBUG_CONTENT)) \
|
||||||
|
printf(fmt, ##__VA_ARGS__); \
|
||||||
|
else if (CONFIG_IS_ENABLED(LOG)) \
|
||||||
|
log(cat, level, fmt, ##__VA_ARGS__); \
|
||||||
|
else if (level < CONFIG_VAL(LOGLEVEL)) \
|
||||||
|
printf(fmt, ##__VA_ARGS__); \
|
||||||
})
|
})
|
||||||
|
|
||||||
#define __dev_printk(level, dev, fmt, ...) \
|
/**
|
||||||
({ \
|
* __dev_printk() - Log a message for a device
|
||||||
if (level < CONFIG_VAL(LOGLEVEL)) \
|
* @level: Log level of the message
|
||||||
dev_printk(dev, fmt, ##__VA_ARGS__); \
|
* @dev: A &struct udevice or &struct device
|
||||||
|
* @fmt: Format string
|
||||||
|
* @...: Arguments for @fmt
|
||||||
|
*
|
||||||
|
* This macro formats and prints dev_xxx log messages. It is done as a macro
|
||||||
|
* because working with variadic argument is much easier this way, we can
|
||||||
|
* interrogate the type of device we are passed (and whether it *is* a &struct
|
||||||
|
* udevice or &struct device), and dev_printk_emit() can optimize out unused if
|
||||||
|
* branches.
|
||||||
|
*
|
||||||
|
* Because this is a macro, we must enforce type checks ourselves. Ideally, we
|
||||||
|
* would only accept udevices, but there is a significant amount of code (mostly
|
||||||
|
* USB) which calls dev_xxx with &struct device. When assigning ``__dev``, we
|
||||||
|
* must first cast ``dev`` to ``void *`` so we don't get warned when ``dev`` is
|
||||||
|
* a &struct device. Even though the latter branch is not taken, it will still
|
||||||
|
* get compiled and type-checked.
|
||||||
|
*
|
||||||
|
* The format strings in case of a ``NULL`` ``dev`` MUST be kept the same.
|
||||||
|
* Otherwise, @fmt will be duplicated in the data section (with slightly
|
||||||
|
* different prefixes). This is why ``(NULL udevice *)`` is printed as two
|
||||||
|
* string arguments, and not by string pasting.
|
||||||
|
*/
|
||||||
|
#define __dev_printk(level, dev, fmt, ...) \
|
||||||
|
({ \
|
||||||
|
if (__same_type(dev, struct device *)) { \
|
||||||
|
dev_printk_emit(LOG_CATEGORY, level, fmt, ##__VA_ARGS__); \
|
||||||
|
} else { \
|
||||||
|
BUILD_BUG_ON(!__same_type(dev, struct udevice *)); \
|
||||||
|
struct udevice *__dev = (void *)dev; \
|
||||||
|
if (__dev) \
|
||||||
|
dev_printk_emit(__dev->driver->id, level, \
|
||||||
|
"%s %s: " fmt, \
|
||||||
|
__dev->driver->name, __dev->name, \
|
||||||
|
##__VA_ARGS__); \
|
||||||
|
else \
|
||||||
|
dev_printk_emit(LOG_CATEGORY, level, \
|
||||||
|
"%s %s: " fmt, \
|
||||||
|
"(NULL", "udevice *)", \
|
||||||
|
##__VA_ARGS__); \
|
||||||
|
} \
|
||||||
})
|
})
|
||||||
|
|
||||||
#define dev_emerg(dev, fmt, ...) \
|
#define dev_emerg(dev, fmt, ...) \
|
||||||
__dev_printk(0, dev, fmt, ##__VA_ARGS__)
|
__dev_printk(LOGL_EMERG, dev, fmt, ##__VA_ARGS__)
|
||||||
#define dev_alert(dev, fmt, ...) \
|
#define dev_alert(dev, fmt, ...) \
|
||||||
__dev_printk(1, dev, fmt, ##__VA_ARGS__)
|
__dev_printk(LOGL_ALERT, dev, fmt, ##__VA_ARGS__)
|
||||||
#define dev_crit(dev, fmt, ...) \
|
#define dev_crit(dev, fmt, ...) \
|
||||||
__dev_printk(2, dev, fmt, ##__VA_ARGS__)
|
__dev_printk(LOGL_CRIT, dev, fmt, ##__VA_ARGS__)
|
||||||
#define dev_err(dev, fmt, ...) \
|
#define dev_err(dev, fmt, ...) \
|
||||||
__dev_printk(3, dev, fmt, ##__VA_ARGS__)
|
__dev_printk(LOGL_ERR, dev, fmt, ##__VA_ARGS__)
|
||||||
#define dev_warn(dev, fmt, ...) \
|
#define dev_warn(dev, fmt, ...) \
|
||||||
__dev_printk(4, dev, fmt, ##__VA_ARGS__)
|
__dev_printk(LOGL_WARNING, dev, fmt, ##__VA_ARGS__)
|
||||||
#define dev_notice(dev, fmt, ...) \
|
#define dev_notice(dev, fmt, ...) \
|
||||||
__dev_printk(5, dev, fmt, ##__VA_ARGS__)
|
__dev_printk(LOGL_NOTICE, dev, fmt, ##__VA_ARGS__)
|
||||||
#define dev_info(dev, fmt, ...) \
|
#define dev_info(dev, fmt, ...) \
|
||||||
__dev_printk(6, dev, fmt, ##__VA_ARGS__)
|
__dev_printk(LOGL_INFO, dev, fmt, ##__VA_ARGS__)
|
||||||
|
|
||||||
#ifdef DEBUG
|
|
||||||
#define dev_dbg(dev, fmt, ...) \
|
#define dev_dbg(dev, fmt, ...) \
|
||||||
__dev_printk(7, dev, fmt, ##__VA_ARGS__)
|
__dev_printk(LOGL_DEBUG, dev, fmt, ##__VA_ARGS__)
|
||||||
#else
|
#define dev_vdbg(dev, fmt, ...) \
|
||||||
#define dev_dbg(dev, fmt, ...) \
|
__dev_printk(LOGL_DEBUG_CONTENT, dev, fmt, ##__VA_ARGS__)
|
||||||
({ \
|
|
||||||
if (0) \
|
|
||||||
__dev_printk(7, dev, fmt, ##__VA_ARGS__); \
|
|
||||||
})
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef VERBOSE_DEBUG
|
|
||||||
#define dev_vdbg dev_dbg
|
|
||||||
#else
|
|
||||||
#define dev_vdbg(dev, fmt, ...) \
|
|
||||||
({ \
|
|
||||||
if (0) \
|
|
||||||
__dev_printk(7, dev, fmt, ##__VA_ARGS__); \
|
|
||||||
})
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
@ -52,25 +52,6 @@ extern struct p_current *current;
|
|||||||
#define dev_warn(dev, fmt, args...) \
|
#define dev_warn(dev, fmt, args...) \
|
||||||
printf(fmt, ##args)
|
printf(fmt, ##args)
|
||||||
|
|
||||||
#define netdev_emerg(dev, fmt, args...) \
|
|
||||||
printf(fmt, ##args)
|
|
||||||
#define netdev_alert(dev, fmt, args...) \
|
|
||||||
printf(fmt, ##args)
|
|
||||||
#define netdev_crit(dev, fmt, args...) \
|
|
||||||
printf(fmt, ##args)
|
|
||||||
#define netdev_err(dev, fmt, args...) \
|
|
||||||
printf(fmt, ##args)
|
|
||||||
#define netdev_warn(dev, fmt, args...) \
|
|
||||||
printf(fmt, ##args)
|
|
||||||
#define netdev_notice(dev, fmt, args...) \
|
|
||||||
printf(fmt, ##args)
|
|
||||||
#define netdev_info(dev, fmt, args...) \
|
|
||||||
printf(fmt, ##args)
|
|
||||||
#define netdev_dbg(dev, fmt, args...) \
|
|
||||||
debug(fmt, ##args)
|
|
||||||
#define netdev_vdbg(dev, fmt, args...) \
|
|
||||||
debug(fmt, ##args)
|
|
||||||
|
|
||||||
#define GFP_ATOMIC ((gfp_t) 0)
|
#define GFP_ATOMIC ((gfp_t) 0)
|
||||||
#define GFP_KERNEL ((gfp_t) 0)
|
#define GFP_KERNEL ((gfp_t) 0)
|
||||||
#define GFP_NOFS ((gfp_t) 0)
|
#define GFP_NOFS ((gfp_t) 0)
|
||||||
|
@ -888,6 +888,8 @@ void mmc_set_preinit(struct mmc *mmc, int preinit);
|
|||||||
#define mmc_host_is_spi(mmc) 0
|
#define mmc_host_is_spi(mmc) 0
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#define mmc_dev(x) ((x)->dev)
|
||||||
|
|
||||||
void board_mmc_power_init(void);
|
void board_mmc_power_init(void);
|
||||||
int board_mmc_init(struct bd_info *bis);
|
int board_mmc_init(struct bd_info *bis);
|
||||||
int cpu_mmc_init(struct bd_info *bis);
|
int cpu_mmc_init(struct bd_info *bis);
|
||||||
|
@ -226,19 +226,6 @@ int rproc_elf32_sanity_check(ulong addr, ulong size);
|
|||||||
*/
|
*/
|
||||||
int rproc_elf64_sanity_check(ulong addr, ulong size);
|
int rproc_elf64_sanity_check(ulong addr, ulong size);
|
||||||
|
|
||||||
/**
|
|
||||||
* rproc_elf_sanity_check() - Verify if an image is a valid ELF one
|
|
||||||
*
|
|
||||||
* Check if a valid ELF image exists at the given memory location. Auto
|
|
||||||
* detects ELF32/ELF64 and verifies basic ELF64/ELF32 format requirements
|
|
||||||
* like magic number and sections size.
|
|
||||||
*
|
|
||||||
* @addr: address of the image to verify
|
|
||||||
* @size: size of the image
|
|
||||||
* @return 0 if the image looks good, else appropriate error value.
|
|
||||||
*/
|
|
||||||
int rproc_elf_sanity_check(ulong addr, ulong size);
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* rproc_elf32_load_image() - load an ELF32 image
|
* rproc_elf32_load_image() - load an ELF32 image
|
||||||
* @dev: device loading the ELF32 image
|
* @dev: device loading the ELF32 image
|
||||||
|
@ -145,7 +145,7 @@ static struct phy_device *dm_eth_connect_phy_handle(struct udevice *ethdev,
|
|||||||
break;
|
break;
|
||||||
|
|
||||||
if (!ofnode_valid(phandle.node)) {
|
if (!ofnode_valid(phandle.node)) {
|
||||||
dev_dbg(dev, "can't find PHY node\n");
|
dev_dbg(ethdev, "can't find PHY node\n");
|
||||||
return NULL;
|
return NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -161,7 +161,7 @@ static struct phy_device *dm_eth_connect_phy_handle(struct udevice *ethdev,
|
|||||||
if (uclass_get_device_by_ofnode(UCLASS_MDIO,
|
if (uclass_get_device_by_ofnode(UCLASS_MDIO,
|
||||||
ofnode_get_parent(phandle.node),
|
ofnode_get_parent(phandle.node),
|
||||||
&mdiodev)) {
|
&mdiodev)) {
|
||||||
dev_dbg(dev, "can't find MDIO bus for node %s\n",
|
dev_dbg(ethdev, "can't find MDIO bus for node %s\n",
|
||||||
ofnode_get_name(ofnode_get_parent(phandle.node)));
|
ofnode_get_name(ofnode_get_parent(phandle.node)));
|
||||||
return NULL;
|
return NULL;
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user