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Fixes for 2020.07 

-----------------
 
 Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/701059103
 
 - Fixes for atheros und cubox
 - Toradex: mostly environment
 - i.MX7: DDR fixes
 - switch to DM
 - sabrelite : fix MMC access
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Merge tag 'u-boot-imx-20200623' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Fixes for 2020.07
-----------------

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/701059103

- Fixes for atheros and cubox
- Toradex: mostly environment
- i.MX7: DDR fixes
- switch to DM
- sabrelite : fix MMC access
This commit is contained in:
Tom Rini 2020-06-23 08:20:55 -04:00
parent 7635defaf2 824e6fe0ae
commit 4ff63383e3
49 changed files with 222 additions and 435 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/Kconfig
View File

@ -873,11 +873,11 @@ config ARCH_MX7ULP
config ARCH_MX7
bool "Freescale MX7"
select ARCH_MISC_INIT
select BOARD_EARLY_INIT_F
select CPU_V7A
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
imply BOARD_EARLY_INIT_F
imply MXC_GPIO
imply SYS_THUMB_BUILD

15
arch/arm/dts/fsl-imx8qm.dtsi
View File

@ -21,13 +21,14 @@
aliases {
ethernet0 = &fec1;
ethernet1 = &fec2;
gpio0 = &gpio1;
gpio1 = &gpio2;
gpio2 = &gpio3;
gpio3 = &gpio4;
gpio4 = &gpio5;
gpio5 = &gpio6;
gpio6 = &gpio7;
gpio0 = &gpio0;
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
gpio4 = &gpio4;
gpio5 = &gpio5;
gpio6 = &gpio6;
gpio7 = &gpio7;
serial0 = &lpuart0;
serial1 = &lpuart1;
serial2 = &lpuart2;

8
arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi
View File

@ -34,3 +34,11 @@
&usdhc1 {
status = "disabled";
};
&usdhc2 {
u-boot,dm-pre-reloc;
};
&usdhc3 {
u-boot,dm-pre-reloc;
};

2
arch/arm/dts/imx6qdl-sabreauto.dtsi
View File

@ -281,7 +281,7 @@
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
fsl,err006687-workaround-present;

2
arch/arm/dts/imx6qdl-sabresd.dtsi
View File

@ -204,7 +204,7 @@
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
status = "okay";
};

11
arch/arm/dts/imx6qdl-sr-som.dtsi
View File

@ -53,10 +53,21 @@
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
phy-handle = <&phy>;
phy-mode = "rgmii-id";
phy-reset-duration = <2>;
phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy: ethernet-phy@0 {
reg = <0>;
qca,clk-out-frequency = <125000000>;
};
};
};
&iomuxc {

4
arch/arm/include/asm/arch-mx7/mx7-ddr.h
View File

@ -39,7 +39,9 @@ struct ddrc {
u32 dramtmg8; /* 0x0120 */
u32 reserved7[0x17];
u32 zqctl0; /* 0x0180 */
u32 reserved8[0x03];
u32 zqctl1; /* 0x0184 */
u32 zqctl2; /* 0x0188 */
u32 zqstat; /* 0x018c */
u32 dfitmg0; /* 0x0190 */
u32 dfitmg1; /* 0x0194 */
u32 reserved9[0x02];

7
arch/arm/mach-imx/mx7/Kconfig
View File

@ -16,6 +16,13 @@ config MX7D
select ROM_UNIFIED_SECTIONS
imply CMD_FUSE
config SYS_TEXT_BASE
default 0x87800000
config SPL_TEXT_BASE
depends on SPL
default 0x00912000
choice
prompt "MX7 board select"
optional

1
arch/arm/mach-imx/mx7/ddr.c
View File

@ -74,6 +74,7 @@ void mx7_dram_cfg(struct ddrc *ddrc_regs_val, struct ddrc_mp *ddrc_mp_val,
writel(ddrc_regs_val->dramtmg5, &ddrc_regs->dramtmg5);
writel(ddrc_regs_val->dramtmg8, &ddrc_regs->dramtmg8);
writel(ddrc_regs_val->zqctl0, &ddrc_regs->zqctl0);
writel(ddrc_regs_val->zqctl1, &ddrc_regs->zqctl1);
writel(ddrc_regs_val->dfitmg0, &ddrc_regs->dfitmg0);
writel(ddrc_regs_val->dfitmg1, &ddrc_regs->dfitmg1);
writel(ddrc_regs_val->dfiupd0, &ddrc_regs->dfiupd0);

11
board/advantech/imx8qm_rom7720_a1/README
View File

@ -29,6 +29,17 @@ $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin
$ chmod +x firmware-imx-8.0.bin
$ ./firmware-imx-8.0.bin
Or use this to avoid running random scripts from the internet,
but note that you must agree to the license the script displays:
$ dd if=imx-sc-firmware-1.1.bin of=imx-sc-firmware-1.1.tar.bz2 bs=37185 skip=1
$ tar -xf imx-sc-firmware-1.1.tar.bz2
$ cp imx-sc-firmware-1.1/mx8qm-val-scfw-tcm.bin $(builddir)
$ dd if=firmware-imx-8.0.bin of=firmware-imx-8.0.tar.bz2 bs=37180 skip=1
$ tar -xf firmware-imx-8.0.tar.bz2
$ cp firmware-imx-8.0/firmware/seco/mx8qm-ahab-container.img $(builddir)
Build U-Boot
============

72
board/boundary/nitrogen6x/nitrogen6x.c
View File

@ -25,7 +25,6 @@
#include <asm/mach-imx/spi.h>
#include <asm/mach-imx/boot_mode.h>
#include <asm/mach-imx/video.h>
#include <mmc.h>
#include <fsl_esdhc_imx.h>
#include <micrel.h>
#include <miiphy.h>
@ -161,26 +160,6 @@ static iomux_v3_cfg_t const usdhc2_pads[] = {
IOMUX_PAD_CTRL(SD2_DAT3__SD2_DATA3, USDHC_PAD_CTRL),
};
static iomux_v3_cfg_t const usdhc3_pads[] = {
IOMUX_PAD_CTRL(SD3_CLK__SD3_CLK, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD3_CMD__SD3_CMD, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD3_DAT0__SD3_DATA0, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD3_DAT1__SD3_DATA1, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD3_DAT2__SD3_DATA2, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD3_DAT3__SD3_DATA3, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD3_DAT5__GPIO7_IO00, NO_PAD_CTRL), /* CD */
};
static iomux_v3_cfg_t const usdhc4_pads[] = {
IOMUX_PAD_CTRL(SD4_CLK__SD4_CLK, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD4_CMD__SD4_CMD, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD4_DAT0__SD4_DATA0, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD4_DAT1__SD4_DATA1, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD4_DAT2__SD4_DATA2, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(SD4_DAT3__SD4_DATA3, USDHC_PAD_CTRL),
IOMUX_PAD_CTRL(NANDF_D6__GPIO2_IO06, NO_PAD_CTRL), /* CD */
};
static iomux_v3_cfg_t const enet_pads1[] = {
IOMUX_PAD_CTRL(ENET_MDIO__ENET_MDIO, ENET_PAD_CTRL),
IOMUX_PAD_CTRL(ENET_MDC__ENET_MDC, ENET_PAD_CTRL),
@ -305,57 +284,6 @@ int board_ehci_power(int port, int on)
#endif
#ifdef CONFIG_FSL_ESDHC_IMX
static struct fsl_esdhc_cfg usdhc_cfg[2] = {
{USDHC3_BASE_ADDR},
{USDHC4_BASE_ADDR},
};
int board_mmc_getcd(struct mmc *mmc)
{
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
int gp_cd = (cfg->esdhc_base == USDHC3_BASE_ADDR) ? IMX_GPIO_NR(7, 0) :
IMX_GPIO_NR(2, 6);
gpio_direction_input(gp_cd);
return !gpio_get_value(gp_cd);
}
int board_mmc_init(bd_t *bis)
{
int ret;
u32 index = 0;
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
usdhc_cfg[0].max_bus_width = 4;
usdhc_cfg[1].max_bus_width = 4;
for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
switch (index) {
case 0:
SETUP_IOMUX_PADS(usdhc3_pads);
break;
case 1:
SETUP_IOMUX_PADS(usdhc4_pads);
break;
default:
printf("Warning: you configured more USDHC controllers"
"(%d) then supported by the board (%d)\n",
index + 1, CONFIG_SYS_FSL_USDHC_NUM);
return -EINVAL;
}
ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
if (ret)
return ret;
}
return 0;
}
#endif
#ifdef CONFIG_MXC_SPI
int board_spi_cs_gpio(unsigned bus, unsigned cs)
{

4
board/dhelectronics/dh_imx6/dh_imx6.c
View File

@ -142,8 +142,6 @@ int board_init(void)
/* Enable eim_slow clocks */
setbits_le32(&mxc_ccm->CCGR6, 0x1 << MXC_CCM_CCGR6_EMI_SLOW_OFFSET);
setup_dhcom_mac_from_fuse();
setup_fec_clock();
return 0;
@ -189,6 +187,8 @@ int board_late_init(void)
u32 hw_code;
char buf[16];
setup_dhcom_mac_from_fuse();
hw_code = board_get_hwcode();
switch (get_cpu_type()) {

247
board/solidrun/mx6cuboxi/mx6cuboxi.c
View File

@ -17,7 +17,6 @@
#include <image.h>
#include <init.h>
#include <log.h>
#include <net.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
@ -33,8 +32,6 @@
#include <mmc.h>
#include <fsl_esdhc_imx.h>
#include <malloc.h>
#include <miiphy.h>
#include <netdev.h>
#include <asm/arch/crm_regs.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
@ -52,16 +49,6 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
PAD_CTL_SRE_FAST | PAD_CTL_HYS)
#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
#define ENET_PAD_CTRL_PD (PAD_CTL_PUS_100K_DOWN | \
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
#define ENET_PAD_CTRL_CLK ((PAD_CTL_PUS_100K_UP & ~PAD_CTL_PKE) | \
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
#define ETH_PHY_RESET IMX_GPIO_NR(4, 15)
#define USB_H1_VBUS IMX_GPIO_NR(1, 0)
enum board_type {
@ -167,180 +154,11 @@ static void setup_iomux_uart(void)
SETUP_IOMUX_PADS(uart1_pads);
}
static struct fsl_esdhc_cfg usdhc_cfg = {
.esdhc_base = USDHC2_BASE_ADDR,
.max_bus_width = 4,
};
static struct fsl_esdhc_cfg emmc_cfg = {
.esdhc_base = USDHC3_BASE_ADDR,
.max_bus_width = 8,
};
int board_mmc_get_env_dev(int devno)
{
return devno;
}
#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4)
int board_mmc_getcd(struct mmc *mmc)
{
struct fsl_esdhc_cfg *cfg = mmc->priv;
int ret = 0;
switch (cfg->esdhc_base) {
case USDHC2_BASE_ADDR:
ret = !gpio_get_value(USDHC2_CD_GPIO);
break;
case USDHC3_BASE_ADDR:
ret = (mmc_get_op_cond(mmc) < 0) ? 0 : 1; /* eMMC/uSDHC3 has no CD GPIO */
break;
}
return ret;
}
static int mmc_init_spl(bd_t *bis)
{
struct src *psrc = (struct src *)SRC_BASE_ADDR;
unsigned reg = readl(&psrc->sbmr1) >> 11;
/*
* Upon reading BOOT_CFG register the following map is done:
* Bit 11 and 12 of BOOT_CFG register can determine the current
* mmc port
* 0x1 SD2
* 0x2 SD3
*/
switch (reg & 0x3) {
case 0x1:
SETUP_IOMUX_PADS(usdhc2_pads);
usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
gd->arch.sdhc_clk = usdhc_cfg.sdhc_clk;
return fsl_esdhc_initialize(bis, &usdhc_cfg);
case 0x2:
SETUP_IOMUX_PADS(usdhc3_pads);
emmc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
gd->arch.sdhc_clk = emmc_cfg.sdhc_clk;
return fsl_esdhc_initialize(bis, &emmc_cfg);
}
return -ENODEV;
}
int board_mmc_init(bd_t *bis)
{
if (IS_ENABLED(CONFIG_SPL_BUILD))
return mmc_init_spl(bis);
return 0;
}
static iomux_v3_cfg_t const enet_pads[] = {
IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)),
IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
/* AR8035 reset */
IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD)),
/* AR8035 interrupt */
IOMUX_PADS(PAD_DI0_PIN2__GPIO4_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL)),
/* GPIO16 -> AR8035 25MHz */
IOMUX_PADS(PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(NO_PAD_CTRL)),
IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(NO_PAD_CTRL)),
IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)),
/* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL_CLK)),
IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD)),
IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD)),
IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL_PD)),
IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD)),
IOMUX_PADS(PAD_ENET_RXD1__GPIO1_IO26 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD)),
};
static void setup_iomux_enet(void)
{
struct gpio_desc desc;
int ret;
SETUP_IOMUX_PADS(enet_pads);
ret = dm_gpio_lookup_name("GPIO4_15", &desc);
if (ret) {
printf("%s: phy reset lookup failed\n", __func__);
return;
}
ret = dm_gpio_request(&desc, "phy-reset");
if (ret) {
printf("%s: phy reset request failed\n", __func__);
return;
}
gpio_direction_output(ETH_PHY_RESET, 0);
mdelay(10);
gpio_set_value(ETH_PHY_RESET, 1);
udelay(100);
gpio_free_list_nodev(&desc, 1);
}
int board_phy_config(struct phy_device *phydev)
{
if (phydev->drv->config)
phydev->drv->config(phydev);
return 0;
}
/* On Cuboxi Ethernet PHY can be located at addresses 0x0 or 0x4 */
#define ETH_PHY_MASK ((1 << 0x0) | (1 << 0x4))
int board_eth_init(bd_t *bis)
{
struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
struct mii_dev *bus;
struct phy_device *phydev;
int ret = enable_fec_anatop_clock(0, ENET_25MHZ);
if (ret)
return ret;
/* set gpr1[ENET_CLK_SEL] */
setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK);
setup_iomux_enet();
bus = fec_get_miibus(IMX_FEC_BASE, -1);
if (!bus)
return -EINVAL;
phydev = phy_find_by_mask(bus, ETH_PHY_MASK, PHY_INTERFACE_MODE_RGMII);
if (!phydev) {
ret = -EINVAL;
goto free_bus;
}
debug("using phy at address %d\n", phydev->addr);
ret = fec_probe(bis, -1, IMX_FEC_BASE, bus, phydev);
if (ret)
goto free_phydev;
return 0;
free_phydev:
free(phydev);
free_bus:
free(bus);
return ret;
}
#ifdef CONFIG_VIDEO_IPUV3
static void do_enable_hdmi(struct display_info_t const *dev)
{
@ -433,6 +251,21 @@ static int setup_display(void)
}
#endif /* CONFIG_VIDEO_IPUV3 */
static int setup_fec(void)
{
struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
int ret;
ret = enable_fec_anatop_clock(0, ENET_25MHZ);
if (ret)
return ret;
/* set gpr1[ENET_CLK_SEL] */
setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK);
return 0;
}
int board_early_init_f(void)
{
setup_iomux_uart();
@ -440,6 +273,8 @@ int board_early_init_f(void)
#ifdef CONFIG_CMD_SATA
setup_sata();
#endif
setup_fec();
return 0;
}
@ -629,6 +464,54 @@ int board_fit_config_name_match(const char *name)
return strcmp(name, tmp_name);
}
void board_boot_order(u32 *spl_boot_list)
{
struct src *psrc = (struct src *)SRC_BASE_ADDR;
unsigned int reg = readl(&psrc->sbmr1) >> 11;
u32 boot_mode = imx6_src_get_boot_mode() & IMX6_BMODE_MASK;
unsigned int bmode = readl(&src_base->sbmr2);
/* If bmode is serial or USB phy is active, return serial */
if (((bmode >> 24) & 0x03) == 0x01 || is_usbotg_phy_active()) {
spl_boot_list[0] = BOOT_DEVICE_BOARD;
return;
}
switch (boot_mode >> IMX6_BMODE_SHIFT) {
case IMX6_BMODE_SD:
case IMX6_BMODE_ESD:
case IMX6_BMODE_MMC:
case IMX6_BMODE_EMMC:
/*
* Upon reading BOOT_CFG register the following map is done:
* Bit 11 and 12 of BOOT_CFG register can determine the current
* mmc port
* 0x1 SD2
* 0x2 SD3
*/
reg &= 0x3; /* Only care about bottom 2 bits */
switch (reg) {
case 1:
SETUP_IOMUX_PADS(usdhc2_pads);
spl_boot_list[0] = BOOT_DEVICE_MMC1;
break;
case 2:
SETUP_IOMUX_PADS(usdhc3_pads);
spl_boot_list[0] = BOOT_DEVICE_MMC2;
break;
}
break;
default:
/* By default use USB downloader */
spl_boot_list[0] = BOOT_DEVICE_BOARD;
break;
}
/* As a last resort, use serial downloader */
spl_boot_list[1] = BOOT_DEVICE_BOARD;
}
#ifdef CONFIG_SPL_BUILD
#include <asm/arch/mx6-ddr.h>
static const struct mx6dq_iomux_ddr_regs mx6q_ddr_ioregs = {

10
board/wandboard/README
View File

@ -37,3 +37,13 @@ as the mx6 processor)
- Connect the serial cable to the host PC
- Power up the board and U-Boot messages will appear in the serial console.
Debug UART
----------
The following settings provide a debug UART for the Wandboard:
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_MXC=y
CONFIG_DEBUG_UART_BASE=0x02020000
CONFIG_DEBUG_UART_CLOCK=80000000

2
configs/apalis-imx8qm_defconfig
View File

@ -9,6 +9,7 @@ CONFIG_TARGET_APALIS_IMX8=y
CONFIG_NR_DRAM_BANKS=3
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/apalis-imx8/apalis-imx8qm-imximage.cfg"
CONFIG_LOG=y
CONFIG_VERSION_VARIABLE=y
@ -61,4 +62,5 @@ CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_SCU_THERMAL=y
# CONFIG_EFI_LOADER is not set

2
configs/apalis-tk1_defconfig
View File

@ -11,7 +11,7 @@ CONFIG_SPL_TEXT_BASE=0x80108000
CONFIG_FIT=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run emmcboot; setenv fdtfile ${soc}-${fdt-module}-${fdt_board}.dtb && run distro_bootcmd"
CONFIG_BOOTCOMMAND="setenv fdtfile ${soc}-${fdt_module}-${fdt_board}.dtb && run distro_bootcmd"
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_VERSION_VARIABLE=y

3
configs/apalis_imx6_defconfig
View File

@ -53,6 +53,7 @@ CONFIG_CMD_USB_SDP=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_BMP=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_PMIC=y
@ -65,6 +66,8 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_DWC_AHSATA=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
CONFIG_SUPPORT_EMMC_BOOT=y

2
configs/cl-som-imx7_defconfig
View File

@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@ -17,7 +16,6 @@ CONFIG_SPL_SPI_SUPPORT=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_TEXT_BASE=0x00911000
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_SPI_BOOT=y
CONFIG_BOOTDELAY=3

3
configs/colibri-imx6ull_defconfig
View File

@ -40,6 +40,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_USB_SDP=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_BMP=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_MTDPARTS=y
@ -54,6 +55,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_DFU_NAND=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y

1
configs/colibri-imx8qxp_defconfig
View File

@ -59,4 +59,5 @@ CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_SCU_THERMAL=y
# CONFIG_EFI_LOADER is not set

3
configs/colibri_imx6_defconfig
View File

@ -52,6 +52,7 @@ CONFIG_CMD_USB_SDP=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_BMP=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_UUID=y
@ -64,6 +65,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
CONFIG_SUPPORT_EMMC_BOOT=y

3
configs/colibri_imx7_defconfig
View File

@ -40,6 +40,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_BOOTP_PXE is not set
CONFIG_CMD_BMP=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y
# CONFIG_CMD_HASH is not set
CONFIG_CMD_MTDPARTS=y
@ -54,6 +55,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_FSL_CAAM=y
CONFIG_DFU_NAND=y
CONFIG_DM_I2C=y

3
configs/colibri_imx7_emmc_defconfig
View File

@ -38,6 +38,7 @@ CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_BMP=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y
# CONFIG_CMD_HASH is not set
# CONFIG_ISO_PARTITION is not set
@ -48,6 +49,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_FSL_CAAM=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x82000000

3
configs/colibri_vf_defconfig
View File

@ -18,8 +18,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="Colibri VFxx # "
# CONFIG_CMD_BOOTD is not set
@ -39,6 +37,7 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set

6
configs/mx6cuboxi_defconfig
View File

@ -25,6 +25,7 @@ CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="if hdmidet; then usb start; setenv stdin serial,usbkbd; setenv stdout serial,vga; setenv stderr serial,vga; else setenv stdin serial; setenv stdout serial; setenv stderr serial; fi;"
CONFIG_BOUNCE_BUFFER=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
@ -37,6 +38,7 @@ CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-hummingboard2-emmc-som-v15"
CONFIG_OF_LIST="imx6dl-hummingboard2-emmc-som-v15 imx6q-hummingboard2-emmc-som-v15"
CONFIG_MULTI_DTB_FIT=y
@ -45,11 +47,15 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_DWC_AHSATA=y
CONFIG_DM_MMC=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
CONFIG_DM_ETH=y
CONFIG_FEC_MXC=y
CONFIG_RGMII=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y

3
configs/mx6qsabrelite_defconfig
View File

@ -28,6 +28,7 @@ CONFIG_CMD_GPT=y
# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_PINMUX is not set
CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
@ -55,6 +56,8 @@ CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXC_SPI=y

3
configs/mx6slevk_spinor_defconfig
View File

@ -44,6 +44,9 @@ CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_DM_ETH=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y

3
configs/mx6slevk_spl_defconfig
View File

@ -52,6 +52,9 @@ CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
CONFIG_DM_ETH=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y

13
configs/mx6ul_14x14_evk_defconfig
View File

@ -5,7 +5,7 @@ CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x80000
CONFIG_ENV_OFFSET=0xC0000
CONFIG_TARGET_MX6UL_14X14_EVK=y
CONFIG_DM_GPIO=y
CONFIG_SPL_MMC_SUPPORT=y
@ -22,6 +22,9 @@ CONFIG_BOUNCE_BUFFER=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_USB_HOST_SUPPORT=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
@ -32,6 +35,8 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_SDP=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_BMP=y
@ -46,6 +51,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6ul-14x14-evk"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_DM_74X164=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
@ -73,5 +79,10 @@ CONFIG_SOFT_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="FSL"
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_CI_UDC=y
CONFIG_DM_VIDEO=y
CONFIG_SYS_WHITE_ON_BLACK=y

6
configs/mx6ull_14x14_evk_plugin_defconfig
View File

@ -41,6 +41,12 @@ CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=40000000
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ8XXX=y
CONFIG_DM_ETH=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_REGULATOR=y

2
configs/pico-dwarf-imx7d_defconfig
View File

@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@ -15,7 +14,6 @@ CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_TEXT_BASE=0x00911000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"

2
configs/pico-hobbit-imx7d_defconfig
View File

@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@ -15,7 +14,6 @@ CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_TEXT_BASE=0x00911000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"

2
configs/pico-imx7d_defconfig
View File

@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@ -15,7 +14,6 @@ CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_TEXT_BASE=0x00911000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"

2
configs/pico-nymph-imx7d_defconfig
View File

@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@ -15,7 +14,6 @@ CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_TEXT_BASE=0x00911000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"

2
configs/pico-pi-imx7d_defconfig
View File

@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_MX7=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@ -15,7 +14,6 @@ CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_TEXT_BASE=0x00911000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"

1
configs/wandboard_defconfig
View File

@ -67,6 +67,7 @@ CONFIG_PINCTRL_IMX6=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_PFUZE100=y
CONFIG_DM_SCSI=y
CONFIG_MXC_UART=y
CONFIG_DM_THERMAL=y
CONFIG_USB=y
CONFIG_DM_USB=y

5
drivers/gpio/mxc_gpio.c
View File

@ -281,7 +281,10 @@ static int mxc_gpio_probe(struct udevice *dev)
char name[18], *str;
banknum = plat->bank_index;
sprintf(name, "GPIO%d_", banknum + 1);
if (IS_ENABLED(CONFIG_ARCH_IMX8))
sprintf(name, "GPIO%d_", banknum);
else
sprintf(name, "GPIO%d_", banknum + 1);
str = strdup(name);
if (!str)
return -ENOMEM;

7
drivers/net/fec_mxc.c
View File

@ -1294,7 +1294,7 @@ static const struct eth_ops fecmxc_ops = {
.read_rom_hwaddr = fecmxc_read_rom_hwaddr,
};
static int device_get_phy_addr(struct udevice *dev)
static int device_get_phy_addr(struct fec_priv *priv, struct udevice *dev)
{
struct ofnode_phandle_args phandle_args;
int reg;
@ -1305,6 +1305,8 @@ static int device_get_phy_addr(struct udevice *dev)
return -ENODEV;
}
priv->phy_of_node = phandle_args.node;
reg = ofnode_read_u32_default(phandle_args.node, "reg", 0);
return reg;
@ -1315,7 +1317,7 @@ static int fec_phy_init(struct fec_priv *priv, struct udevice *dev)
struct phy_device *phydev;
int addr;
addr = device_get_phy_addr(dev);
addr = device_get_phy_addr(priv, dev);
#ifdef CONFIG_FEC_MXC_PHYADDR
addr = CONFIG_FEC_MXC_PHYADDR;
#endif
@ -1325,6 +1327,7 @@ static int fec_phy_init(struct fec_priv *priv, struct udevice *dev)
return -ENODEV;
priv->phydev = phydev;
priv->phydev->node = priv->phy_of_node;
phy_config(phydev);
return 0;

1
drivers/net/fec_mxc.h
View File

@ -250,6 +250,7 @@ struct fec_priv {
struct mii_dev *bus;
#ifdef CONFIG_PHYLIB
struct phy_device *phydev;
ofnode phy_of_node;
#else
int phy_id;
int (*mii_postcall)(int);

7
drivers/net/phy/atheros.c
View File

@ -275,11 +275,10 @@ static int ar803x_of_init(struct phy_device *phydev)
* Fixup for the AR8035 which only has two bits. The two
* remaining bits map to the same frequencies.
*/
if (phydev->drv->uid == AR8035_PHY_ID) {
u16 clear = AR803x_CLK_25M_MASK & AR8035_CLK_25M_MASK;
priv->clk_25m_mask &= ~clear;
priv->clk_25m_reg &= ~clear;
if (phydev->drv->uid == AR8035_PHY_ID) {
priv->clk_25m_reg &= AR8035_CLK_25M_MASK;
priv->clk_25m_mask &= AR8035_CLK_25M_MASK;
}
}

51
include/configs/apalis-tk1.h
View File

@ -34,6 +34,20 @@
/* General networking support */
#define CONFIG_TFTP_TSIZE
/*
* Custom Distro Boot configuration:
* 1. 8bit SD port (MMC1)
* 2. 4bit SD port (MMC2)
* 3. eMMC (MMC0)
*/
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 1) \
func(MMC, mmc, 2) \
func(MMC, mmc, 0) \
func(USB, usb, 0) \
func(PXE, pxe, na) \
func(DHCP, dhcp, na)
#undef CONFIG_IPADDR
#define CONFIG_IPADDR 192.168.10.2
#define CONFIG_NETMASK 255.255.255.0
@ -54,24 +68,6 @@
"update_uboot=run set_blkcnt && mmc dev 0 ${uboot_hwpart} && " \
"mmc write ${loadaddr} ${uboot_blk} ${blkcnt}\0" \
#define EMMC_BOOTCMD \
"set_emmcargs=setenv emmcargs ip=off root=PARTUUID=${uuid} " \
"ro rootfstype=ext4 rootwait\0" \
"emmcboot=run setup; run emmcfinduuid; run set_emmcargs; " \
"setenv bootargs ${defargs} ${emmcargs} " \
"${setupargs} ${vidargs}; echo Booting from internal eMMC; " \
"run emmcdtbload; " \
"load mmc ${emmcdev}:${emmcbootpart} ${kernel_addr_r} " \
"${boot_file} && run fdt_fixup && " \
"bootz ${kernel_addr_r} - ${dtbparam}\0" \
"emmcbootpart=1\0" \
"emmcdev=0\0" \
"emmcdtbload=setenv dtbparam; load mmc ${emmcdev}:${emmcbootpart} " \
"${fdt_addr_r} ${soc}-${fdt_module}-${fdt_board}.dtb && " \
"setenv dtbparam ${fdt_addr_r}\0" \
"emmcfinduuid=part uuid mmc ${mmcdev}:${emmcrootpart} uuid\0" \
"emmcrootpart=2\0"
#define NFS_BOOTCMD \
"nfsargs=ip=:::::eth0:on root=/dev/nfs rw\0" \
"nfsboot=pci enum; run setup; setenv bootargs ${defargs} ${nfsargs} " \
@ -82,23 +78,6 @@
"${soc}-${fdt_module}-${fdt_board}.dtb " \
"&& setenv dtbparam ${fdt_addr_r}\0"
#define SD_BOOTCMD \
"set_sdargs=setenv sdargs ip=off root=PARTUUID=${uuid} ro " \
"rootfstype=ext4 rootwait\0" \
"sdboot=run setup; run sdfinduuid; run set_sdargs; " \
"setenv bootargs ${defargs} ${sdargs} ${setupargs} " \
"${vidargs}; echo Booting from SD card in 8bit slot...; " \
"run sddtbload; load mmc ${sddev}:${sdbootpart} " \
"${kernel_addr_r} ${boot_file} && run fdt_fixup && " \
"bootz ${kernel_addr_r} - ${dtbparam}\0" \
"sdbootpart=1\0" \
"sddev=1\0" \
"sddtbload=setenv dtbparam; load mmc ${sddev}:${sdbootpart} " \
"${fdt_addr_r} ${soc}-${fdt_module}-${fdt_board}.dtb " \
"&& setenv dtbparam ${fdt_addr_r}\0" \
"sdfinduuid=part uuid mmc ${sddev}:${sdrootpart} uuid\0" \
"sdrootpart=2\0"
#define BOARD_EXTRA_ENV_SETTINGS \
"boot_file=zImage\0" \
"console=ttyS0\0" \
@ -106,12 +85,10 @@
"usb_port_owner_info=2 lane_owner_info=6 emc_max_dvfs=0 " \
"user_debug=30 pcie_aspm=off\0" \
"dfu_alt_info=" DFU_ALT_EMMC_INFO "\0" \
EMMC_BOOTCMD \
"fdt_board=eval\0" \
"fdt_fixup=;\0" \
"fdt_module=" FDT_MODULE "\0" \
NFS_BOOTCMD \
SD_BOOTCMD \
UBOOT_UPDATE \
"setethupdate=if env exists ethaddr; then; else setenv ethaddr " \
"00:14:2d:00:00:00; fi; pci enum && tftpboot ${loadaddr} " \

29
include/configs/apalis_imx6.h
View File

@ -93,9 +93,9 @@
#ifndef CONFIG_SPL_BUILD
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(MMC, mmc, 1) \
func(MMC, mmc, 2) \
func(MMC, mmc, 0) \
func(USB, usb, 0) \
func(DHCP, dhcp, na)
#include <config_distro_bootcmd.h>
@ -105,14 +105,6 @@
#define BOOTENV
#endif /* CONFIG_SPL_BUILD */
#define DFU_ALT_EMMC_INFO \
"u-boot.imx raw 0x2 0x3ff mmcpart 0;" \
"boot part 0 1;" \
"rootfs part 0 2;" \
"zImage fat 0 1;" \
"imx6q-apalis-eval.dtb fat 0 1;" \
"imx6q-apalis-cam-eval.dtb fat 0 1"
#define UBOOT_UPDATE \
"uboot_hwpart=1\0" \
"uboot_blk=8a\0" \
@ -124,23 +116,6 @@
"update_spl=run set_blkcnt && mmc dev 0 ${uboot_hwpart} && " \
"mmc write ${loadaddr} ${uboot_spl_blk} ${blkcnt}\0"
#define EMMC_BOOTCMD \
"set_emmcargs=setenv emmcargs ip=off root=PARTUUID=${uuid} " \
"ro,noatime rootfstype=ext4 rootwait\0" \
"emmcboot=run setup; run emmcfinduuid; run set_emmcargs; " \
"setenv bootargs ${defargs} ${emmcargs} ${setupargs} " \
"${vidargs}; echo Booting from internal eMMC chip...; " \
"run emmcdtbload; load mmc ${emmcdev}:${emmcbootpart} " \
"${kernel_addr_r} ${boot_file} && run fdt_fixup && " \
"bootz ${kernel_addr_r} ${dtbparam}\0" \
"emmcbootpart=1\0" \
"emmcdev=0\0" \
"emmcdtbload=setenv dtbparam; load mmc ${emmcdev}:${emmcbootpart} " \
"${fdt_addr_r} ${fdt_file} && " \
"setenv dtbparam \" - ${fdt_addr_r}\" && true\0" \
"emmcfinduuid=part uuid mmc ${mmcdev}:${emmcrootpart} uuid\0" \
"emmcrootpart=2\0"
#define MEM_LAYOUT_ENV_SETTINGS \
"bootm_size=0x20000000\0" \
"fdt_addr_r=0x12100000\0" \
@ -174,8 +149,6 @@
"boot_file=zImage\0" \
"console=ttymxc0\0" \
"defargs=enable_wait_mode=off vmalloc=400M\0" \
"dfu_alt_info=" DFU_ALT_EMMC_INFO "\0" \
EMMC_BOOTCMD \
"fdt_file=" FDT_FILE "\0" \
"fdt_fixup=;\0" \
MEM_LAYOUT_ENV_SETTINGS \

1
include/configs/colibri-imx6ull.h
View File

@ -88,6 +88,7 @@
NFS_BOOTCMD \
UBI_BOOTCMD \
UBOOT_UPDATE \
"bootubipart=ubi\0" \
"console=ttymxc0\0" \
"defargs=user_debug=30\0" \
"dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \

8
include/configs/colibri-imx8x.h
View File

@ -62,7 +62,7 @@
#define BOOTENV_RUN_NET_USB_START ""
#define CONFIG_MFG_ENV_SETTINGS \
"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
"mfgtool_args=setenv bootargs ${consoleargs} " \
"rdinit=/linuxrc g_mass_storage.stall=0 " \
"g_mass_storage.removable=1 g_mass_storage.idVendor=0x066F " \
"g_mass_storage.idProduct=0x37FF " \
@ -81,7 +81,7 @@
M4_BOOT_ENV \
MEM_LAYOUT_ENV_SETTINGS \
"boot_file=Image\0" \
"console=ttyLP3 earlycon\0" \
"consoleargs=console=ttyLP3,${baudrate} earlycon\0" \
"fdt_addr=0x83000000\0" \
"fdt_file=fsl-imx8qxp-colibri-dsihdmi-eval-v3.dtb\0" \
"fdtfile=fsl-imx8qxp-colibri-dsihdmi-eval-v3.dtb\0" \
@ -89,11 +89,11 @@
"image=Image\0" \
"initrd_addr=0x83800000\0" \
"initrd_high=0xffffffffffffffff\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} " \
"mmcargs=setenv bootargs ${consoleargs} " \
"root=PARTUUID=${uuid} rootwait " \
"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
"netargs=setenv bootargs console=${console},${baudrate} " \
"netargs=setenv bootargs ${consoleargs} " \
"root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp " \
"${vidargs}\0" \
"nfsboot=run netargs; dhcp ${loadaddr} ${image}; tftp ${fdt_addr} " \

29
include/configs/colibri_imx6.h
View File

@ -83,6 +83,7 @@
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(MMC, mmc, 1) \
func(MMC, mmc, 0) \
func(USB, usb, 0) \
func(DHCP, dhcp, na)
#include <config_distro_bootcmd.h>
@ -92,14 +93,6 @@
#define BOOTENV
#endif /* CONFIG_SPL_BUILD */
#define DFU_ALT_EMMC_INFO \
"u-boot.imx raw 0x2 0x3ff mmcpart 0;" \
"boot part 0 1;" \
"rootfs part 0 2;" \
"zImage fat 0 1;" \
"imx6dl-colibri-eval-v3.dtb fat 0 1;" \
"imx6dl-colibri-cam-eval-v3.dtb fat 0 1"
#define UBOOT_UPDATE \
"uboot_hwpart=1\0" \
"uboot_blk=8a\0" \
@ -111,24 +104,6 @@
"update_spl=run set_blkcnt && mmc dev 0 ${uboot_hwpart} && " \
"mmc write ${loadaddr} ${uboot_spl_blk} ${blkcnt}\0"
#define EMMC_BOOTCMD \
"set_emmcargs=setenv emmcargs ip=off root=PARTUUID=${uuid} "\
"rw,noatime rootfstype=ext4 " \
"rootwait\0" \
"emmcboot=run setup; run emmcfinduuid; run set_emmcargs; " \
"setenv bootargs ${defargs} ${emmcargs} ${setupargs} " \
"${vidargs}; echo Booting from internal eMMC chip...; " \
"run emmcdtbload; load mmc ${emmcdev}:${emmcbootpart} " \
"${kernel_addr_r} ${boot_file} && run fdt_fixup && " \
"bootz ${kernel_addr_r} ${dtbparam}\0" \
"emmcbootpart=1\0" \
"emmcdev=0\0" \
"emmcdtbload=setenv dtbparam; load mmc ${emmcdev}:${emmcbootpart} " \
"${fdt_addr_r} ${fdt_file} && " \
"setenv dtbparam \" - ${fdt_addr_r}\" && true\0" \
"emmcfinduuid=part uuid mmc ${mmcdev}:${emmcrootpart} uuid\0" \
"emmcrootpart=2\0"
#define MEM_LAYOUT_ENV_SETTINGS \
"bootm_size=0x10000000\0" \
"fdt_addr_r=0x12100000\0" \
@ -157,8 +132,6 @@
"boot_file=zImage\0" \
"console=ttymxc0\0" \
"defargs=enable_wait_mode=off galcore.contiguousSize=50331648\0" \
"dfu_alt_info=" DFU_ALT_EMMC_INFO "\0" \
EMMC_BOOTCMD \
"fdt_file=" FDT_FILE "\0" \
"fdt_fixup=;\0" \
MEM_LAYOUT_ENV_SETTINGS \

28
include/configs/colibri_imx7.h
View File

@ -88,29 +88,13 @@
"mmc read ${android_fdt_addr} ${env_start} ${env_size}; " \
"bootm ${loadaddr} ${loadaddr} ${android_fdt_addr}\0 "
#define EMMC_BOOTCMD \
"set_emmcargs=setenv emmcargs ip=off root=PARTUUID=${uuid} ro " \
"rootfstype=ext4 rootwait\0" \
"emmcboot=run setup; run emmcfinduuid; run set_emmcargs; " \
"setenv bootargs ${defargs} ${emmcargs} ${setupargs} " \
"${vidargs}; echo Booting from internal eMMC chip...; " \
"run m4boot && " \
"load mmc ${emmcdev}:${emmcbootpart} ${fdt_addr_r} " \
"${soc}-colibri-emmc-${fdt_board}.dtb && " \
"load mmc ${emmcdev}:${emmcbootpart} ${kernel_addr_r} " \
"${boot_file} && run fdt_fixup && " \
"bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
"emmcbootpart=1\0" \
"emmcdev=0\0" \
"emmcfinduuid=part uuid mmc ${emmcdev}:${emmcrootpart} uuid\0" \
"emmcrootpart=2\0"
#define MEM_LAYOUT_ENV_SETTINGS \
"bootm_size=0x10000000\0" \
"fdt_addr_r=0x82000000\0" \
"kernel_addr_r=0x81000000\0" \
"pxefile_addr_r=0x87100000\0" \
"ramdisk_addr_r=0x82100000\0" \
"scriptaddr=0x82500000\0"
"scriptaddr=0x87000000\0"
#define NFS_BOOTCMD \
"nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
@ -143,7 +127,6 @@
"setenv fdtfile ${soc}-colibri-emmc-${fdt_board}.dtb && run distro_bootcmd;"
#define MODULE_EXTRA_ENV_SETTINGS \
"variant=-emmc\0" \
EMMC_BOOTCMD \
EMMC_ANDROID_BOOTCMD
#endif
@ -154,8 +137,8 @@
func(DHCP, dhcp, na)
#elif defined(CONFIG_TARGET_COLIBRI_IMX7_EMMC)
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(MMC, mmc, 1) \
func(MMC, mmc, 0) \
func(USB, usb, 0) \
func(DHCP, dhcp, na)
#endif
@ -168,6 +151,7 @@
MODULE_EXTRA_ENV_SETTINGS \
UBOOT_UPDATE \
"boot_file=zImage\0" \
"bootubipart=ubi\0" \
"console=ttymxc0\0" \
"defargs=\0" \
"fdt_board=eval-v3\0" \
@ -237,10 +221,6 @@
#define CONFIG_USBD_HS
/* USB Device Firmware Update support */
#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M
#define DFU_DEFAULT_POLL_TIMEOUT 300
#if defined(CONFIG_VIDEO) || defined(CONFIG_DM_VIDEO)
#define CONFIG_VIDEO_MXS
#define CONFIG_VIDEO_LOGO

18
include/configs/colibri_vf.h
View File

@ -69,21 +69,6 @@
"tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \
"run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
#define SD_BOOTCMD \
"set_sdargs=setenv sdargs root=PARTUUID=${uuid} ro rootwait\0" \
"sdboot=run setup; run sdfinduuid; run set_sdargs; " \
"setenv bootargs ${defargs} ${sdargs} ${mtdparts} " \
"${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \
"load mmc ${sddev}:${sdbootpart} ${kernel_addr_r} ${kernel_file} && " \
"load mmc ${sddev}:${sdbootpart} ${fdt_addr_r} " \
"${soc}-colibri-${fdt_board}.dtb && " \
"run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
"sdbootpart=1\0" \
"sddev=0\0" \
"sdfinduuid=part uuid mmc ${sddev}:${sdrootpart} uuid\0" \
"sdrootpart=2\0"
#define UBI_BOOTCMD \
"ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \
"ubi.fm_autoconvert=1\0" \
@ -112,7 +97,6 @@
BOOTENV \
MEM_LAYOUT_ENV_SETTINGS \
NFS_BOOTCMD \
SD_BOOTCMD \
UBI_BOOTCMD \
UBOOT_UPDATE \
"console=ttyLP0\0" \
@ -120,7 +104,7 @@
"dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \
"fdt_board=eval-v3\0" \
"fdt_fixup=;\0" \
"kernel_file=zImage\0" \
"kernel_image=zImage\0" \
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
"setsdupdate=mmc rescan && set interface mmc && " \
"fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \

6
include/configs/mx6cuboxi.h
View File

@ -29,12 +29,6 @@
#define CONFIG_LBA48
#endif
/* Ethernet Configuration */
#define CONFIG_FEC_MXC
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
/* Framebuffer */
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN

1
include/configs/wandboard.h
View File

@ -17,7 +17,6 @@
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* SATA Configs */