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net: fec: do not access reserved register for i.MX6ULL

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The MIB RAM and FIFO receive start register does not exist on
i.MX6ULL. Accessing these register will cause enet not work well or
cause system report fault.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
This commit is contained in:
Peng Fan 2017-04-10 19:44:33 +08:00 committed by Stefano Babic
parent 3fea953698
commit 4f55bd1c0b
1 changed files with 1 additions and 1 deletions
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2
drivers/net/fec_mxc.c
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@ -563,7 +563,7 @@ static int fec_init(struct eth_device *dev, bd_t *bd)
writel(0x00000000, &fec->eth->gaddr2); writel(0x00000000, &fec->eth->gaddr2);
/* Do not access reserved register for i.MX6UL */ /* Do not access reserved register for i.MX6UL */
if (!is_mx6ul()) { if (!is_mx6ul() && !is_mx6ull()) {
/* clear MIB RAM */ /* clear MIB RAM */
for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4) for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4)
writel(0, i); writel(0, i);