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ARM: dts: add hifsys reset for MediaTek SoCs
This adds missing hifsys reset parts in header files. Tested-by: Frank Wunderlich <frank-w@public-files.de> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
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@ -248,6 +248,13 @@
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status = "disabled";
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status = "disabled";
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};
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};
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hifsys: syscon@1a000000 {
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compatible = "mediatek,mt7623-hifsys", "syscon";
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reg = <0x1a000000 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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ethsys: syscon@1b000000 {
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ethsys: syscon@1b000000 {
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compatible = "mediatek,mt7623-ethsys", "syscon";
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compatible = "mediatek,mt7623-ethsys", "syscon";
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reg = <0x1b000000 0x1000>;
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reg = <0x1b000000 0x1000>;
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@ -15,4 +15,13 @@
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#define ETHSYS_MCM_RST 2
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#define ETHSYS_MCM_RST 2
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#define ETHSYS_SYS_RST 0
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#define ETHSYS_SYS_RST 0
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/* HIFSYS resets */
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#define HIFSYS_PCIE2_RST 26
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#define HIFSYS_PCIE1_RST 25
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#define HIFSYS_PCIE0_RST 24
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#define HIFSYS_UPHY1_RST 22
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#define HIFSYS_UPHY0_RST 21
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#define HIFSYS_UHOST1_RST 4
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#define HIFSYS_UHOST0_RST 3
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#endif /* _DT_BINDINGS_MTK_RESET_H_ */
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#endif /* _DT_BINDINGS_MTK_RESET_H_ */
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