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https://github.com/brain-hackers/u-boot-brain
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x86: tsc: Add driver model timer support
This adds driver model timer support to x86 tsc timer driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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2f80fc5035
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@ -8,7 +8,9 @@
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*/
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*/
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#include <common.h>
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#include <common.h>
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#include <dm.h>
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#include <malloc.h>
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#include <malloc.h>
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#include <timer.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/i8254.h>
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#include <asm/i8254.h>
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#include <asm/ibmpc.h>
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#include <asm/ibmpc.h>
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@ -278,6 +280,7 @@ success:
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return delta / 1000;
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return delta / 1000;
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}
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}
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#ifndef CONFIG_TIMER
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void timer_set_base(u64 base)
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void timer_set_base(u64 base)
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{
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{
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gd->arch.tsc_base = base;
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gd->arch.tsc_base = base;
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@ -297,10 +300,14 @@ u64 notrace get_ticks(void)
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panic("No tick base available");
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panic("No tick base available");
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return now_tick - gd->arch.tsc_base;
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return now_tick - gd->arch.tsc_base;
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}
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}
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#endif /* CONFIG_TIMER */
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/* Get the speed of the TSC timer in MHz */
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/* Get the speed of the TSC timer in MHz */
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unsigned notrace long get_tbclk_mhz(void)
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unsigned notrace long get_tbclk_mhz(void)
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{
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{
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#ifdef CONFIG_TIMER
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return get_tbclk() / 1000000;
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#else
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unsigned long fast_calibrate;
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unsigned long fast_calibrate;
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if (gd->arch.tsc_mhz)
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if (gd->arch.tsc_mhz)
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@ -320,12 +327,15 @@ unsigned notrace long get_tbclk_mhz(void)
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gd->arch.tsc_mhz = fast_calibrate;
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gd->arch.tsc_mhz = fast_calibrate;
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return fast_calibrate;
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return fast_calibrate;
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#endif
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}
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}
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#ifndef CONFIG_TIMER
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unsigned long get_tbclk(void)
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unsigned long get_tbclk(void)
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{
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{
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return get_tbclk_mhz() * 1000 * 1000;
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return get_tbclk_mhz() * 1000 * 1000;
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}
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}
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#endif
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static ulong get_ms_timer(void)
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static ulong get_ms_timer(void)
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{
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{
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@ -375,3 +385,58 @@ int timer_init(void)
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return 0;
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return 0;
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}
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}
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#ifdef CONFIG_TIMER
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static int tsc_timer_get_count(struct udevice *dev, u64 *count)
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{
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u64 now_tick = rdtsc();
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*count = now_tick - gd->arch.tsc_base;
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return 0;
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}
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static int tsc_timer_probe(struct udevice *dev)
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{
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struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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gd->arch.tsc_base = rdtsc();
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/*
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* If there is no clock frequency specified in the device tree,
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* calibrate it by ourselves.
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*/
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if (!uc_priv->clock_rate) {
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unsigned long fast_calibrate;
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fast_calibrate = try_msr_calibrate_tsc();
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if (!fast_calibrate) {
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fast_calibrate = quick_pit_calibrate();
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if (!fast_calibrate)
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panic("TSC frequency is ZERO");
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}
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uc_priv->clock_rate = fast_calibrate * 1000000;
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}
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return 0;
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}
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static const struct timer_ops tsc_timer_ops = {
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.get_count = tsc_timer_get_count,
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};
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static const struct udevice_id tsc_timer_ids[] = {
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{ .compatible = "x86,tsc-timer", },
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{ }
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};
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U_BOOT_DRIVER(tsc_timer) = {
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.name = "tsc_timer",
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.id = UCLASS_TIMER,
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.of_match = tsc_timer_ids,
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.probe = tsc_timer_probe,
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.ops = &tsc_timer_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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#endif /* CONFIG_TIMER */
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