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x86: ivybridge: Fix PCH power setup

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At present pch_power_options() has the arguments to writel() around the
wrong way. Fix this and update it to compile on 64-bit machines.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Simon Glass 2016-09-25 21:33:34 -06:00 committed by Bin Meng
parent 5d7ec3d8d3
commit 4e0318c32f
1 changed files with 4 additions and 4 deletions
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8
arch/x86/cpu/ivybridge/lpc.c
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@ -213,10 +213,10 @@ static int pch_power_options(struct udevice *pch)
dm_pci_read_config16(pch, 0x40, &pmbase);
pmbase &= 0xfffe;
writel(pmbase + GPE0_EN, fdtdec_get_int(blob, node,
"intel,gpe0-enable", 0));
writew(pmbase + ALT_GP_SMI_EN, fdtdec_get_int(blob, node,
"intel,alt-gp-smi-enable", 0));
writel(fdtdec_get_int(blob, node, "intel,gpe0-enable", 0),
(ulong)pmbase + GPE0_EN);
writew(fdtdec_get_int(blob, node, "intel,alt-gp-smi-enable", 0),
(ulong)pmbase + ALT_GP_SMI_EN);
/* Set up power management block and determine sleep mode */
reg32 = inl(pmbase + 0x04); /* PM1_CNT */