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ARM: rmobile: Tidy up SYSC_PWRx define of 3DG on Gen3

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Tidy up unused definition related to power control of 3DG.

Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
This commit is contained in:
Hiroyuki Yokoyama 2017-03-23 10:35:41 +09:00 committed by Marek Vasut
parent a14d2d153d
commit 4cb71e248f
3 changed files with 0 additions and 18 deletions
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6
board/renesas/draak/draak.c
View File

@ -44,12 +44,6 @@ int board_early_init_f(void)
return 0;
}
/* SYSC */
/* R/- 32 Power status register 2(3DG) */
#define SYSC_PWRSR2 0xE6180100
/* -/W 32 Power resume control register 2 (3DG) */
#define SYSC_PWRONCR2 0xE618010C
/* HSUSB block registers */
#define HSUSB_REG_LPSTS 0xE6590102
#define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14)

6
board/renesas/salvator-x/salvator-x.c
View File

@ -44,12 +44,6 @@ int board_early_init_f(void)
return 0;
}
/* SYSC */
/* R/- 32 Power status register 2(3DG) */
#define SYSC_PWRSR2 0xE6180100
/* -/W 32 Power resume control register 2 (3DG) */
#define SYSC_PWRONCR2 0xE618010C
/* HSUSB block registers */
#define HSUSB_REG_LPSTS 0xE6590102
#define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14)

6
board/renesas/ulcb/ulcb.c
View File

@ -44,12 +44,6 @@ int board_early_init_f(void)
return 0;
}
/* SYSC */
/* R/- 32 Power status register 2(3DG) */
#define SYSC_PWRSR2 0xE6180100
/* -/W 32 Power resume control register 2 (3DG) */
#define SYSC_PWRONCR2 0xE618010C
/* HSUSB block registers */
#define HSUSB_REG_LPSTS 0xE6590102
#define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14)