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mtd: rawnand: stm32_fmc2: use FMC2_TIMEOUT_5S for timeouts

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FMC2_TIMEOUT_5S will be used each time that we need to wait.
It was seen, during stress tests in an overloaded system,
that we could be close to 1 second, even if we never met this
value. To be safe, FMC2_TIMEOUT_MS is set to 5 seconds.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
This commit is contained in:
Christophe Kerello 2020-07-31 09:53:36 +02:00 committed by Patrice Chotard
parent a3899b373f
commit 4a470044e1
1 changed files with 5 additions and 3 deletions
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8
drivers/mtd/nand/raw/stm32_fmc2_nand.c
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@ -131,6 +131,8 @@
#define FMC2_NSEC_PER_SEC 1000000000L
#define FMC2_TIMEOUT_5S 5000000
enum stm32_fmc2_ecc {
FMC2_ECC_HAM = 1,
FMC2_ECC_BCH4 = 4,
@ -339,7 +341,7 @@ static int stm32_fmc2_ham_calculate(struct mtd_info *mtd, const u8 *data,
int ret;
ret = readl_poll_timeout(fmc2->io_base + FMC2_SR, sr,
sr & FMC2_SR_NWRF, 10000);
sr & FMC2_SR_NWRF, FMC2_TIMEOUT_5S);
if (ret < 0) {
pr_err("Ham timeout\n");
return ret;
@ -424,7 +426,7 @@ static int stm32_fmc2_bch_calculate(struct mtd_info *mtd, const u8 *data,
/* Wait until the BCH code is ready */
ret = readl_poll_timeout(fmc2->io_base + FMC2_BCHISR, bchisr,
bchisr & FMC2_BCHISR_EPBRF, 10000);
bchisr & FMC2_BCHISR_EPBRF, FMC2_TIMEOUT_5S);
if (ret < 0) {
pr_err("Bch timeout\n");
return ret;
@ -472,7 +474,7 @@ static int stm32_fmc2_bch_correct(struct mtd_info *mtd, u8 *dat,
/* Wait until the decoding error is ready */
ret = readl_poll_timeout(fmc2->io_base + FMC2_BCHISR, bchisr,
bchisr & FMC2_BCHISR_DERF, 10000);
bchisr & FMC2_BCHISR_DERF, FMC2_TIMEOUT_5S);
if (ret < 0) {
pr_err("Bch timeout\n");
return ret;