mirror of
https://github.com/brain-hackers/u-boot-brain
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t210: pinmux: Remove pinmux/GPIO init from T210 boards
T210 CBoot is now doing the full pinmux and GPIO init, based on the DTB tables. Remove pinmux/GPIO init tables & code from all T210-based builds below: p2371-2180 aka TX1 p2371-0000 e2220-1170 p2571 Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
Tom Warren
parent
d491dc09e4
commit
48ba1969c1
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@ -1,5 +1,5 @@
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#
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# (C) Copyright 2013-2015
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# (C) Copyright 2013-2020
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# NVIDIA Corporation <www.nvidia.com>
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#
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# SPDX-License-Identifier: GPL-2.0+
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@ -7,6 +7,5 @@
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obj-y += clock.o
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obj-y += funcmux.o
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obj-y += pinmux.o
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obj-y += xusb-padctl.o
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obj-y += ../xusb-padctl-common.o
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@ -1,194 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/pinmux.h>
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#define PIN(pin, f0, f1, f2, f3) \
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{ \
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.funcs = { \
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PMUX_FUNC_##f0, \
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PMUX_FUNC_##f1, \
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PMUX_FUNC_##f2, \
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PMUX_FUNC_##f3, \
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}, \
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}
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#define PIN_RESERVED {}
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static const struct pmux_pingrp_desc tegra210_pingroups[] = {
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/* pin, f0, f1, f2, f3 */
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/* Offset 0x3000 */
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PIN(SDMMC1_CLK_PM0, SDMMC1, RSVD1, RSVD2, RSVD3),
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PIN(SDMMC1_CMD_PM1, SDMMC1, SPI3, RSVD2, RSVD3),
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PIN(SDMMC1_DAT3_PM2, SDMMC1, SPI3, RSVD2, RSVD3),
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PIN(SDMMC1_DAT2_PM3, SDMMC1, SPI3, RSVD2, RSVD3),
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PIN(SDMMC1_DAT1_PM4, SDMMC1, SPI3, RSVD2, RSVD3),
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PIN(SDMMC1_DAT0_PM5, SDMMC1, RSVD1, RSVD2, RSVD3),
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PIN_RESERVED,
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/* Offset 0x301c */
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PIN(SDMMC3_CLK_PP0, SDMMC3, RSVD1, RSVD2, RSVD3),
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PIN(SDMMC3_CMD_PP1, SDMMC3, RSVD1, RSVD2, RSVD3),
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PIN(SDMMC3_DAT0_PP5, SDMMC3, RSVD1, RSVD2, RSVD3),
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PIN(SDMMC3_DAT1_PP4, SDMMC3, RSVD1, RSVD2, RSVD3),
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PIN(SDMMC3_DAT2_PP3, SDMMC3, RSVD1, RSVD2, RSVD3),
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PIN(SDMMC3_DAT3_PP2, SDMMC3, RSVD1, RSVD2, RSVD3),
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PIN_RESERVED,
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/* Offset 0x3038 */
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PIN(PEX_L0_RST_N_PA0, PE0, RSVD1, RSVD2, RSVD3),
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PIN(PEX_L0_CLKREQ_N_PA1, PE0, RSVD1, RSVD2, RSVD3),
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PIN(PEX_WAKE_N_PA2, PE, RSVD1, RSVD2, RSVD3),
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PIN(PEX_L1_RST_N_PA3, PE1, RSVD1, RSVD2, RSVD3),
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PIN(PEX_L1_CLKREQ_N_PA4, PE1, RSVD1, RSVD2, RSVD3),
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PIN(SATA_LED_ACTIVE_PA5, SATA, RSVD1, RSVD2, RSVD3),
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PIN(SPI1_MOSI_PC0, SPI1, RSVD1, RSVD2, RSVD3),
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PIN(SPI1_MISO_PC1, SPI1, RSVD1, RSVD2, RSVD3),
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PIN(SPI1_SCK_PC2, SPI1, RSVD1, RSVD2, RSVD3),
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PIN(SPI1_CS0_PC3, SPI1, RSVD1, RSVD2, RSVD3),
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PIN(SPI1_CS1_PC4, SPI1, RSVD1, RSVD2, RSVD3),
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PIN(SPI2_MOSI_PB4, SPI2, DTV, RSVD2, RSVD3),
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PIN(SPI2_MISO_PB5, SPI2, DTV, RSVD2, RSVD3),
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PIN(SPI2_SCK_PB6, SPI2, DTV, RSVD2, RSVD3),
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PIN(SPI2_CS0_PB7, SPI2, DTV, RSVD2, RSVD3),
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PIN(SPI2_CS1_PDD0, SPI2, RSVD1, RSVD2, RSVD3),
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PIN(SPI4_MOSI_PC7, SPI4, RSVD1, RSVD2, RSVD3),
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PIN(SPI4_MISO_PD0, SPI4, RSVD1, RSVD2, RSVD3),
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PIN(SPI4_SCK_PC5, SPI4, RSVD1, RSVD2, RSVD3),
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PIN(SPI4_CS0_PC6, SPI4, RSVD1, RSVD2, RSVD3),
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PIN(QSPI_SCK_PEE0, QSPI, RSVD1, RSVD2, RSVD3),
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PIN(QSPI_CS_N_PEE1, QSPI, RSVD1, RSVD2, RSVD3),
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PIN(QSPI_IO0_PEE2, QSPI, RSVD1, RSVD2, RSVD3),
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PIN(QSPI_IO1_PEE3, QSPI, RSVD1, RSVD2, RSVD3),
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PIN(QSPI_IO2_PEE4, QSPI, RSVD1, RSVD2, RSVD3),
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PIN(QSPI_IO3_PEE5, QSPI, RSVD1, RSVD2, RSVD3),
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PIN_RESERVED,
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/* Offset 0x30a4 */
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PIN(DMIC1_CLK_PE0, DMIC1, I2S3, RSVD2, RSVD3),
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PIN(DMIC1_DAT_PE1, DMIC1, I2S3, RSVD2, RSVD3),
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PIN(DMIC2_CLK_PE2, DMIC2, I2S3, RSVD2, RSVD3),
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PIN(DMIC2_DAT_PE3, DMIC2, I2S3, RSVD2, RSVD3),
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PIN(DMIC3_CLK_PE4, DMIC3, I2S5A, RSVD2, RSVD3),
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PIN(DMIC3_DAT_PE5, DMIC3, I2S5A, RSVD2, RSVD3),
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PIN(GEN1_I2C_SCL_PJ1, I2C1, RSVD1, RSVD2, RSVD3),
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PIN(GEN1_I2C_SDA_PJ0, I2C1, RSVD1, RSVD2, RSVD3),
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PIN(GEN2_I2C_SCL_PJ2, I2C2, RSVD1, RSVD2, RSVD3),
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PIN(GEN2_I2C_SDA_PJ3, I2C2, RSVD1, RSVD2, RSVD3),
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PIN(GEN3_I2C_SCL_PF0, I2C3, RSVD1, RSVD2, RSVD3),
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PIN(GEN3_I2C_SDA_PF1, I2C3, RSVD1, RSVD2, RSVD3),
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PIN(CAM_I2C_SCL_PS2, I2C3, I2CVI, RSVD2, RSVD3),
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PIN(CAM_I2C_SDA_PS3, I2C3, I2CVI, RSVD2, RSVD3),
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PIN(PWR_I2C_SCL_PY3, I2CPMU, RSVD1, RSVD2, RSVD3),
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PIN(PWR_I2C_SDA_PY4, I2CPMU, RSVD1, RSVD2, RSVD3),
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PIN(UART1_TX_PU0, UARTA, RSVD1, RSVD2, RSVD3),
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PIN(UART1_RX_PU1, UARTA, RSVD1, RSVD2, RSVD3),
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PIN(UART1_RTS_PU2, UARTA, RSVD1, RSVD2, RSVD3),
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PIN(UART1_CTS_PU3, UARTA, RSVD1, RSVD2, RSVD3),
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PIN(UART2_TX_PG0, UARTB, I2S4A, SPDIF, UART),
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PIN(UART2_RX_PG1, UARTB, I2S4A, SPDIF, UART),
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PIN(UART2_RTS_PG2, UARTB, I2S4A, RSVD2, UART),
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PIN(UART2_CTS_PG3, UARTB, I2S4A, RSVD2, UART),
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PIN(UART3_TX_PD1, UARTC, SPI4, RSVD2, RSVD3),
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PIN(UART3_RX_PD2, UARTC, SPI4, RSVD2, RSVD3),
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PIN(UART3_RTS_PD3, UARTC, SPI4, RSVD2, RSVD3),
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PIN(UART3_CTS_PD4, UARTC, SPI4, RSVD2, RSVD3),
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PIN(UART4_TX_PI4, UARTD, UART, RSVD2, RSVD3),
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PIN(UART4_RX_PI5, UARTD, UART, RSVD2, RSVD3),
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PIN(UART4_RTS_PI6, UARTD, UART, RSVD2, RSVD3),
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PIN(UART4_CTS_PI7, UARTD, UART, RSVD2, RSVD3),
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PIN(DAP1_FS_PB0, I2S1, RSVD1, RSVD2, RSVD3),
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PIN(DAP1_DIN_PB1, I2S1, RSVD1, RSVD2, RSVD3),
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PIN(DAP1_DOUT_PB2, I2S1, RSVD1, RSVD2, RSVD3),
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PIN(DAP1_SCLK_PB3, I2S1, RSVD1, RSVD2, RSVD3),
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PIN(DAP2_FS_PAA0, I2S2, RSVD1, RSVD2, RSVD3),
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PIN(DAP2_DIN_PAA2, I2S2, RSVD1, RSVD2, RSVD3),
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PIN(DAP2_DOUT_PAA3, I2S2, RSVD1, RSVD2, RSVD3),
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PIN(DAP2_SCLK_PAA1, I2S2, RSVD1, RSVD2, RSVD3),
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PIN(DAP4_FS_PJ4, I2S4B, RSVD1, RSVD2, RSVD3),
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PIN(DAP4_DIN_PJ5, I2S4B, RSVD1, RSVD2, RSVD3),
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PIN(DAP4_DOUT_PJ6, I2S4B, RSVD1, RSVD2, RSVD3),
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PIN(DAP4_SCLK_PJ7, I2S4B, RSVD1, RSVD2, RSVD3),
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PIN(CAM1_MCLK_PS0, EXTPERIPH3, RSVD1, RSVD2, RSVD3),
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PIN(CAM2_MCLK_PS1, EXTPERIPH3, RSVD1, RSVD2, RSVD3),
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PIN(JTAG_RTCK, JTAG, RSVD1, RSVD2, RSVD3),
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PIN(CLK_32K_IN, CLK, RSVD1, RSVD2, RSVD3),
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PIN(CLK_32K_OUT_PY5, SOC, BLINK, RSVD2, RSVD3),
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PIN(BATT_BCL, BCL, RSVD1, RSVD2, RSVD3),
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PIN(CLK_REQ, SYS, RSVD1, RSVD2, RSVD3),
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PIN(CPU_PWR_REQ, CPU, RSVD1, RSVD2, RSVD3),
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PIN(PWR_INT_N, PMI, RSVD1, RSVD2, RSVD3),
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PIN(SHUTDOWN, SHUTDOWN, RSVD1, RSVD2, RSVD3),
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PIN(CORE_PWR_REQ, CORE, RSVD1, RSVD2, RSVD3),
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PIN(AUD_MCLK_PBB0, AUD, RSVD1, RSVD2, RSVD3),
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PIN(DVFS_PWM_PBB1, RSVD0, CLDVFS, SPI3, RSVD3),
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PIN(DVFS_CLK_PBB2, RSVD0, CLDVFS, SPI3, RSVD3),
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PIN(GPIO_X1_AUD_PBB3, RSVD0, RSVD1, SPI3, RSVD3),
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PIN(GPIO_X3_AUD_PBB4, RSVD0, RSVD1, SPI3, RSVD3),
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PIN(PCC7, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(HDMI_CEC_PCC0, CEC, RSVD1, RSVD2, RSVD3),
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PIN(HDMI_INT_DP_HPD_PCC1, DP, RSVD1, RSVD2, RSVD3),
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PIN(SPDIF_OUT_PCC2, SPDIF, RSVD1, RSVD2, RSVD3),
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PIN(SPDIF_IN_PCC3, SPDIF, RSVD1, RSVD2, RSVD3),
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PIN(USB_VBUS_EN0_PCC4, USB, RSVD1, RSVD2, RSVD3),
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PIN(USB_VBUS_EN1_PCC5, USB, RSVD1, RSVD2, RSVD3),
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PIN(DP_HPD0_PCC6, DP, RSVD1, RSVD2, RSVD3),
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PIN(WIFI_EN_PH0, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(WIFI_RST_PH1, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(WIFI_WAKE_AP_PH2, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(AP_WAKE_BT_PH3, RSVD0, UARTB, SPDIF, RSVD3),
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PIN(BT_RST_PH4, RSVD0, UARTB, SPDIF, RSVD3),
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PIN(BT_WAKE_AP_PH5, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(AP_WAKE_NFC_PH7, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(NFC_EN_PI0, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(NFC_INT_PI1, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(GPS_EN_PI2, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(GPS_RST_PI3, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(CAM_RST_PS4, VGP1, RSVD1, RSVD2, RSVD3),
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PIN(CAM_AF_EN_PS5, VIMCLK, VGP2, RSVD2, RSVD3),
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PIN(CAM_FLASH_EN_PS6, VIMCLK, VGP3, RSVD2, RSVD3),
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PIN(CAM1_PWDN_PS7, VGP4, RSVD1, RSVD2, RSVD3),
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PIN(CAM2_PWDN_PT0, VGP5, RSVD1, RSVD2, RSVD3),
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PIN(CAM1_STROBE_PT1, VGP6, RSVD1, RSVD2, RSVD3),
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PIN(LCD_TE_PY2, DISPLAYA, RSVD1, RSVD2, RSVD3),
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PIN(LCD_BL_PWM_PV0, DISPLAYA, PWM0, SOR0, RSVD3),
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PIN(LCD_BL_EN_PV1, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(LCD_RST_PV2, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(LCD_GPIO1_PV3, DISPLAYB, RSVD1, RSVD2, RSVD3),
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PIN(LCD_GPIO2_PV4, DISPLAYB, PWM1, RSVD2, SOR1),
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PIN(AP_READY_PV5, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(TOUCH_RST_PV6, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(TOUCH_CLK_PV7, TOUCH, RSVD1, RSVD2, RSVD3),
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PIN(MODEM_WAKE_AP_PX0, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(TOUCH_INT_PX1, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(MOTION_INT_PX2, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(ALS_PROX_INT_PX3, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(TEMP_ALERT_PX4, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(BUTTON_POWER_ON_PX5, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(BUTTON_VOL_UP_PX6, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(BUTTON_VOL_DOWN_PX7, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(BUTTON_SLIDE_SW_PY0, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(BUTTON_HOME_PY1, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(PA6, SATA, RSVD1, RSVD2, RSVD3),
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PIN(PE6, RSVD0, I2S5A, PWM2, RSVD3),
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PIN(PE7, RSVD0, I2S5A, PWM3, RSVD3),
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PIN(PH6, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(PK0, IQC0, I2S5B, RSVD2, RSVD3),
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PIN(PK1, IQC0, I2S5B, RSVD2, RSVD3),
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PIN(PK2, IQC0, I2S5B, RSVD2, RSVD3),
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PIN(PK3, IQC0, I2S5B, RSVD2, RSVD3),
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PIN(PK4, IQC1, RSVD1, RSVD2, RSVD3),
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PIN(PK5, IQC1, RSVD1, RSVD2, RSVD3),
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PIN(PK6, IQC1, RSVD1, RSVD2, RSVD3),
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PIN(PK7, IQC1, RSVD1, RSVD2, RSVD3),
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PIN(PL0, RSVD0, RSVD1, RSVD2, RSVD3),
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PIN(PL1, SOC, RSVD1, RSVD2, RSVD3),
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PIN(PZ0, VIMCLK2, RSVD1, RSVD2, RSVD3),
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PIN(PZ1, VIMCLK2, SDMMC1, RSVD2, RSVD3),
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PIN(PZ2, SDMMC3, CCLA, RSVD2, RSVD3),
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PIN(PZ3, SDMMC3, RSVD1, RSVD2, RSVD3),
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PIN(PZ4, SDMMC1, RSVD1, RSVD2, RSVD3),
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PIN(PZ5, SOC, RSVD1, RSVD2, RSVD3),
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};
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const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra210_pingroups;
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2013-2015
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* (C) Copyright 2013-2019
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* NVIDIA Corporation <www.nvidia.com>
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*/
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@ -9,7 +9,6 @@
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#include <asm/arch/gpio.h>
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#include <asm/arch/pinmux.h>
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#include "../p2571/max77620_init.h"
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#include "pinmux-config-e2220-1170.h"
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void pin_mux_mmc(void)
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{
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@ -30,21 +29,3 @@ void pin_mux_mmc(void)
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if (ret)
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printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret);
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}
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/*
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* Routine: pinmux_init
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* Description: Do individual peripheral pinmux configs
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*/
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void pinmux_init(void)
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{
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pinmux_clear_tristate_input_clamping();
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gpio_config_table(e2220_1170_gpio_inits,
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ARRAY_SIZE(e2220_1170_gpio_inits));
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pinmux_config_pingrp_table(e2220_1170_pingrps,
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ARRAY_SIZE(e2220_1170_pingrps));
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pinmux_config_drvgrp_table(e2220_1170_drvgrps,
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ARRAY_SIZE(e2220_1170_drvgrps));
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}
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@ -1,276 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
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*/
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/*
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* THIS FILE IS AUTO-GENERATED - DO NOT EDIT!
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*
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* To generate this file, use the tegra-pinmux-scripts tool available from
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* https://github.com/NVIDIA/tegra-pinmux-scripts
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* Run "board-to-uboot.py e2220-1170".
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*/
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#ifndef _PINMUX_CONFIG_E2220_1170_H_
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#define _PINMUX_CONFIG_E2220_1170_H_
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#define GPIO_INIT(_port, _gpio, _init) \
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{ \
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.gpio = TEGRA_GPIO(_port, _gpio), \
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.init = TEGRA_GPIO_INIT_##_init, \
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}
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static const struct tegra_gpio_config e2220_1170_gpio_inits[] = {
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/* port, pin, init_val */
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GPIO_INIT(A, 5, IN),
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GPIO_INIT(A, 6, IN),
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GPIO_INIT(B, 4, IN),
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GPIO_INIT(E, 6, IN),
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GPIO_INIT(G, 2, OUT0),
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GPIO_INIT(G, 3, OUT0),
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GPIO_INIT(H, 0, OUT0),
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GPIO_INIT(H, 1, OUT0),
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GPIO_INIT(H, 2, IN),
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GPIO_INIT(H, 3, OUT0),
|
||||
GPIO_INIT(H, 4, OUT0),
|
||||
GPIO_INIT(H, 5, IN),
|
||||
GPIO_INIT(H, 6, OUT0),
|
||||
GPIO_INIT(H, 7, OUT0),
|
||||
GPIO_INIT(I, 0, OUT0),
|
||||
GPIO_INIT(I, 1, IN),
|
||||
GPIO_INIT(I, 2, OUT0),
|
||||
GPIO_INIT(I, 3, OUT0),
|
||||
GPIO_INIT(K, 0, IN),
|
||||
GPIO_INIT(K, 1, OUT0),
|
||||
GPIO_INIT(K, 2, OUT0),
|
||||
GPIO_INIT(K, 3, OUT0),
|
||||
GPIO_INIT(K, 4, IN),
|
||||
GPIO_INIT(K, 5, OUT0),
|
||||
GPIO_INIT(K, 6, IN),
|
||||
GPIO_INIT(K, 7, OUT0),
|
||||
GPIO_INIT(L, 0, OUT0),
|
||||
GPIO_INIT(S, 4, OUT0),
|
||||
GPIO_INIT(S, 5, OUT0),
|
||||
GPIO_INIT(S, 6, OUT0),
|
||||
GPIO_INIT(S, 7, OUT0),
|
||||
GPIO_INIT(T, 0, OUT0),
|
||||
GPIO_INIT(T, 1, OUT0),
|
||||
GPIO_INIT(V, 1, OUT0),
|
||||
GPIO_INIT(V, 2, OUT0),
|
||||
GPIO_INIT(V, 3, IN),
|
||||
GPIO_INIT(V, 5, OUT0),
|
||||
GPIO_INIT(V, 6, OUT0),
|
||||
GPIO_INIT(X, 0, IN),
|
||||
GPIO_INIT(X, 1, IN),
|
||||
GPIO_INIT(X, 2, IN),
|
||||
GPIO_INIT(X, 3, IN),
|
||||
GPIO_INIT(X, 4, IN),
|
||||
GPIO_INIT(X, 5, IN),
|
||||
GPIO_INIT(X, 6, IN),
|
||||
GPIO_INIT(X, 7, IN),
|
||||
GPIO_INIT(Y, 0, IN),
|
||||
GPIO_INIT(Y, 1, IN),
|
||||
GPIO_INIT(Z, 0, IN),
|
||||
GPIO_INIT(Z, 4, OUT0),
|
||||
GPIO_INIT(BB, 2, OUT0),
|
||||
GPIO_INIT(BB, 3, OUT0),
|
||||
GPIO_INIT(BB, 4, IN),
|
||||
GPIO_INIT(CC, 1, IN),
|
||||
GPIO_INIT(CC, 5, OUT0),
|
||||
GPIO_INIT(CC, 6, IN),
|
||||
GPIO_INIT(CC, 7, OUT0),
|
||||
};
|
||||
|
||||
#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \
|
||||
{ \
|
||||
.pingrp = PMUX_PINGRP_##_pingrp, \
|
||||
.func = PMUX_FUNC_##_mux, \
|
||||
.pull = PMUX_PULL_##_pull, \
|
||||
.tristate = PMUX_TRI_##_tri, \
|
||||
.io = PMUX_PIN_##_io, \
|
||||
.od = PMUX_PIN_OD_##_od, \
|
||||
.e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \
|
||||
.lock = PMUX_PIN_LOCK_DEFAULT, \
|
||||
}
|
||||
|
||||
static const struct pmux_pingrp_config e2220_1170_pingrps[] = {
|
||||
/* pingrp, mux, pull, tri, e_input, od, e_io_hv */
|
||||
PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL),
|
||||
PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, UP, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(PEX_WAKE_N_PA2, PE, UP, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL),
|
||||
PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, UP, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PA6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP1_FS_PB0, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP1_DIN_PB1, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP1_DOUT_PB2, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP1_SCLK_PB3, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI2_MOSI_PB4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI2_MISO_PB5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI2_SCK_PB6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI2_CS0_PB7, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI1_MOSI_PC0, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI1_MISO_PC1, SPI1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI1_SCK_PC2, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI1_CS0_PC3, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI1_CS1_PC4, SPI1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI4_SCK_PC5, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI4_CS0_PC6, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI4_MOSI_PC7, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI4_MISO_PD0, SPI4, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART3_RX_PD2, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART3_RTS_PD3, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART3_CTS_PD4, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC1_CLK_PE0, DMIC1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC1_DAT_PE1, DMIC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC2_CLK_PE2, DMIC2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC2_DAT_PE3, DMIC2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC3_CLK_PE4, DMIC3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC3_DAT_PE5, DMIC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PE6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(UART2_TX_PG0, UART, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART2_RX_PG1, UART, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART2_RTS_PG2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART2_CTS_PG3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(WIFI_RST_PH1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PH6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(NFC_INT_PI1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GPS_RST_PI3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART4_CTS_PI7, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(DAP4_FS_PJ4, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP4_DIN_PJ5, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP4_DOUT_PJ6, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP4_SCLK_PJ7, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK0, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK4, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK6, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PL0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PL1, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(CAM_RST_PS4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM_AF_EN_PS5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM_FLASH_EN_PS6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM1_STROBE_PT1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART1_RX_PU1, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART1_RTS_PU2, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART1_CTS_PU3, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_BL_PWM_PV0, PWM0, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_RST_PV2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_GPIO1_PV3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(AP_READY_PV5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(TOUCH_RST_PV6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(TOUCH_CLK_PV7, TOUCH, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(MODEM_WAKE_AP_PX0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(TOUCH_INT_PX1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(MOTION_INT_PX2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(ALS_PROX_INT_PX3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BUTTON_VOL_DOWN_PX7, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BUTTON_SLIDE_SW_PY0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_TE_PY2, DISPLAYA, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(CLK_32K_OUT_PY5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(AUD_MCLK_PBB0, AUD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DVFS_CLK_PBB2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GPIO_X1_AUD_PBB3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GPIO_X3_AUD_PBB4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(HDMI_INT_DP_HPD_PCC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(SPDIF_OUT_PCC2, SPDIF, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPDIF_IN_PCC3, SPDIF, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(USB_VBUS_EN1_PCC5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL),
|
||||
PINCFG(DP_HPD0_PCC6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PCC7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL),
|
||||
PINCFG(SPI2_CS1_PDD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_SCK_PEE0, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_CS_N_PEE1, QSPI, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_IO0_PEE2, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_IO1_PEE3, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_IO2_PEE4, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_IO3_PEE5, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CLK_REQ, SYS, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
};
|
||||
|
||||
#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
|
||||
{ \
|
||||
.drvgrp = PMUX_DRVGRP_##_drvgrp, \
|
||||
.slwf = _slwf, \
|
||||
.slwr = _slwr, \
|
||||
.drvup = _drvup, \
|
||||
.drvdn = _drvdn, \
|
||||
.lpmd = PMUX_LPMD_##_lpmd, \
|
||||
.schmt = PMUX_SCHMT_##_schmt, \
|
||||
.hsm = PMUX_HSM_##_hsm, \
|
||||
}
|
||||
|
||||
static const struct pmux_drvgrp_config e2220_1170_drvgrps[] = {
|
||||
};
|
||||
|
||||
#endif /* PINMUX_CONFIG_E2220_1170_H */
|
||||
|
|
@ -1,6 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* (C) Copyright 2013-2015
|
||||
* (C) Copyright 2013-2019
|
||||
* NVIDIA Corporation <www.nvidia.com>
|
||||
*/
|
||||
|
||||
|
|
@ -9,7 +9,6 @@
|
|||
#include <asm/arch/gpio.h>
|
||||
#include <asm/arch/pinmux.h>
|
||||
#include "../p2571/max77620_init.h"
|
||||
#include "pinmux-config-p2371-0000.h"
|
||||
|
||||
void pin_mux_mmc(void)
|
||||
{
|
||||
|
|
@ -30,21 +29,3 @@ void pin_mux_mmc(void)
|
|||
if (ret)
|
||||
printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret);
|
||||
}
|
||||
|
||||
/*
|
||||
* Routine: pinmux_init
|
||||
* Description: Do individual peripheral pinmux configs
|
||||
*/
|
||||
void pinmux_init(void)
|
||||
{
|
||||
pinmux_clear_tristate_input_clamping();
|
||||
|
||||
gpio_config_table(p2371_0000_gpio_inits,
|
||||
ARRAY_SIZE(p2371_0000_gpio_inits));
|
||||
|
||||
pinmux_config_pingrp_table(p2371_0000_pingrps,
|
||||
ARRAY_SIZE(p2371_0000_pingrps));
|
||||
|
||||
pinmux_config_drvgrp_table(p2371_0000_drvgrps,
|
||||
ARRAY_SIZE(p2371_0000_drvgrps));
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,267 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
|
||||
*/
|
||||
|
||||
/*
|
||||
* THIS FILE IS AUTO-GENERATED - DO NOT EDIT!
|
||||
*
|
||||
* To generate this file, use the tegra-pinmux-scripts tool available from
|
||||
* https://github.com/NVIDIA/tegra-pinmux-scripts
|
||||
* Run "board-to-uboot.py p2371-0000".
|
||||
*/
|
||||
|
||||
#ifndef _PINMUX_CONFIG_P2371_0000_H_
|
||||
#define _PINMUX_CONFIG_P2371_0000_H_
|
||||
|
||||
#define GPIO_INIT(_port, _gpio, _init) \
|
||||
{ \
|
||||
.gpio = TEGRA_GPIO(_port, _gpio), \
|
||||
.init = TEGRA_GPIO_INIT_##_init, \
|
||||
}
|
||||
|
||||
static const struct tegra_gpio_config p2371_0000_gpio_inits[] = {
|
||||
/* port, pin, init_val */
|
||||
GPIO_INIT(A, 5, IN),
|
||||
GPIO_INIT(E, 4, OUT0),
|
||||
GPIO_INIT(E, 6, IN),
|
||||
GPIO_INIT(G, 0, IN),
|
||||
GPIO_INIT(G, 3, OUT0),
|
||||
GPIO_INIT(H, 0, OUT0),
|
||||
GPIO_INIT(H, 2, IN),
|
||||
GPIO_INIT(H, 3, OUT0),
|
||||
GPIO_INIT(H, 4, OUT0),
|
||||
GPIO_INIT(H, 5, IN),
|
||||
GPIO_INIT(H, 6, OUT0),
|
||||
GPIO_INIT(H, 7, OUT0),
|
||||
GPIO_INIT(I, 0, OUT0),
|
||||
GPIO_INIT(I, 1, IN),
|
||||
GPIO_INIT(I, 2, OUT0),
|
||||
GPIO_INIT(I, 3, OUT0),
|
||||
GPIO_INIT(K, 4, IN),
|
||||
GPIO_INIT(K, 5, OUT0),
|
||||
GPIO_INIT(K, 6, IN),
|
||||
GPIO_INIT(K, 7, OUT0),
|
||||
GPIO_INIT(L, 0, OUT0),
|
||||
GPIO_INIT(S, 4, OUT0),
|
||||
GPIO_INIT(S, 5, OUT0),
|
||||
GPIO_INIT(S, 6, OUT0),
|
||||
GPIO_INIT(S, 7, OUT0),
|
||||
GPIO_INIT(T, 0, OUT0),
|
||||
GPIO_INIT(T, 1, OUT0),
|
||||
GPIO_INIT(V, 1, OUT0),
|
||||
GPIO_INIT(V, 2, OUT0),
|
||||
GPIO_INIT(V, 5, OUT0),
|
||||
GPIO_INIT(V, 6, OUT0),
|
||||
GPIO_INIT(V, 7, OUT1),
|
||||
GPIO_INIT(X, 0, IN),
|
||||
GPIO_INIT(X, 1, IN),
|
||||
GPIO_INIT(X, 2, IN),
|
||||
GPIO_INIT(X, 3, IN),
|
||||
GPIO_INIT(X, 4, IN),
|
||||
GPIO_INIT(X, 5, IN),
|
||||
GPIO_INIT(X, 6, IN),
|
||||
GPIO_INIT(X, 7, IN),
|
||||
GPIO_INIT(Y, 1, IN),
|
||||
GPIO_INIT(Z, 0, IN),
|
||||
GPIO_INIT(Z, 4, OUT0),
|
||||
GPIO_INIT(BB, 2, OUT0),
|
||||
GPIO_INIT(BB, 3, OUT0),
|
||||
GPIO_INIT(CC, 1, IN),
|
||||
GPIO_INIT(CC, 6, IN),
|
||||
GPIO_INIT(CC, 7, OUT0),
|
||||
};
|
||||
|
||||
#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \
|
||||
{ \
|
||||
.pingrp = PMUX_PINGRP_##_pingrp, \
|
||||
.func = PMUX_FUNC_##_mux, \
|
||||
.pull = PMUX_PULL_##_pull, \
|
||||
.tristate = PMUX_TRI_##_tri, \
|
||||
.io = PMUX_PIN_##_io, \
|
||||
.od = PMUX_PIN_OD_##_od, \
|
||||
.e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \
|
||||
.lock = PMUX_PIN_LOCK_DEFAULT, \
|
||||
}
|
||||
|
||||
static const struct pmux_pingrp_config p2371_0000_pingrps[] = {
|
||||
/* pingrp, mux, pull, tri, e_input, od, e_io_hv */
|
||||
PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH),
|
||||
PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH),
|
||||
PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PA6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP1_FS_PB0, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP1_DIN_PB1, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP1_DOUT_PB2, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP1_SCLK_PB3, I2S1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI2_MOSI_PB4, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI2_MISO_PB5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI2_SCK_PB6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI2_CS0_PB7, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI1_MOSI_PC0, SPI1, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI1_MISO_PC1, SPI1, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI1_SCK_PC2, SPI1, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI1_CS0_PC3, SPI1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI1_CS1_PC4, SPI1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI4_SCK_PC5, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI4_CS0_PC6, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI4_MOSI_PC7, SPI4, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI4_MISO_PD0, SPI4, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART3_RX_PD2, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART3_RTS_PD3, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART3_CTS_PD4, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC1_CLK_PE0, DMIC1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC1_DAT_PE1, DMIC1, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC2_CLK_PE2, DMIC2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC2_DAT_PE3, DMIC2, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC3_CLK_PE4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC3_DAT_PE5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PE6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(UART2_TX_PG0, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART2_RX_PG1, UARTB, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART2_RTS_PG2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART2_CTS_PG3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(WIFI_RST_PH1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PH6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(NFC_INT_PI1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GPS_RST_PI3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART4_CTS_PI7, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(DAP4_FS_PJ4, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP4_DIN_PJ5, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP4_DOUT_PJ6, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP4_SCLK_PJ7, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK0, I2S5B, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK1, I2S5B, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK2, I2S5B, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK3, I2S5B, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK4, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK6, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PL0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PL1, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(CAM_RST_PS4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM_AF_EN_PS5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM_FLASH_EN_PS6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM1_STROBE_PT1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART1_RX_PU1, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART1_RTS_PU2, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART1_CTS_PU3, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_BL_PWM_PV0, PWM0, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_RST_PV2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_GPIO1_PV3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(AP_READY_PV5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(TOUCH_RST_PV6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(TOUCH_CLK_PV7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(MODEM_WAKE_AP_PX0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(TOUCH_INT_PX1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(MOTION_INT_PX2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(ALS_PROX_INT_PX3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BUTTON_VOL_DOWN_PX7, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BUTTON_SLIDE_SW_PY0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_TE_PY2, DISPLAYA, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(CLK_32K_OUT_PY5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(AUD_MCLK_PBB0, AUD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DVFS_CLK_PBB2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GPIO_X1_AUD_PBB3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(HDMI_INT_DP_HPD_PCC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPDIF_IN_PCC3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(USB_VBUS_EN1_PCC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL),
|
||||
PINCFG(DP_HPD0_PCC6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PCC7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL),
|
||||
PINCFG(SPI2_CS1_PDD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_SCK_PEE0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_CS_N_PEE1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_IO0_PEE2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_IO1_PEE3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_IO2_PEE4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_IO3_PEE5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CLK_REQ, SYS, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
};
|
||||
|
||||
#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
|
||||
{ \
|
||||
.drvgrp = PMUX_DRVGRP_##_drvgrp, \
|
||||
.slwf = _slwf, \
|
||||
.slwr = _slwr, \
|
||||
.drvup = _drvup, \
|
||||
.drvdn = _drvdn, \
|
||||
.lpmd = PMUX_LPMD_##_lpmd, \
|
||||
.schmt = PMUX_SCHMT_##_schmt, \
|
||||
.hsm = PMUX_HSM_##_hsm, \
|
||||
}
|
||||
|
||||
static const struct pmux_drvgrp_config p2371_0000_drvgrps[] = {
|
||||
};
|
||||
|
||||
#endif /* PINMUX_CONFIG_P2371_0000_H */
|
||||
|
|
@ -1,6 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* (C) Copyright 2013-2015
|
||||
* (C) Copyright 2013-2019
|
||||
* NVIDIA Corporation <www.nvidia.com>
|
||||
*/
|
||||
|
||||
|
|
@ -13,7 +13,6 @@
|
|||
#include <asm/arch/pinmux.h>
|
||||
#include <asm/arch-tegra/cboot.h>
|
||||
#include "../p2571/max77620_init.h"
|
||||
#include "pinmux-config-p2371-2180.h"
|
||||
|
||||
void pin_mux_mmc(void)
|
||||
{
|
||||
|
|
@ -57,24 +56,6 @@ void pin_mux_mmc(void)
|
|||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Routine: pinmux_init
|
||||
* Description: Do individual peripheral pinmux configs
|
||||
*/
|
||||
void pinmux_init(void)
|
||||
{
|
||||
pinmux_clear_tristate_input_clamping();
|
||||
|
||||
gpio_config_table(p2371_2180_gpio_inits,
|
||||
ARRAY_SIZE(p2371_2180_gpio_inits));
|
||||
|
||||
pinmux_config_pingrp_table(p2371_2180_pingrps,
|
||||
ARRAY_SIZE(p2371_2180_pingrps));
|
||||
|
||||
pinmux_config_drvgrp_table(p2371_2180_drvgrps,
|
||||
ARRAY_SIZE(p2371_2180_drvgrps));
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PCI_TEGRA
|
||||
int tegra_pcie_board_init(void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -1,278 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
|
||||
*/
|
||||
|
||||
/*
|
||||
* THIS FILE IS AUTO-GENERATED - DO NOT EDIT!
|
||||
*
|
||||
* To generate this file, use the tegra-pinmux-scripts tool available from
|
||||
* https://github.com/NVIDIA/tegra-pinmux-scripts
|
||||
* Run "board-to-uboot.py p2371-2180".
|
||||
*/
|
||||
|
||||
#ifndef _PINMUX_CONFIG_P2371_2180_H_
|
||||
#define _PINMUX_CONFIG_P2371_2180_H_
|
||||
|
||||
#define GPIO_INIT(_port, _gpio, _init) \
|
||||
{ \
|
||||
.gpio = TEGRA_GPIO(_port, _gpio), \
|
||||
.init = TEGRA_GPIO_INIT_##_init, \
|
||||
}
|
||||
|
||||
static const struct tegra_gpio_config p2371_2180_gpio_inits[] = {
|
||||
/* port, pin, init_val */
|
||||
GPIO_INIT(A, 5, IN),
|
||||
GPIO_INIT(B, 0, IN),
|
||||
GPIO_INIT(B, 1, IN),
|
||||
GPIO_INIT(B, 2, IN),
|
||||
GPIO_INIT(B, 3, IN),
|
||||
GPIO_INIT(C, 0, IN),
|
||||
GPIO_INIT(C, 1, IN),
|
||||
GPIO_INIT(C, 2, IN),
|
||||
GPIO_INIT(C, 3, IN),
|
||||
GPIO_INIT(C, 4, IN),
|
||||
GPIO_INIT(E, 4, IN),
|
||||
GPIO_INIT(E, 5, IN),
|
||||
GPIO_INIT(E, 6, IN),
|
||||
GPIO_INIT(H, 0, OUT0),
|
||||
GPIO_INIT(H, 1, OUT0),
|
||||
GPIO_INIT(H, 2, IN),
|
||||
GPIO_INIT(H, 3, OUT0),
|
||||
GPIO_INIT(H, 4, OUT0),
|
||||
GPIO_INIT(H, 5, IN),
|
||||
GPIO_INIT(H, 6, IN),
|
||||
GPIO_INIT(H, 7, IN),
|
||||
GPIO_INIT(I, 0, OUT0),
|
||||
GPIO_INIT(I, 1, IN),
|
||||
GPIO_INIT(I, 2, OUT0),
|
||||
GPIO_INIT(K, 4, IN),
|
||||
GPIO_INIT(K, 5, OUT0),
|
||||
GPIO_INIT(K, 6, IN),
|
||||
GPIO_INIT(K, 7, IN),
|
||||
GPIO_INIT(L, 1, IN),
|
||||
GPIO_INIT(S, 4, OUT0),
|
||||
GPIO_INIT(S, 5, OUT0),
|
||||
GPIO_INIT(S, 6, OUT0),
|
||||
GPIO_INIT(S, 7, OUT0),
|
||||
GPIO_INIT(T, 0, OUT0),
|
||||
GPIO_INIT(T, 1, OUT0),
|
||||
GPIO_INIT(U, 2, IN),
|
||||
GPIO_INIT(U, 3, IN),
|
||||
GPIO_INIT(V, 1, OUT0),
|
||||
GPIO_INIT(V, 2, OUT0),
|
||||
GPIO_INIT(V, 3, IN),
|
||||
GPIO_INIT(V, 5, OUT0),
|
||||
GPIO_INIT(V, 6, OUT0),
|
||||
GPIO_INIT(X, 0, IN),
|
||||
GPIO_INIT(X, 1, IN),
|
||||
GPIO_INIT(X, 2, IN),
|
||||
GPIO_INIT(X, 3, IN),
|
||||
GPIO_INIT(X, 4, IN),
|
||||
GPIO_INIT(X, 5, IN),
|
||||
GPIO_INIT(X, 6, IN),
|
||||
GPIO_INIT(X, 7, IN),
|
||||
GPIO_INIT(Y, 0, IN),
|
||||
GPIO_INIT(Y, 1, IN),
|
||||
GPIO_INIT(Z, 0, IN),
|
||||
GPIO_INIT(Z, 2, IN),
|
||||
GPIO_INIT(Z, 3, OUT0),
|
||||
GPIO_INIT(BB, 0, IN),
|
||||
GPIO_INIT(BB, 2, OUT0),
|
||||
GPIO_INIT(BB, 3, IN),
|
||||
GPIO_INIT(CC, 1, IN),
|
||||
};
|
||||
|
||||
#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \
|
||||
{ \
|
||||
.pingrp = PMUX_PINGRP_##_pingrp, \
|
||||
.func = PMUX_FUNC_##_mux, \
|
||||
.pull = PMUX_PULL_##_pull, \
|
||||
.tristate = PMUX_TRI_##_tri, \
|
||||
.io = PMUX_PIN_##_io, \
|
||||
.od = PMUX_PIN_OD_##_od, \
|
||||
.e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \
|
||||
.lock = PMUX_PIN_LOCK_DEFAULT, \
|
||||
}
|
||||
|
||||
static const struct pmux_pingrp_config p2371_2180_pingrps[] = {
|
||||
/* pingrp, mux, pull, tri, e_input, od, e_io_hv */
|
||||
PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH),
|
||||
PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH),
|
||||
PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PA6, SATA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP1_FS_PB0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP1_DIN_PB1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP1_DOUT_PB2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP1_SCLK_PB3, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI2_MOSI_PB4, SPI2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI2_MISO_PB5, SPI2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI2_SCK_PB6, SPI2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI2_CS0_PB7, SPI2, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI1_MOSI_PC0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI1_MISO_PC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI1_SCK_PC2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI1_CS0_PC3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI1_CS1_PC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI4_SCK_PC5, SPI4, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI4_CS0_PC6, SPI4, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI4_MOSI_PC7, SPI4, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI4_MISO_PD0, SPI4, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART3_RX_PD2, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART3_RTS_PD3, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART3_CTS_PD4, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC1_CLK_PE0, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC1_DAT_PE1, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC2_CLK_PE2, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC2_DAT_PE3, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC3_CLK_PE4, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC3_DAT_PE5, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PE6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(UART2_TX_PG0, UARTB, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART2_RX_PG1, UARTB, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART2_RTS_PG2, UARTB, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART2_CTS_PG3, UARTB, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(WIFI_RST_PH1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PH6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(AP_WAKE_NFC_PH7, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(NFC_INT_PI1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GPS_RST_PI3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART4_CTS_PI7, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(DAP4_FS_PJ4, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP4_DIN_PJ5, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP4_DOUT_PJ6, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP4_SCLK_PJ7, I2S4B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK0, I2S5B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK1, I2S5B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK2, I2S5B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK3, I2S5B, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK7, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PL0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PL1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(CAM_RST_PS4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM_AF_EN_PS5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM_FLASH_EN_PS6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM1_STROBE_PT1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART1_RX_PU1, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART1_RTS_PU2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART1_CTS_PU3, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_BL_PWM_PV0, PWM0, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_RST_PV2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_GPIO1_PV3, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(AP_READY_PV5, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(TOUCH_RST_PV6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(TOUCH_CLK_PV7, TOUCH, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(MODEM_WAKE_AP_PX0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(TOUCH_INT_PX1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(MOTION_INT_PX2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(ALS_PROX_INT_PX3, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BUTTON_VOL_DOWN_PX7, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BUTTON_SLIDE_SW_PY0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_TE_PY2, DISPLAYA, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(CLK_32K_OUT_PY5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(AUD_MCLK_PBB0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DVFS_CLK_PBB2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GPIO_X1_AUD_PBB3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(HDMI_INT_DP_HPD_PCC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPDIF_IN_PCC3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(USB_VBUS_EN1_PCC5, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(DP_HPD0_PCC6, DP, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PCC7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL),
|
||||
PINCFG(SPI2_CS1_PDD0, SPI2, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_SCK_PEE0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_CS_N_PEE1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_IO0_PEE2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_IO1_PEE3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_IO2_PEE4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_IO3_PEE5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CLK_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
};
|
||||
|
||||
#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
|
||||
{ \
|
||||
.drvgrp = PMUX_DRVGRP_##_drvgrp, \
|
||||
.slwf = _slwf, \
|
||||
.slwr = _slwr, \
|
||||
.drvup = _drvup, \
|
||||
.drvdn = _drvdn, \
|
||||
.lpmd = PMUX_LPMD_##_lpmd, \
|
||||
.schmt = PMUX_SCHMT_##_schmt, \
|
||||
.hsm = PMUX_HSM_##_hsm, \
|
||||
}
|
||||
|
||||
static const struct pmux_drvgrp_config p2371_2180_drvgrps[] = {
|
||||
};
|
||||
|
||||
#endif /* PINMUX_CONFIG_P2371_2180_H */
|
||||
|
|
@ -1,6 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* (C) Copyright 2013-2015
|
||||
* (C) Copyright 2013-2019
|
||||
* NVIDIA Corporation <www.nvidia.com>
|
||||
*/
|
||||
|
||||
|
|
@ -10,7 +10,6 @@
|
|||
#include <asm/arch/pinmux.h>
|
||||
#include <asm/gpio.h>
|
||||
#include "max77620_init.h"
|
||||
#include "pinmux-config-p2571.h"
|
||||
|
||||
void pin_mux_mmc(void)
|
||||
{
|
||||
|
|
@ -32,24 +31,6 @@ void pin_mux_mmc(void)
|
|||
printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret);
|
||||
}
|
||||
|
||||
/*
|
||||
* Routine: pinmux_init
|
||||
* Description: Do individual peripheral pinmux configs
|
||||
*/
|
||||
void pinmux_init(void)
|
||||
{
|
||||
pinmux_clear_tristate_input_clamping();
|
||||
|
||||
gpio_config_table(p2571_gpio_inits,
|
||||
ARRAY_SIZE(p2571_gpio_inits));
|
||||
|
||||
pinmux_config_pingrp_table(p2571_pingrps,
|
||||
ARRAY_SIZE(p2571_pingrps));
|
||||
|
||||
pinmux_config_drvgrp_table(p2571_drvgrps,
|
||||
ARRAY_SIZE(p2571_drvgrps));
|
||||
}
|
||||
|
||||
/*
|
||||
* Routine: start_cpu_fan
|
||||
* Description: Enable/start PWM CPU fan on P2571
|
||||
|
|
|
|||
|
|
@ -1,242 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
|
||||
*/
|
||||
|
||||
/*
|
||||
* THIS FILE IS AUTO-GENERATED - DO NOT EDIT!
|
||||
*
|
||||
* To generate this file, use the tegra-pinmux-scripts tool available from
|
||||
* https://github.com/NVIDIA/tegra-pinmux-scripts
|
||||
* Run "board-to-uboot.py p2571".
|
||||
*/
|
||||
|
||||
#ifndef _PINMUX_CONFIG_P2571_H_
|
||||
#define _PINMUX_CONFIG_P2571_H_
|
||||
|
||||
#define GPIO_INIT(_port, _gpio, _init) \
|
||||
{ \
|
||||
.gpio = TEGRA_GPIO(_port, _gpio), \
|
||||
.init = TEGRA_GPIO_INIT_##_init, \
|
||||
}
|
||||
|
||||
static const struct tegra_gpio_config p2571_gpio_inits[] = {
|
||||
/* port, pin, init_val */
|
||||
GPIO_INIT(A, 0, IN),
|
||||
GPIO_INIT(A, 5, IN),
|
||||
GPIO_INIT(D, 4, IN),
|
||||
GPIO_INIT(E, 4, OUT0),
|
||||
GPIO_INIT(G, 0, IN),
|
||||
GPIO_INIT(H, 0, OUT0),
|
||||
GPIO_INIT(H, 2, IN),
|
||||
GPIO_INIT(H, 3, OUT0),
|
||||
GPIO_INIT(H, 4, OUT0),
|
||||
GPIO_INIT(H, 5, IN),
|
||||
GPIO_INIT(I, 0, OUT0),
|
||||
GPIO_INIT(I, 1, IN),
|
||||
GPIO_INIT(V, 1, OUT0),
|
||||
GPIO_INIT(V, 6, OUT1),
|
||||
GPIO_INIT(X, 4, IN),
|
||||
GPIO_INIT(X, 6, IN),
|
||||
GPIO_INIT(X, 7, IN),
|
||||
GPIO_INIT(Y, 1, IN),
|
||||
GPIO_INIT(Z, 0, IN),
|
||||
GPIO_INIT(Z, 4, OUT0),
|
||||
GPIO_INIT(BB, 2, OUT0),
|
||||
GPIO_INIT(CC, 1, IN),
|
||||
GPIO_INIT(CC, 3, IN),
|
||||
};
|
||||
|
||||
#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \
|
||||
{ \
|
||||
.pingrp = PMUX_PINGRP_##_pingrp, \
|
||||
.func = PMUX_FUNC_##_mux, \
|
||||
.pull = PMUX_PULL_##_pull, \
|
||||
.tristate = PMUX_TRI_##_tri, \
|
||||
.io = PMUX_PIN_##_io, \
|
||||
.od = PMUX_PIN_OD_##_od, \
|
||||
.e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \
|
||||
.lock = PMUX_PIN_LOCK_DEFAULT, \
|
||||
}
|
||||
|
||||
static const struct pmux_pingrp_config p2571_pingrps[] = {
|
||||
/* pingrp, mux, pull, tri, e_input, od, e_io_hv */
|
||||
PINCFG(PEX_L0_RST_N_PA0, DEFAULT, UP, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(PEX_L0_CLKREQ_N_PA1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL),
|
||||
PINCFG(PEX_WAKE_N_PA2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL),
|
||||
PINCFG(PEX_L1_RST_N_PA3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL),
|
||||
PINCFG(PEX_L1_CLKREQ_N_PA4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL),
|
||||
PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PA6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP1_FS_PB0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP1_DIN_PB1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP1_DOUT_PB2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP1_SCLK_PB3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI2_MOSI_PB4, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI2_MISO_PB5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI2_SCK_PB6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI2_CS0_PB7, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI1_MOSI_PC0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI1_MISO_PC1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI1_SCK_PC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI1_CS0_PC3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI1_CS1_PC4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI4_SCK_PC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI4_CS0_PC6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI4_MOSI_PC7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPI4_MISO_PD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART3_TX_PD1, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART3_RX_PD2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART3_RTS_PD3, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART3_CTS_PD4, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC1_CLK_PE0, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC1_DAT_PE1, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC2_CLK_PE2, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC2_DAT_PE3, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC3_CLK_PE4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DMIC3_DAT_PE5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PE6, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(UART2_TX_PG0, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART2_RX_PG1, UARTB, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART2_RTS_PG2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART2_CTS_PG3, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(WIFI_RST_PH1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PH6, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(AP_WAKE_NFC_PH7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(NFC_INT_PI1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GPS_EN_PI2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GPS_RST_PI3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART4_CTS_PI7, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(DAP4_FS_PJ4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP4_DIN_PJ5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP4_DOUT_PJ6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP4_SCLK_PJ7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK0, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK1, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK3, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PK7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PL0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PL1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM1_MCLK_PS0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM2_MCLK_PS1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(CAM_RST_PS4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM_AF_EN_PS5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM_FLASH_EN_PS6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM1_PWDN_PS7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM2_PWDN_PT0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CAM1_STROBE_PT1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART1_RX_PU1, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART1_RTS_PU2, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(UART1_CTS_PU3, UARTA, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_BL_PWM_PV0, PWM0, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_RST_PV2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_GPIO1_PV3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(AP_READY_PV5, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(TOUCH_RST_PV6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(TOUCH_CLK_PV7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(MODEM_WAKE_AP_PX0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(TOUCH_INT_PX1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(MOTION_INT_PX2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(ALS_PROX_INT_PX3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BUTTON_POWER_ON_PX5, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BUTTON_VOL_DOWN_PX7, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BUTTON_SLIDE_SW_PY0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(LCD_TE_PY2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(CLK_32K_OUT_PY5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(AUD_MCLK_PBB0, AUD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(DVFS_CLK_PBB2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GPIO_X1_AUD_PBB3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(HDMI_INT_DP_HPD_PCC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, NORMAL),
|
||||
PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SPDIF_IN_PCC3, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(USB_VBUS_EN0_PCC4, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(USB_VBUS_EN1_PCC5, USB, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
||||
PINCFG(DP_HPD0_PCC6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PCC7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL),
|
||||
PINCFG(SPI2_CS1_PDD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_SCK_PEE0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_CS_N_PEE1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_IO0_PEE2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_IO1_PEE3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_IO2_PEE4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(QSPI_IO3_PEE5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||
PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(CLK_REQ, SYS, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||
};
|
||||
|
||||
#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
|
||||
{ \
|
||||
.drvgrp = PMUX_DRVGRP_##_drvgrp, \
|
||||
.slwf = _slwf, \
|
||||
.slwr = _slwr, \
|
||||
.drvup = _drvup, \
|
||||
.drvdn = _drvdn, \
|
||||
.lpmd = PMUX_LPMD_##_lpmd, \
|
||||
.schmt = PMUX_SCHMT_##_schmt, \
|
||||
.hsm = PMUX_HSM_##_hsm, \
|
||||
}
|
||||
|
||||
static const struct pmux_drvgrp_config p2571_drvgrps[] = {
|
||||
};
|
||||
|
||||
#endif /* PINMUX_CONFIG_P2571_H */
|
||||
Loading…
Reference in New Issue
Block a user