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fsl_dma: Fix Channel Start bug in dma_check()

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The Channel Start (CS) bit in the Mode Register (MR) should actually be
cleared as the comment in the code suggests.  Previously, CS was being
set, not cleared.

Assuming normal operation of the DMA engine, this change shouldn't have
any real affect.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Peter Tyser 2009-06-30 17:15:44 -05:00 committed by Kumar Gala
parent 51402ac12b
commit 484919cf33
1 changed files with 1 additions and 1 deletions
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2
drivers/dma/fsl_dma.c
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@ -60,7 +60,7 @@ static uint dma_check(void) {
} while (status & FSL_DMA_SR_CB);
/* clear MR[CS] channel start bit */
out_be32(&dma->mr, in_be32(&dma->mr) & FSL_DMA_MR_CS);
out_be32(&dma->mr, in_be32(&dma->mr) & ~FSL_DMA_MR_CS);
dma_sync();
if (status != 0)