brain-hackers_pepepper-mirror/u-boot-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/u-boot-brain synced 2024-09-30 08:30:50 +09:00
Code Issues Projects Releases Wiki Activity

ram: rk3399: Avoid two channel ZQ Cal Start at the same time

Browse Source 
It is possible in lpddr4 dram, where both the channels would
start at same time with ZQ Cal Start. If it uses ZQ Call start
then it will use RZQ.

For example LPDDR4 366 Dual-Die, Quad-Channel Package, RZQ maybe
connect to both channel. If ZQ Cal Start at the same time,
it will use the same RZQ.

It is not a problem of using RZQ in both the channels, but can not
use at the same time.

So, to avoid this, we have an option of dram tINIT3 value for
increasing the frequency for channel 1.

This patch increase the available tINIT3 with existing running
dram frequency.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
This commit is contained in:
Jagan Teki 2019-07-16 17:27:13 +05:30 committed by Kever Yang
parent 5cbc866981
commit 47627c8a5c
1 changed files with 14 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
drivers/ram/rockchip/sdram_rk3399.c
View File

@ -550,6 +550,20 @@ static int pctl_cfg(struct dram_info *dram, const struct chan_info *chan,
sizeof(struct rk3399_ddr_pctl_regs) - 4);
writel(params_ctl[0], &denali_ctl[0]);
/*
* two channel init at the same time, then ZQ Cal Start
* at the same time, it will use the same RZQ, but cannot
* start at the same time.
*
* So, increase tINIT3 for channel 1, will avoid two
* channel ZQ Cal Start at the same time
*/
if (params->base.dramtype == LPDDR4 && channel == 1) {
tmp = ((params->base.ddr_freq * MHz + 999) / 1000);
tmp1 = readl(&denali_ctl[14]);
writel(tmp + tmp1, &denali_ctl[14]);
}
copy_to_reg(denali_pi, &params->pi_regs.denali_pi[0],
sizeof(struct rk3399_ddr_pi_regs));