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arm: ls1021a: Add sata support on qds and twr board
Freescale ARM-based Layerscape LS102xA contain a SATA controller which comply with the serial ATA 3.0 specification and the AHCI 1.3 specification. This patch adds SATA feature on ls1021aqds and ls1021atwr boards. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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@ -9,6 +9,7 @@ obj-y += clock.o
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obj-y += timer.o
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obj-y += fsl_epu.o
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obj-$(CONFIG_SCSI_AHCI_PLAT) += ls102xa_sata.o
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obj-$(CONFIG_OF_LIBFDT) += fdt.o
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obj-$(CONFIG_SYS_HAS_SERDES) += fsl_ls1_serdes.o ls102xa_serdes.o
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obj-$(CONFIG_SPL) += spl.o
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42
arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c
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42
arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c
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@ -0,0 +1,42 @@
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/*
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* Copyright 2015 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/immap_ls102xa.h>
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#include <ahci.h>
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#include <scsi.h>
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/* port register default value */
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#define AHCI_PORT_PHY_1_CFG 0xa003fffe
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#define AHCI_PORT_PHY_2_CFG 0x28183411
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#define AHCI_PORT_PHY_3_CFG 0x0e081004
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#define AHCI_PORT_PHY_4_CFG 0x00480811
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#define AHCI_PORT_PHY_5_CFG 0x192c96a4
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#define AHCI_PORT_TRANS_CFG 0x08000025
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#define SATA_ECC_REG_ADDR 0x20220520
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#define SATA_ECC_DISABLE 0x00020000
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int ls1021a_sata_init(void)
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{
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struct ccsr_ahci __iomem *ccsr_ahci = (void *)AHCI_BASE_ADDR;
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#ifdef CONFIG_SYS_FSL_ERRATUM_A008407
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out_le32((void *)SATA_ECC_REG_ADDR, SATA_ECC_DISABLE);
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#endif
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out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
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out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY_2_CFG);
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out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY_3_CFG);
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out_le32(&ccsr_ahci->pp4c, AHCI_PORT_PHY_4_CFG);
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out_le32(&ccsr_ahci->pp5c, AHCI_PORT_PHY_5_CFG);
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out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG);
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ahci_init((void __iomem *)AHCI_BASE_ADDR);
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scsi_scan(0);
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return 0;
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}
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@ -79,6 +79,21 @@
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#define CONFIG_SYS_PCIE2_PHYS_ADDR (CONFIG_SYS_PCIE2_PHYS_BASE + \
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CONFIG_SYS_PCIE2_VIRT_ADDR)
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/* SATA */
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#define AHCI_BASE_ADDR (CONFIG_SYS_IMMR + 0x02200000)
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#define CONFIG_BOARD_LATE_INIT
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#define CONFIG_CMD_SCSI
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#define CONFIG_LIBATA
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#define CONFIG_SCSI_AHCI
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#define CONFIG_SCSI_AHCI_PLAT
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#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
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#define CONFIG_SYS_SCSI_MAX_LUN 1
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#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
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CONFIG_SYS_SCSI_MAX_LUN)
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#define CONFIG_CMD_FAT
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#define CONFIG_DOS_PARTITION
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#define CONFIG_SYS_FSL_ERRATUM_A008407
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#ifdef CONFIG_DDR_SPD
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#define CONFIG_SYS_FSL_DDR_BE
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#define CONFIG_VERY_BIG_RAM
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@ -398,4 +398,28 @@ struct ccsr_cci400 {
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u8 res_e004[0x10000 - 0xe004];
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};
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/* AHCI (sata) register map */
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struct ccsr_ahci {
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u32 res1[0xa4/4]; /* 0x0 - 0xa4 */
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u32 pcfg; /* port config */
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u32 ppcfg; /* port phy1 config */
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u32 pp2c; /* port phy2 config */
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u32 pp3c; /* port phy3 config */
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u32 pp4c; /* port phy4 config */
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u32 pp5c; /* port phy5 config */
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u32 paxic; /* port AXI config */
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u32 axicc; /* AXI cache control */
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u32 axipc; /* AXI PROT control */
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u32 ptc; /* port Trans Config */
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u32 pts; /* port Trans Status */
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u32 plc; /* port link config */
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u32 plc1; /* port link config1 */
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u32 plc2; /* port link config2 */
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u32 pls; /* port link status */
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u32 pls1; /* port link status1 */
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u32 pcmdc; /* port CMD config */
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u32 ppcs; /* port phy control status */
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u32 pberr; /* port 0/1 BIST error */
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u32 cmds; /* port 0/1 CMD status error */
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};
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#endif /* __ASM_ARCH_LS102XA_IMMAP_H_ */
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11
arch/arm/include/asm/arch-ls102xa/ls102xa_sata.h
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11
arch/arm/include/asm/arch-ls102xa/ls102xa_sata.h
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@ -0,0 +1,11 @@
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/*
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* Copyright 2015 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __FSL_SATA_H_
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#define __FSL_SATA_H_
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int ls1021a_sata_init(void);
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#endif
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@ -12,6 +12,7 @@
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#include <asm/arch/fsl_serdes.h>
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#include <asm/arch/ls102xa_stream_id.h>
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#include <asm/arch/ls102xa_devdis.h>
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#include <asm/arch/ls102xa_sata.h>
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#include <hwconfig.h>
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#include <mmc.h>
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#include <fsl_csu.h>
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@ -407,6 +408,17 @@ int config_serdes_mux(void)
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return 0;
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}
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#ifdef CONFIG_BOARD_LATE_INIT
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int board_late_init(void)
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{
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#ifdef CONFIG_SCSI_AHCI_PLAT
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ls1021a_sata_init();
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#endif
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return 0;
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}
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#endif
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int misc_init_r(void)
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{
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int conflict_flag;
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@ -12,6 +12,7 @@
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#include <asm/arch/fsl_serdes.h>
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#include <asm/arch/ls102xa_stream_id.h>
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#include <asm/arch/ls102xa_devdis.h>
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#include <asm/arch/ls102xa_sata.h>
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#include <hwconfig.h>
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#include <mmc.h>
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#include <fsl_csu.h>
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@ -565,6 +566,17 @@ int board_init(void)
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return 0;
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}
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#ifdef CONFIG_BOARD_LATE_INIT
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int board_late_init(void)
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{
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#ifdef CONFIG_SCSI_AHCI_PLAT
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ls1021a_sata_init();
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#endif
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return 0;
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}
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#endif
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#if defined(CONFIG_MISC_INIT_R)
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int misc_init_r(void)
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{
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