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drivers: serial: mcfuart: add DT support

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This patch adds devicetree support to the mcfuart.c driver
and removes non DM code.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
This commit is contained in:
Angelo Dureghello 2019-03-13 21:46:49 +01:00 committed by Tom Rini
parent 25bfc0b1e8
commit 461ea07963
2 changed files with 36 additions and 78 deletions
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8
drivers/serial/Kconfig
View File

@ -559,6 +559,14 @@ config MVEBU_A3700_UART
Choose this option to add support for UART driver on the Marvell
Armada 3700 SoC. The base address is configured via DT.
config MCFUART
bool "Freescale ColdFire UART support"
help
Choose this option to add support for UART driver on the ColdFire
SoC's family. The serial communication channel provides a full-duplex
asynchronous/synchronous receiver and transmitter deriving an
operating frequency from the internal bus clock or an external clock.
config MXC_UART
bool "IMX serial port support"
depends on MX5 || MX6

106
drivers/serial/mcfuart.c
View File

@ -5,6 +5,9 @@
*
* Modified to add device model (DM) support
* (C) Copyright 2015 Angelo Dureghello <angelo@sysam.it>
*
* Modified to add DM and fdt support, removed non DM code
* (C) Copyright 2018 Angelo Dureghello <angelo@sysam.it>
*/
/*
@ -78,83 +81,6 @@ static void mcf_serial_setbrg_common(uart_t *uart, int baudrate)
writeb(UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED, &uart->ucr);
}
#ifndef CONFIG_DM_SERIAL
static int mcf_serial_init(void)
{
uart_t *uart_base;
int port_idx;
uart_base = (uart_t *)CONFIG_SYS_UART_BASE;
port_idx = CONFIG_SYS_UART_PORT;
return mcf_serial_init_common(uart_base, port_idx, gd->baudrate);
}
static void mcf_serial_putc(const char c)
{
uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE;
if (c == '\n')
serial_putc('\r');
/* Wait for last character to go. */
while (!(readb(&uart->usr) & UART_USR_TXRDY))
;
writeb(c, &uart->utb);
}
static int mcf_serial_getc(void)
{
uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE;
/* Wait for a character to arrive. */
while (!(readb(&uart->usr) & UART_USR_RXRDY))
;
return readb(&uart->urb);
}
static void mcf_serial_setbrg(void)
{
uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE;
mcf_serial_setbrg_common(uart, gd->baudrate);
}
static int mcf_serial_tstc(void)
{
uart_t *uart = (uart_t *)CONFIG_SYS_UART_BASE;
return readb(&uart->usr) & UART_USR_RXRDY;
}
static struct serial_device mcf_serial_drv = {
.name = "mcf_serial",
.start = mcf_serial_init,
.stop = NULL,
.setbrg = mcf_serial_setbrg,
.putc = mcf_serial_putc,
.puts = default_serial_puts,
.getc = mcf_serial_getc,
.tstc = mcf_serial_tstc,
};
void mcf_serial_initialize(void)
{
serial_register(&mcf_serial_drv);
}
__weak struct serial_device *default_serial_console(void)
{
return &mcf_serial_drv;
}
#endif
#ifdef CONFIG_DM_SERIAL
static int coldfire_serial_probe(struct udevice *dev)
{
struct coldfire_serial_platdata *plat = dev->platdata;
@ -212,6 +138,23 @@ static int coldfire_serial_pending(struct udevice *dev, bool input)
return 0;
}
static int coldfire_ofdata_to_platdata(struct udevice *dev)
{
struct coldfire_serial_platdata *plat = dev_get_platdata(dev);
fdt_addr_t addr_base;
addr_base = devfdt_get_addr(dev);
if (addr_base == FDT_ADDR_T_NONE)
return -ENODEV;
plat->base = (uint32_t)addr_base;
plat->port = dev->seq;
plat->baudrate = gd->baudrate;
return 0;
}
static const struct dm_serial_ops coldfire_serial_ops = {
.putc = coldfire_serial_putc,
.pending = coldfire_serial_pending,
@ -219,11 +162,18 @@ static const struct dm_serial_ops coldfire_serial_ops = {
.setbrg = coldfire_serial_setbrg,
};
static const struct udevice_id coldfire_serial_ids[] = {
{ .compatible = "fsl,mcf-uart" },
{ }
};
U_BOOT_DRIVER(serial_coldfire) = {
.name = "serial_coldfire",
.id = UCLASS_SERIAL,
.of_match = coldfire_serial_ids,
.ofdata_to_platdata = coldfire_ofdata_to_platdata,
.platdata_auto_alloc_size = sizeof(struct coldfire_serial_platdata),
.probe = coldfire_serial_probe,
.ops = &coldfire_serial_ops,
.flags = DM_FLAG_PRE_RELOC,
};
#endif