arm64: layerscape: Move CONFIG_HAS_FSL_XHCI_USB to Kconfig

Use Kconfig to select QE-HDLC and USB pin-mux.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Ran Wang 2017-10-23 10:09:21 +08:00 committed by York Sun
parent 2af1b08a1a
commit 4417e83495
14 changed files with 7 additions and 39 deletions

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@ -490,3 +490,10 @@ config SYS_MC_RSV_MEM_ALIGN
config SPL_LDSCRIPT
default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARCH_LS1043A || ARCH_LS1046A || ARCH_LS2080A
config HAS_FSL_XHCI_USB
bool
default y if ARCH_LS1043A || ARCH_LS1046A
help
For some SoC(such as LS1043A and LS1046A), USB and QE-HDLC multiplex use
pins, select it when the pins are assigned to USB.

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@ -34,12 +34,8 @@
/*
* USB
*/
#define CONFIG_HAS_FSL_XHCI_USB
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#endif
#define CONFIG_CMD_MEMINFO
#define CONFIG_CMD_MEMTEST

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@ -119,12 +119,8 @@
#endif
/*XHCI Support - enabled by default*/
#define CONFIG_HAS_FSL_XHCI_USB
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#endif
/* MMC */
#ifdef CONFIG_MMC

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@ -22,12 +22,8 @@
/*
* USB
*/
#define CONFIG_HAS_FSL_XHCI_USB
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#endif
/*
* I2C IO expander

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@ -20,12 +20,8 @@
#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE
/* XHCI Support - enabled by default */
#define CONFIG_HAS_FSL_XHCI_USB
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#endif
#define CONFIG_SYS_CLK_FREQ 100000000
#define CONFIG_DDR_CLK_FREQ 100000000

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@ -405,12 +405,8 @@ unsigned long get_board_ddr_clk(void);
#endif
/*XHCI Support - enabled by default*/
#define CONFIG_HAS_FSL_XHCI_USB
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#endif
/*
* Video

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@ -45,12 +45,8 @@
#endif
/* XHCI Support - enabled by default */
#define CONFIG_HAS_FSL_XHCI_USB
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#endif
#define CONFIG_SYS_CLK_FREQ 100000000
#define CONFIG_DDR_CLK_FREQ 100000000

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@ -371,11 +371,8 @@ unsigned long get_board_ddr_clk(void);
#endif
/* USB */
#define CONFIG_HAS_FSL_XHCI_USB
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
#endif
/*
* Miscellaneous configurable options

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@ -286,12 +286,9 @@
/* USB */
#ifndef SPL_NO_USB
#define CONFIG_HAS_FSL_XHCI_USB
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
#endif
#endif
/* SATA */
#ifndef SPL_NO_SATA

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@ -137,11 +137,8 @@ unsigned long get_board_ddr_clk(void);
#endif
/* USB */
#define CONFIG_HAS_FSL_XHCI_USB
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
#endif
/* SATA */
#define CONFIG_LIBATA

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@ -211,12 +211,9 @@
/* USB */
#ifndef SPL_NO_USB
#define CONFIG_HAS_FSL_XHCI_USB
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
#endif
#endif
/* SATA */
#ifndef SPL_NO_SATA

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@ -438,7 +438,6 @@ unsigned long get_board_ddr_clk(void);
/*
* USB
*/
#define CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2

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@ -336,7 +336,6 @@ unsigned long get_board_sys_clk(void);
/*
* USB
*/
#define CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2

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@ -873,7 +873,6 @@ CONFIG_HAS_ETH7
CONFIG_HAS_FEC
CONFIG_HAS_FSL_DR_USB
CONFIG_HAS_FSL_MPH_USB
CONFIG_HAS_FSL_XHCI_USB
CONFIG_HAS_POST
CONFIG_HCLK_FREQ
CONFIG_HDBOOT