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ppc/85xx: Move to using fsl_setup_hose on MPC8572 DS
We can use fsl_setup_hose to determine if we are a agent/end-point or a host. Rather than using some SoC specific register we can just look at the PCI cfg space of the host controller to determine this. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright 2007-2008 Freescale Semiconductor, Inc.
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* Copyright 2007-2009 Freescale Semiconductor, Inc.
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*
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*
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* See file CREDITS for list of people who contributed to this
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* See file CREDITS for list of people who contributed to this
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* project.
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* project.
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@ -165,7 +165,7 @@ void pci_init_board(void)
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{
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{
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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struct fsl_pci_info pci_info[3];
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struct fsl_pci_info pci_info[3];
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u32 devdisr, pordevsr, io_sel, host_agent, temp32;
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u32 devdisr, pordevsr, io_sel, temp32;
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int first_free_busno = 0;
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int first_free_busno = 0;
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int num = 0;
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int num = 0;
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@ -174,10 +174,8 @@ void pci_init_board(void)
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devdisr = in_be32(&gur->devdisr);
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devdisr = in_be32(&gur->devdisr);
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pordevsr = in_be32(&gur->pordevsr);
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pordevsr = in_be32(&gur->pordevsr);
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io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
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io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
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host_agent = (in_be32(&gur->porbmsr) & MPC85xx_PORBMSR_HA) >> 16;
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debug (" pci_init_board: devdisr=%x, io_sel=%x, host_agent=%x\n",
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debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
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devdisr, io_sel, host_agent);
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if (!(pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS))
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if (!(pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS))
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printf (" eTSEC1 is in sgmii mode.\n");
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printf (" eTSEC1 is in sgmii mode.\n");
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@ -190,11 +188,11 @@ void pci_init_board(void)
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puts("\n");
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puts("\n");
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#ifdef CONFIG_PCIE3
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#ifdef CONFIG_PCIE3
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pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_3, host_agent);
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pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel);
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pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel);
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if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)){
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if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)){
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SET_STD_PCIE_INFO(pci_info[num], 3);
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SET_STD_PCIE_INFO(pci_info[num], 3);
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pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs);
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printf (" PCIE3 connected to ULI as %s (base addr %lx)\n",
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printf (" PCIE3 connected to ULI as %s (base addr %lx)\n",
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pcie_ep ? "End Point" : "Root Complex",
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pcie_ep ? "End Point" : "Root Complex",
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pci_info[num].regs);
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pci_info[num].regs);
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@ -222,11 +220,11 @@ void pci_init_board(void)
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#endif
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#endif
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#ifdef CONFIG_PCIE2
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#ifdef CONFIG_PCIE2
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pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_2, host_agent);
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pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
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pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
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if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)){
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if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)){
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SET_STD_PCIE_INFO(pci_info[num], 2);
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SET_STD_PCIE_INFO(pci_info[num], 2);
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pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
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printf (" PCIE2 connected to Slot 1 as %s (base addr %lx)\n",
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printf (" PCIE2 connected to Slot 1 as %s (base addr %lx)\n",
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pcie_ep ? "End Point" : "Root Complex",
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pcie_ep ? "End Point" : "Root Complex",
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pci_info[num].regs);
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pci_info[num].regs);
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@ -242,11 +240,11 @@ void pci_init_board(void)
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#endif
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#endif
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#ifdef CONFIG_PCIE1
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#ifdef CONFIG_PCIE1
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pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_1, host_agent);
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pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
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pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
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if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
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if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
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SET_STD_PCIE_INFO(pci_info[num], 1);
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SET_STD_PCIE_INFO(pci_info[num], 1);
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pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
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printf (" PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
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printf (" PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
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pcie_ep ? "End Point" : "Root Complex",
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pcie_ep ? "End Point" : "Root Complex",
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pci_info[num].regs);
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pci_info[num].regs);
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