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https://github.com/brain-hackers/u-boot-brain
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Blackfin: drop dead/wrong debug code in initdram()
The DEBUG code in initdram() is quite old and was never really useful, so just drop it altogether. Common Blackfin debug code does a better job. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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65ba1abd3b
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41f3325ae9
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@ -40,21 +40,9 @@ int checkboard(void)
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phys_size_t initdram(int board_type)
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phys_size_t initdram(int board_type)
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{
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{
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#ifdef DEBUG
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int brate;
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char *tmp = getenv("baudrate");
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brate = simple_strtoul(tmp, NULL, 16);
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printf("Serial Port initialized with Baud rate = %x\n", brate);
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printf("SDRAM attributes:\n");
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printf("tRCD %d SCLK Cycles,tRP %d SCLK Cycles,tRAS %d SCLK Cycles"
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"tWR %d SCLK Cycles,CAS Latency %d SCLK cycles \n",
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3, 3, 6, 2, 3);
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printf("SDRAM Begin: 0x%x\n", CONFIG_SYS_SDRAM_BASE);
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printf("Bank size = %d MB\n", CONFIG_SYS_MAX_RAM_SIZE >> 20);
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#endif
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
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gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
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return CONFIG_SYS_MAX_RAM_SIZE;
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return gd->bd->bi_memsize;
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}
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}
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/* miscellaneous platform dependent initialisations */
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/* miscellaneous platform dependent initialisations */
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@ -49,18 +49,9 @@ int checkboard(void)
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phys_size_t initdram(int board_type)
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phys_size_t initdram(int board_type)
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{
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{
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#ifdef DEBUG
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printf("SDRAM attributes:\n");
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printf
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(" tRCD:%d Cycles; tRP:%d Cycles; tRAS:%d Cycles; tWR:%d Cycles; "
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"CAS Latency:%d cycles\n", (SDRAM_tRCD >> 15), (SDRAM_tRP >> 11),
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(SDRAM_tRAS >> 6), (SDRAM_tWR >> 19), (SDRAM_CL >> 2));
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printf("SDRAM Begin: 0x%x\n", CONFIG_SYS_SDRAM_BASE);
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printf("Bank size = %d MB\n", 128);
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#endif
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
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gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
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return (gd->bd->bi_memsize);
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return gd->bd->bi_memsize;
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}
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}
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void swap_to(int device_id)
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void swap_to(int device_id)
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@ -100,21 +100,9 @@ void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words)
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phys_size_t initdram(int board_type)
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phys_size_t initdram(int board_type)
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{
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{
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#ifdef DEBUG
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int brate;
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char *tmp = getenv("baudrate");
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brate = simple_strtoul(tmp, NULL, 16);
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printf("Serial Port initialized with Baud rate = %x\n", brate);
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printf("SDRAM attributes:\n");
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printf("tRCD %d SCLK Cycles,tRP %d SCLK Cycles,tRAS %d SCLK Cycles"
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"tWR %d SCLK Cycles,CAS Latency %d SCLK cycles \n",
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3, 3, 6, 2, 3);
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printf("SDRAM Begin: 0x%x\n", CONFIG_SYS_SDRAM_BASE);
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printf("Bank size = %d MB\n", CONFIG_SYS_MAX_RAM_SIZE >> 20);
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#endif
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
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gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
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return CONFIG_SYS_MAX_RAM_SIZE;
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return gd->bd->bi_memsize;
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}
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}
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#if defined(CONFIG_MISC_INIT_R)
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#if defined(CONFIG_MISC_INIT_R)
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@ -39,19 +39,7 @@ int checkboard(void)
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phys_size_t initdram(int board_type)
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phys_size_t initdram(int board_type)
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{
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{
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#ifdef DEBUG
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int brate;
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char *tmp = getenv("baudrate");
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brate = simple_strtoul(tmp, NULL, 16);
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printf("Serial Port initialized with Baud rate = %x\n", brate);
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printf("SDRAM attributes:\n");
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printf("tRCD %d SCLK Cycles,tRP %d SCLK Cycles,tRAS %d SCLK Cycles"
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"tWR %d SCLK Cycles,CAS Latency %d SCLK cycles \n",
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3, 3, 6, 2, 3);
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printf("SDRAM Begin: 0x%x\n", CONFIG_SYS_SDRAM_BASE);
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printf("Bank size = %d MB\n", CONFIG_SYS_MAX_RAM_SIZE >> 20);
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#endif
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
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gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
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return CONFIG_SYS_MAX_RAM_SIZE;
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return gd->bd->bi_memsize;
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}
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}
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