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mv_ddr: ddr3: Use correct bitmask for read sample delay
In the Armada 385 functional spec (MV-S109094-00 Rev. C) the read sample delay fields are 5 bits wide. Use the correct bitmask of 0x1f when extracting the value. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> [upstream https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/22] Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
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@ -11,7 +11,7 @@
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#define VREF_MAX_INDEX 7
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#define VREF_MAX_INDEX 7
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#define MAX_VALUE (1024 - 1)
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#define MAX_VALUE (1024 - 1)
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#define MIN_VALUE (-MAX_VALUE)
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#define MIN_VALUE (-MAX_VALUE)
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#define GET_RD_SAMPLE_DELAY(data, cs) ((data >> rd_sample_mask[cs]) & 0xf)
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#define GET_RD_SAMPLE_DELAY(data, cs) ((data >> rd_sample_mask[cs]) & 0x1f)
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u32 ca_delay;
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u32 ca_delay;
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int ddr3_tip_centr_skip_min_win_check = 0;
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int ddr3_tip_centr_skip_min_win_check = 0;
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