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exynos: clock: fixed that cfg is set to wrong value.
This patch fixed that cfg value is set to wrong value. Because it didn't read the related register. Signed-off-by: Inha Song <ideal.song@samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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@ -1114,6 +1114,7 @@ void exynos4_set_lcd_clk(void)
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* MIPI0_PRE_RATIO [23:20]
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* MIPI0_PRE_RATIO [23:20]
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* set fimd ratio
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* set fimd ratio
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*/
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*/
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cfg = readl(&clk->div_lcd0);
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cfg &= ~(0xf);
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cfg &= ~(0xf);
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cfg |= 0x1;
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cfg |= 0x1;
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writel(cfg, &clk->div_lcd0);
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writel(cfg, &clk->div_lcd0);
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@ -1176,6 +1177,7 @@ void exynos5_set_lcd_clk(void)
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* MIPI0_PRE_RATIO [23:20]
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* MIPI0_PRE_RATIO [23:20]
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* set fimd ratio
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* set fimd ratio
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*/
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*/
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cfg = readl(&clk->div_disp1_0);
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cfg &= ~(0xf);
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cfg &= ~(0xf);
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cfg |= 0x0;
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cfg |= 0x0;
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writel(cfg, &clk->div_disp1_0);
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writel(cfg, &clk->div_disp1_0);
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@ -1236,6 +1238,7 @@ void exynos4_set_mipi_clk(void)
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* MIPI0_PRE_RATIO [23:20]
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* MIPI0_PRE_RATIO [23:20]
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* set mipi ratio
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* set mipi ratio
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*/
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*/
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cfg = readl(&clk->div_lcd0);
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cfg &= ~(0xf << 16);
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cfg &= ~(0xf << 16);
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cfg |= (0x1 << 16);
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cfg |= (0x1 << 16);
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writel(cfg, &clk->div_lcd0);
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writel(cfg, &clk->div_lcd0);
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