brain-hackers_pepepper-mirror
/
u-boot-brain
mirror of https://github.com/brain-hackers/u-boot-brain
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

arm: dts: lx2162aqds: support eMMC HS400 mode on esdhc1 

Add properties related to eMMC HS400 mode for esdhc1.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Yangbo Lu 2021-05-14 10:33:57 +08:00 committed by Priyanka Jain
parent 8e221b4a1c
commit 38d1a18750
4 changed files with 28 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
arch/arm/dts/fsl-lx2162a-qds-sd1-17.dtsi
View File

@ -5,7 +5,7 @@
* Some assumptions are made:
* * mezzanine card M8 is connected to IO SLOT1 (25g-aui for DPMAC 3,4,5,6)
*
* Copyright 2020 NXP
* Copyright 2020-2021 NXP
*
*/
@ -56,3 +56,9 @@
reg = <0x3>;
};
};
&esdhc1 {
mmc-hs200-1_8v;
mmc-hs400-1_8v;
bus-width = <8>;
};

8
arch/arm/dts/fsl-lx2162a-qds-sd1-18.dtsi
View File

@ -6,7 +6,7 @@
* * mezzanine card M11 is connected to IO SLOT1 (usxgmii for DPMAC 3,4)
* * mezzanine card M13/M8 is connected to IO SLOT6 (25g-aui for DPMAC 5,6)
*
* Copyright 2020 NXP
* Copyright 2020-2021 NXP
*
*/
@ -59,3 +59,9 @@
reg = <0x1>;
};
};
&esdhc1 {
mmc-hs200-1_8v;
mmc-hs400-1_8v;
bus-width = <8>;
};

8
arch/arm/dts/fsl-lx2162a-qds-sd1-20.dtsi
View File

@ -6,7 +6,7 @@
* * Mezzanine card M8 is connected to IO SLOT1
* (xlaui4 for DPMAC 1)
*
* Copyright 2020 NXP
* Copyright 2020-2021 NXP
*
*/
@ -24,3 +24,9 @@
reg = <0x0>;
};
};
&esdhc1 {
mmc-hs200-1_8v;
mmc-hs400-1_8v;
bus-width = <8>;
};

8
arch/arm/dts/fsl-lx2162a-qds.dts
View File

@ -2,7 +2,7 @@
/*
* NXP LX2162AQDS device tree source
*
* Copyright 2020 NXP
* Copyright 2020-2021 NXP
*
*/
@ -135,3 +135,9 @@
reg = <2>;
};
};
&esdhc1 {
mmc-hs200-1_8v;
mmc-hs400-1_8v;
bus-width = <8>;
};