mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-28 23:50:26 +09:00
arm: dts: imx8mm: sync dts from Linux Kernel
Sync dts for i.MX8MM from Linux Kernel 5.4.0-rc1 Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Peng Fan
Stefano Babic
parent
c04ac5bd40
commit
387c44904d
@ -3,7 +3,7 @@
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* Copyright 2019 NXP
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*/
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&{/soc} {
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&{/soc@0} {
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u-boot,dm-pre-reloc;
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u-boot,dm-spl;
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};
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@ -5,6 +5,7 @@
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/dts-v1/;
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#include <dt-bindings/usb/pd.h>
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#include "imx8mm.dtsi"
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/ {
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@ -37,6 +38,41 @@
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gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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wm8524: audio-codec {
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#sound-dai-cells = <0>;
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compatible = "wlf,wm8524";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_wlf>;
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wlf,mute-gpios = <&gpio5 21 GPIO_ACTIVE_LOW>;
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};
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sound-wm8524 {
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compatible = "simple-audio-card";
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simple-audio-card,name = "wm8524-audio";
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simple-audio-card,format = "i2s";
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simple-audio-card,frame-master = <&cpudai>;
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simple-audio-card,bitclock-master = <&cpudai>;
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simple-audio-card,widgets =
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"Line", "Left Line Out Jack",
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"Line", "Right Line Out Jack";
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simple-audio-card,routing =
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"Left Line Out Jack", "LINEVOUTL",
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"Right Line Out Jack", "LINEVOUTR";
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cpudai: simple-audio-card,cpu {
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sound-dai = <&sai3>;
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};
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simple-audio-card,codec {
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sound-dai = <&wm8524>;
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clocks = <&clk IMX8MM_CLK_SAI3_ROOT>;
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};
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};
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};
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&A53_0 {
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cpu-supply = <&buck2_reg>;
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};
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&fec1 {
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@ -54,19 +90,208 @@
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ethphy0: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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at803x,led-act-blind-workaround;
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at803x,eee-okay;
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at803x,vddio-1p8v;
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};
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};
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};
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&i2c1 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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pmic@4b {
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compatible = "rohm,bd71847";
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reg = <0x4b>;
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pinctrl-0 = <&pinctrl_pmic>;
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interrupt-parent = <&gpio1>;
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interrupts = <3 GPIO_ACTIVE_LOW>;
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rohm,reset-snvs-powered;
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regulators {
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buck1_reg: BUCK1 {
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regulator-name = "BUCK1";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1300000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <1250>;
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};
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buck2_reg: BUCK2 {
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regulator-name = "BUCK2";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1300000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <1250>;
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rohm,dvs-run-voltage = <1000000>;
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rohm,dvs-idle-voltage = <900000>;
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};
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buck3_reg: BUCK3 {
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// BUCK5 in datasheet
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regulator-name = "BUCK3";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1350000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck4_reg: BUCK4 {
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// BUCK6 in datasheet
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regulator-name = "BUCK4";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck5_reg: BUCK5 {
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// BUCK7 in datasheet
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regulator-name = "BUCK5";
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regulator-min-microvolt = <1605000>;
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regulator-max-microvolt = <1995000>;
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regulator-boot-on;
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regulator-always-on;
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};
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buck6_reg: BUCK6 {
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// BUCK8 in datasheet
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regulator-name = "BUCK6";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1400000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo1_reg: LDO1 {
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regulator-name = "LDO1";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo2_reg: LDO2 {
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regulator-name = "LDO2";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo3_reg: LDO3 {
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regulator-name = "LDO3";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo4_reg: LDO4 {
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regulator-name = "LDO4";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo6_reg: LDO6 {
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regulator-name = "LDO6";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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};
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&i2c2 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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ptn5110: tcpc@50 {
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compatible = "nxp,ptn5110";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_typec1>;
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reg = <0x50>;
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interrupt-parent = <&gpio2>;
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interrupts = <11 8>;
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status = "okay";
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port {
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typec1_dr_sw: endpoint {
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remote-endpoint = <&usb1_drd_sw>;
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};
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};
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typec1_con: connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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power-role = "dual";
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data-role = "dual";
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try-power-role = "sink";
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source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
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sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
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PDO_VAR(5000, 20000, 3000)>;
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op-sink-microwatt = <15000000>;
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self-powered;
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};
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};
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};
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&i2c3 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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pca6416: gpio@20 {
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compatible = "ti,tca6416";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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&sai3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai3>;
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assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
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assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
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assigned-clock-rates = <24576000>;
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status = "okay";
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};
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&snvs_pwrkey {
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status = "okay";
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};
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&uart2 { /* console */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&usbotg1 {
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dr_mode = "otg";
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hnp-disable;
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srp-disable;
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adp-disable;
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usb-role-switch;
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status = "okay";
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port {
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usb1_drd_sw: endpoint {
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remote-endpoint = <&typec1_dr_sw>;
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};
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};
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};
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&usdhc2 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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@ -124,12 +349,60 @@
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>;
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};
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pinctrl_gpio_wlf: gpiowlfgrp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21 0xd6
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
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MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
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MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
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MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
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>;
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};
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pinctrl_pmic: pmicirq {
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fsl,pins = <
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MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41
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>;
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};
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pinctrl_reg_usdhc2_vmmc: regusdhc2vmmc {
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fsl,pins = <
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MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
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>;
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};
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pinctrl_sai3: sai3grp {
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fsl,pins = <
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MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
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MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
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MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
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MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
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>;
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};
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pinctrl_typec1: typec1grp {
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fsl,pins = <
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MX8MM_IOMUXC_SD1_STROBE_GPIO2_IO11 0x159
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
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@ -44,6 +44,19 @@
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#address-cells = <1>;
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#size-cells = <0>;
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idle-states {
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entry-method = "psci";
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cpu_pd_wait: cpu-pd-wait {
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compatible = "arm,idle-state";
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arm,psci-suspend-param = <0x0010033>;
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local-timer-stop;
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entry-latency-us = <1000>;
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exit-latency-us = <700>;
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min-residency-us = <2700>;
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};
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};
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A53_0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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@ -53,6 +66,9 @@
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enable-method = "psci";
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next-level-cache = <&A53_L2>;
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operating-points-v2 = <&a53_opp_table>;
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nvmem-cells = <&cpu_speed_grade>;
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nvmem-cell-names = "speed_grade";
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cpu-idle-states = <&cpu_pd_wait>;
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};
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A53_1: cpu@1 {
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@ -64,6 +80,7 @@
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enable-method = "psci";
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next-level-cache = <&A53_L2>;
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operating-points-v2 = <&a53_opp_table>;
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cpu-idle-states = <&cpu_pd_wait>;
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};
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A53_2: cpu@2 {
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@ -75,6 +92,7 @@
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enable-method = "psci";
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next-level-cache = <&A53_L2>;
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operating-points-v2 = <&a53_opp_table>;
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cpu-idle-states = <&cpu_pd_wait>;
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};
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A53_3: cpu@3 {
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@ -86,6 +104,7 @@
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enable-method = "psci";
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next-level-cache = <&A53_L2>;
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operating-points-v2 = <&a53_opp_table>;
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cpu-idle-states = <&cpu_pd_wait>;
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};
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A53_L2: l2-cache0 {
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@ -100,12 +119,23 @@
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opp-1200000000 {
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opp-hz = /bits/ 64 <1200000000>;
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opp-microvolt = <850000>;
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opp-supported-hw = <0xe>, <0x7>;
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clock-latency-ns = <150000>;
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opp-suspend;
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};
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opp-1600000000 {
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opp-hz = /bits/ 64 <1600000000>;
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opp-microvolt = <900000>;
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opp-supported-hw = <0xc>, <0x7>;
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clock-latency-ns = <150000>;
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opp-suspend;
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};
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opp-1800000000 {
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opp-hz = /bits/ 64 <1800000000>;
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opp-microvolt = <1000000>;
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opp-supported-hw = <0x8>, <0x3>;
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clock-latency-ns = <150000>;
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opp-suspend;
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};
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@ -158,15 +188,6 @@
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clock-output-names = "clk_ext4";
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};
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gic: interrupt-controller@38800000 {
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compatible = "arm,gic-v3";
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reg = <0x0 0x38800000 0 0x10000>, /* GIC Dist */
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<0x0 0x38880000 0 0xC0000>; /* GICR (RD_base + SGI_base) */
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#interrupt-cells = <3>;
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interrupt-controller;
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interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
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};
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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@ -189,7 +210,23 @@
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arm,no-tick-in-suspend;
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};
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soc {
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usbphynop1: usbphynop1 {
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compatible = "usb-nop-xceiv";
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clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
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assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
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assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
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clock-names = "main_clk";
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};
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usbphynop2: usbphynop2 {
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compatible = "usb-nop-xceiv";
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clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
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assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
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assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
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clock-names = "main_clk";
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};
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soc@0 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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@ -199,17 +236,85 @@
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compatible = "fsl,aips-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ranges = <0x30000000 0x30000000 0x400000>;
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sai1: sai@30010000 {
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compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
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reg = <0x30010000 0x10000>;
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interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX8MM_CLK_SAI1_IPG>,
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<&clk IMX8MM_CLK_SAI1_ROOT>,
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<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
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clock-names = "bus", "mclk1", "mclk2", "mclk3";
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dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>;
|
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dma-names = "rx", "tx";
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status = "disabled";
|
||||
};
|
||||
|
||||
sai2: sai@30020000 {
|
||||
compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
|
||||
reg = <0x30020000 0x10000>;
|
||||
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MM_CLK_SAI2_IPG>,
|
||||
<&clk IMX8MM_CLK_SAI2_ROOT>,
|
||||
<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
|
||||
clock-names = "bus", "mclk1", "mclk2", "mclk3";
|
||||
dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sai3: sai@30030000 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
|
||||
reg = <0x30030000 0x10000>;
|
||||
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MM_CLK_SAI3_IPG>,
|
||||
<&clk IMX8MM_CLK_SAI3_ROOT>,
|
||||
<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
|
||||
clock-names = "bus", "mclk1", "mclk2", "mclk3";
|
||||
dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sai5: sai@30050000 {
|
||||
compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
|
||||
reg = <0x30050000 0x10000>;
|
||||
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MM_CLK_SAI5_IPG>,
|
||||
<&clk IMX8MM_CLK_SAI5_ROOT>,
|
||||
<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
|
||||
clock-names = "bus", "mclk1", "mclk2", "mclk3";
|
||||
dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sai6: sai@30060000 {
|
||||
compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
|
||||
reg = <0x30060000 0x10000>;
|
||||
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MM_CLK_SAI6_IPG>,
|
||||
<&clk IMX8MM_CLK_SAI6_ROOT>,
|
||||
<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
|
||||
clock-names = "bus", "mclk1", "mclk2", "mclk3";
|
||||
dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpio1: gpio@30200000 {
|
||||
compatible = "fsl,imx8mm-gpio", "fsl,imx35-gpio";
|
||||
reg = <0x30200000 0x10000>;
|
||||
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MM_CLK_GPIO1_ROOT>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&iomuxc 0 10 30>;
|
||||
};
|
||||
|
||||
gpio2: gpio@30210000 {
|
||||
@ -217,10 +322,12 @@
|
||||
reg = <0x30210000 0x10000>;
|
||||
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MM_CLK_GPIO2_ROOT>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&iomuxc 0 40 21>;
|
||||
};
|
||||
|
||||
gpio3: gpio@30220000 {
|
||||
@ -228,10 +335,12 @@
|
||||
reg = <0x30220000 0x10000>;
|
||||
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MM_CLK_GPIO3_ROOT>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&iomuxc 0 61 26>;
|
||||
};
|
||||
|
||||
gpio4: gpio@30230000 {
|
||||
@ -239,10 +348,12 @@
|
||||
reg = <0x30230000 0x10000>;
|
||||
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MM_CLK_GPIO4_ROOT>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&iomuxc 0 87 32>;
|
||||
};
|
||||
|
||||
gpio5: gpio@30240000 {
|
||||
@ -250,10 +361,12 @@
|
||||
reg = <0x30240000 0x10000>;
|
||||
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MM_CLK_GPIO5_ROOT>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-ranges = <&iomuxc 0 119 30>;
|
||||
};
|
||||
|
||||
wdog1: watchdog@30280000 {
|
||||
@ -313,12 +426,16 @@
|
||||
};
|
||||
|
||||
ocotp: ocotp-ctrl@30350000 {
|
||||
compatible = "fsl,imx8mm-ocotp", "fsl,imx7d-ocotp", "syscon";
|
||||
compatible = "fsl,imx8mm-ocotp", "syscon";
|
||||
reg = <0x30350000 0x10000>;
|
||||
clocks = <&clk IMX8MM_CLK_OCOTP_ROOT>;
|
||||
/* For nvmem subnodes */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
cpu_speed_grade: speed-grade@10 {
|
||||
reg = <0x10 4>;
|
||||
};
|
||||
};
|
||||
|
||||
anatop: anatop@30360000 {
|
||||
@ -336,6 +453,8 @@
|
||||
offset = <0x34>;
|
||||
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MM_CLK_SNVS_ROOT>;
|
||||
clock-names = "snvs-rtc";
|
||||
};
|
||||
|
||||
snvs_pwrkey: snvs-powerkey {
|
||||
@ -344,6 +463,7 @@
|
||||
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
|
||||
linux,keycode = <KEY_POWER>;
|
||||
wakeup-source;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
@ -355,10 +475,22 @@
|
||||
<&clk_ext3>, <&clk_ext4>;
|
||||
clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
|
||||
"clk_ext3", "clk_ext4";
|
||||
assigned-clocks = <&clk IMX8MM_CLK_NOC>,
|
||||
<&clk IMX8MM_CLK_AUDIO_AHB>,
|
||||
<&clk IMX8MM_CLK_IPG_AUDIO_ROOT>,
|
||||
<&clk IMX8MM_SYS_PLL3>,
|
||||
<&clk IMX8MM_VIDEO_PLL1>;
|
||||
assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>,
|
||||
<&clk IMX8MM_SYS_PLL1_800M>;
|
||||
assigned-clock-rates = <0>,
|
||||
<400000000>,
|
||||
<400000000>,
|
||||
<750000000>,
|
||||
<594000000>;
|
||||
};
|
||||
|
||||
src: reset-controller@30390000 {
|
||||
compatible = "fsl,imx8mm-src", "syscon";
|
||||
compatible = "fsl,imx8mm-src", "fsl,imx8mq-src", "syscon";
|
||||
reg = <0x30390000 0x10000>;
|
||||
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#reset-cells = <1>;
|
||||
@ -369,7 +501,7 @@
|
||||
compatible = "fsl,aips-bus", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
ranges = <0x30400000 0x30400000 0x400000>;
|
||||
|
||||
pwm1: pwm@30660000 {
|
||||
compatible = "fsl,imx8mm-pwm", "fsl,imx27-pwm";
|
||||
@ -414,13 +546,21 @@
|
||||
#pwm-cells = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
system_counter: timer@306a0000 {
|
||||
compatible = "nxp,sysctr-timer";
|
||||
reg = <0x306a0000 0x20000>;
|
||||
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&osc_24m>;
|
||||
clock-names = "per";
|
||||
};
|
||||
};
|
||||
|
||||
aips3: bus@30800000 {
|
||||
compatible = "fsl,aips-bus", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
ranges = <0x30800000 0x30800000 0x400000>;
|
||||
|
||||
ecspi1: spi@30820000 {
|
||||
compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
|
||||
@ -554,7 +694,7 @@
|
||||
compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
|
||||
reg = <0x30b40000 0x10000>;
|
||||
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MM_CLK_DUMMY>,
|
||||
clocks = <&clk IMX8MM_CLK_IPG_ROOT>,
|
||||
<&clk IMX8MM_CLK_NAND_USDHC_BUS>,
|
||||
<&clk IMX8MM_CLK_USDHC1_ROOT>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
@ -570,7 +710,7 @@
|
||||
compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
|
||||
reg = <0x30b50000 0x10000>;
|
||||
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MM_CLK_DUMMY>,
|
||||
clocks = <&clk IMX8MM_CLK_IPG_ROOT>,
|
||||
<&clk IMX8MM_CLK_NAND_USDHC_BUS>,
|
||||
<&clk IMX8MM_CLK_USDHC2_ROOT>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
@ -584,7 +724,7 @@
|
||||
compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
|
||||
reg = <0x30b60000 0x10000>;
|
||||
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MM_CLK_DUMMY>,
|
||||
clocks = <&clk IMX8MM_CLK_IPG_ROOT>,
|
||||
<&clk IMX8MM_CLK_NAND_USDHC_BUS>,
|
||||
<&clk IMX8MM_CLK_USDHC3_ROOT>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
@ -639,7 +779,7 @@
|
||||
compatible = "fsl,aips-bus", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
ranges = <0x32c00000 0x32c00000 0x400000>;
|
||||
|
||||
usbotg1: usb@32e40000 {
|
||||
compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb";
|
||||
@ -647,23 +787,13 @@
|
||||
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>;
|
||||
clock-names = "usb1_ctrl_root_clk";
|
||||
assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>,
|
||||
<&clk IMX8MM_CLK_USB_CORE_REF>;
|
||||
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>,
|
||||
<&clk IMX8MM_SYS_PLL1_100M>;
|
||||
assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>;
|
||||
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
|
||||
fsl,usbphy = <&usbphynop1>;
|
||||
fsl,usbmisc = <&usbmisc1 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphynop1: usbphynop1 {
|
||||
compatible = "usb-nop-xceiv";
|
||||
clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
|
||||
assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
|
||||
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
|
||||
clock-names = "main_clk";
|
||||
};
|
||||
|
||||
usbmisc1: usbmisc@32e40200 {
|
||||
compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc";
|
||||
#index-cells = <1>;
|
||||
@ -676,23 +806,13 @@
|
||||
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>;
|
||||
clock-names = "usb1_ctrl_root_clk";
|
||||
assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>,
|
||||
<&clk IMX8MM_CLK_USB_CORE_REF>;
|
||||
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>,
|
||||
<&clk IMX8MM_SYS_PLL1_100M>;
|
||||
assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>;
|
||||
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
|
||||
fsl,usbphy = <&usbphynop2>;
|
||||
fsl,usbmisc = <&usbmisc2 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphynop2: usbphynop2 {
|
||||
compatible = "usb-nop-xceiv";
|
||||
clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
|
||||
assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
|
||||
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
|
||||
clock-names = "main_clk";
|
||||
};
|
||||
|
||||
usbmisc2: usbmisc@32e50200 {
|
||||
compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc";
|
||||
#index-cells = <1>;
|
||||
@ -729,5 +849,21 @@
|
||||
dma-names = "rx-tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gic: interrupt-controller@38800000 {
|
||||
compatible = "arm,gic-v3";
|
||||
reg = <0x38800000 0x10000>, /* GIC Dist */
|
||||
<0x38880000 0xc0000>; /* GICR (RD_base + SGI_base) */
|
||||
#interrupt-cells = <3>;
|
||||
interrupt-controller;
|
||||
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
ddr-pmu@3d800000 {
|
||||
compatible = "fsl,imx8mm-ddr-pmu", "fsl,imx8m-ddr-pmu";
|
||||
reg = <0x3d800000 0x400000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user