mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-27 23:20:26 +09:00
Revert "Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze"
This reverts commit3edc0c2522
, reversing changes made tobb135a0180
.
This commit is contained in:
parent
3edc0c2522
commit
361a879902
@ -294,10 +294,5 @@ matrix:
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BUILDMAN="^qemu-x86$"
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BUILDMAN="^qemu-x86$"
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TOOLCHAIN="x86_64"
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TOOLCHAIN="x86_64"
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BUILD_ROM="yes"
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BUILD_ROM="yes"
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- env:
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- TEST_PY_BD="zynq_zc702"
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TEST_PY_TEST_SPEC="not sleep"
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TEST_PY_ID="--id qemu"
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BUILDMAN="^zynq_zc702$"
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# TODO make it perfect ;-r
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# TODO make it perfect ;-r
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@ -18,6 +18,8 @@
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#define ARASAN_NAND_BASEADDR 0xFF100000
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#define ARASAN_NAND_BASEADDR 0xFF100000
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#define ZYNQMP_SATA_BASEADDR 0xFD0C0000
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#define ZYNQMP_USB0_XHCI_BASEADDR 0xFE200000
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#define ZYNQMP_USB0_XHCI_BASEADDR 0xFE200000
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#define ZYNQMP_USB1_XHCI_BASEADDR 0xFE300000
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#define ZYNQMP_USB1_XHCI_BASEADDR 0xFE300000
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@ -124,78 +124,126 @@ int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
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}
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}
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#if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
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#if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
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static const void *get_memory_reg_prop(const void *fdt, int *lenp)
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/*
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* fdt_get_reg - Fill buffer by information from DT
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*/
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static phys_size_t fdt_get_reg(const void *fdt, int nodeoffset, void *buf,
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const u32 *cell, int n)
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{
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{
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int offset;
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int i = 0, b, banks;
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int parent_offset = fdt_parent_offset(fdt, nodeoffset);
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int address_cells = fdt_address_cells(fdt, parent_offset);
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int size_cells = fdt_size_cells(fdt, parent_offset);
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char *p = buf;
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u64 val;
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u64 vals;
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offset = fdt_path_offset(fdt, "/memory");
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debug("%s: addr_cells=%x, size_cell=%x, buf=%p, cell=%p\n",
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if (offset < 0)
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__func__, address_cells, size_cells, buf, cell);
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return NULL;
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return fdt_getprop(fdt, offset, "reg", lenp);
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/* Check memory bank setup */
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banks = n % (address_cells + size_cells);
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if (banks)
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panic("Incorrect memory setup cells=%d, ac=%d, sc=%d\n",
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n, address_cells, size_cells);
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banks = n / (address_cells + size_cells);
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for (b = 0; b < banks; b++) {
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debug("%s: Bank #%d:\n", __func__, b);
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if (address_cells == 2) {
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val = cell[i + 1];
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val <<= 32;
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val |= cell[i];
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val = fdt64_to_cpu(val);
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debug("%s: addr64=%llx, ptr=%p, cell=%p\n",
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__func__, val, p, &cell[i]);
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*(phys_addr_t *)p = val;
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} else {
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debug("%s: addr32=%x, ptr=%p\n",
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__func__, fdt32_to_cpu(cell[i]), p);
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*(phys_addr_t *)p = fdt32_to_cpu(cell[i]);
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}
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p += sizeof(phys_addr_t);
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i += address_cells;
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debug("%s: pa=%p, i=%x, size=%zu\n", __func__, p, i,
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sizeof(phys_addr_t));
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if (size_cells == 2) {
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vals = cell[i + 1];
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vals <<= 32;
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vals |= cell[i];
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vals = fdt64_to_cpu(vals);
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debug("%s: size64=%llx, ptr=%p, cell=%p\n",
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__func__, vals, p, &cell[i]);
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*(phys_size_t *)p = vals;
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} else {
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debug("%s: size32=%x, ptr=%p\n",
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__func__, fdt32_to_cpu(cell[i]), p);
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*(phys_size_t *)p = fdt32_to_cpu(cell[i]);
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}
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p += sizeof(phys_size_t);
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i += size_cells;
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debug("%s: ps=%p, i=%x, size=%zu\n",
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__func__, p, i, sizeof(phys_size_t));
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}
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/* Return the first address size */
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return *(phys_size_t *)((char *)buf + sizeof(phys_addr_t));
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}
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#define FDT_REG_SIZE sizeof(u32)
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/* Temp location for sharing data for storing */
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/* Up to 64-bit address + 64-bit size */
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static u8 tmp[CONFIG_NR_DRAM_BANKS * 16];
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void dram_init_banksize(void)
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{
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int bank;
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memcpy(&gd->bd->bi_dram[0], &tmp, sizeof(tmp));
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for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
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debug("Bank #%d: start %llx\n", bank,
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(unsigned long long)gd->bd->bi_dram[bank].start);
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debug("Bank #%d: size %llx\n", bank,
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(unsigned long long)gd->bd->bi_dram[bank].size);
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}
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}
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}
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int dram_init(void)
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int dram_init(void)
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{
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{
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const void *fdt = gd->fdt_blob;
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int node, len;
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const fdt32_t *val;
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const void *blob = gd->fdt_blob;
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int ac, sc, len;
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const u32 *cell;
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ac = fdt_address_cells(fdt, 0);
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memset(&tmp, 0, sizeof(tmp));
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sc = fdt_size_cells(fdt, 0);
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if (ac < 0 || sc < 1 || sc > 2) {
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/* find or create "/memory" node. */
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printf("invalid address/size cells\n");
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node = fdt_subnode_offset(blob, 0, "memory");
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return -EINVAL;
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if (node < 0) {
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printf("%s: Can't get memory node\n", __func__);
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return node;
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}
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}
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val = get_memory_reg_prop(fdt, &len);
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/* Get pointer to cells and lenght of it */
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if (len / sizeof(*val) < ac + sc)
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cell = fdt_getprop(blob, node, "reg", &len);
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return -EINVAL;
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if (!cell) {
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printf("%s: Can't get reg property\n", __func__);
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return -1;
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}
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val += ac;
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gd->ram_size = fdt_get_reg(blob, node, &tmp, cell, len / FDT_REG_SIZE);
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gd->ram_size = fdtdec_get_number(val, sc);
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debug("%s: Initial DRAM size %llx\n", __func__, (u64)gd->ram_size);
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debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size);
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zynq_ddrc_init();
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zynq_ddrc_init();
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return 0;
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return 0;
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}
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}
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void dram_init_banksize(void)
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{
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const void *fdt = gd->fdt_blob;
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const fdt32_t *val;
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int ac, sc, cells, len, i;
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val = get_memory_reg_prop(fdt, &len);
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if (len < 0)
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return;
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ac = fdt_address_cells(fdt, 0);
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sc = fdt_size_cells(fdt, 0);
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if (ac < 1 || sc > 2 || sc < 1 || sc > 2) {
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printf("invalid address/size cells\n");
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return;
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}
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cells = ac + sc;
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len /= sizeof(*val);
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for (i = 0; i < CONFIG_NR_DRAM_BANKS && len >= cells;
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i++, len -= cells) {
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gd->bd->bi_dram[i].start = fdtdec_get_number(val, ac);
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val += ac;
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gd->bd->bi_dram[i].size = fdtdec_get_number(val, sc);
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val += sc;
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debug("DRAM bank %d: start = %08lx, size = %08lx\n",
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i, (unsigned long)gd->bd->bi_dram[i].start,
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(unsigned long)gd->bd->bi_dram[i].size);
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}
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}
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#else
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#else
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int dram_init(void)
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int dram_init(void)
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{
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{
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -180,76 +180,124 @@ int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
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}
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}
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#if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
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#if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
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static const void *get_memory_reg_prop(const void *fdt, int *lenp)
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/*
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* fdt_get_reg - Fill buffer by information from DT
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*/
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static phys_size_t fdt_get_reg(const void *fdt, int nodeoffset, void *buf,
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const u32 *cell, int n)
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{
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{
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int offset;
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int i = 0, b, banks;
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int parent_offset = fdt_parent_offset(fdt, nodeoffset);
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int address_cells = fdt_address_cells(fdt, parent_offset);
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int size_cells = fdt_size_cells(fdt, parent_offset);
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char *p = buf;
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u64 val;
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u64 vals;
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offset = fdt_path_offset(fdt, "/memory");
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debug("%s: addr_cells=%x, size_cell=%x, buf=%p, cell=%p\n",
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if (offset < 0)
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__func__, address_cells, size_cells, buf, cell);
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return NULL;
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return fdt_getprop(fdt, offset, "reg", lenp);
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/* Check memory bank setup */
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banks = n % (address_cells + size_cells);
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if (banks)
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panic("Incorrect memory setup cells=%d, ac=%d, sc=%d\n",
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n, address_cells, size_cells);
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banks = n / (address_cells + size_cells);
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for (b = 0; b < banks; b++) {
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debug("%s: Bank #%d:\n", __func__, b);
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if (address_cells == 2) {
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val = cell[i + 1];
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val <<= 32;
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val |= cell[i];
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val = fdt64_to_cpu(val);
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debug("%s: addr64=%llx, ptr=%p, cell=%p\n",
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__func__, val, p, &cell[i]);
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*(phys_addr_t *)p = val;
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} else {
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debug("%s: addr32=%x, ptr=%p\n",
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__func__, fdt32_to_cpu(cell[i]), p);
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*(phys_addr_t *)p = fdt32_to_cpu(cell[i]);
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}
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p += sizeof(phys_addr_t);
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i += address_cells;
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debug("%s: pa=%p, i=%x, size=%zu\n", __func__, p, i,
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sizeof(phys_addr_t));
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if (size_cells == 2) {
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vals = cell[i + 1];
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vals <<= 32;
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vals |= cell[i];
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vals = fdt64_to_cpu(vals);
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debug("%s: size64=%llx, ptr=%p, cell=%p\n",
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__func__, vals, p, &cell[i]);
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*(phys_size_t *)p = vals;
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} else {
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debug("%s: size32=%x, ptr=%p\n",
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__func__, fdt32_to_cpu(cell[i]), p);
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*(phys_size_t *)p = fdt32_to_cpu(cell[i]);
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}
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p += sizeof(phys_size_t);
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i += size_cells;
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debug("%s: ps=%p, i=%x, size=%zu\n",
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__func__, p, i, sizeof(phys_size_t));
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}
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/* Return the first address size */
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return *(phys_size_t *)((char *)buf + sizeof(phys_addr_t));
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}
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|
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||||||
|
#define FDT_REG_SIZE sizeof(u32)
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|
/* Temp location for sharing data for storing */
|
||||||
|
/* Up to 64-bit address + 64-bit size */
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|
static u8 tmp[CONFIG_NR_DRAM_BANKS * 16];
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|
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void dram_init_banksize(void)
|
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|
{
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int bank;
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|
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memcpy(&gd->bd->bi_dram[0], &tmp, sizeof(tmp));
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|
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for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
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debug("Bank #%d: start %llx\n", bank,
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(unsigned long long)gd->bd->bi_dram[bank].start);
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debug("Bank #%d: size %llx\n", bank,
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|
(unsigned long long)gd->bd->bi_dram[bank].size);
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|
}
|
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}
|
}
|
||||||
|
|
||||||
int dram_init(void)
|
int dram_init(void)
|
||||||
{
|
{
|
||||||
const void *fdt = gd->fdt_blob;
|
int node, len;
|
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const fdt32_t *val;
|
const void *blob = gd->fdt_blob;
|
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int ac, sc, len;
|
const u32 *cell;
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|
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ac = fdt_address_cells(fdt, 0);
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memset(&tmp, 0, sizeof(tmp));
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sc = fdt_size_cells(fdt, 0);
|
|
||||||
if (ac < 0 || sc < 1 || sc > 2) {
|
/* find or create "/memory" node. */
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printf("invalid address/size cells\n");
|
node = fdt_subnode_offset(blob, 0, "memory");
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return -EINVAL;
|
if (node < 0) {
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||||||
|
printf("%s: Can't get memory node\n", __func__);
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||||||
|
return node;
|
||||||
}
|
}
|
||||||
|
|
||||||
val = get_memory_reg_prop(fdt, &len);
|
/* Get pointer to cells and lenght of it */
|
||||||
if (len / sizeof(*val) < ac + sc)
|
cell = fdt_getprop(blob, node, "reg", &len);
|
||||||
return -EINVAL;
|
if (!cell) {
|
||||||
|
printf("%s: Can't get reg property\n", __func__);
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
val += ac;
|
gd->ram_size = fdt_get_reg(blob, node, &tmp, cell, len / FDT_REG_SIZE);
|
||||||
|
|
||||||
gd->ram_size = fdtdec_get_number(val, sc);
|
debug("%s: Initial DRAM size %llx\n", __func__, (u64)gd->ram_size);
|
||||||
|
|
||||||
debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size);
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
void dram_init_banksize(void)
|
|
||||||
{
|
|
||||||
const void *fdt = gd->fdt_blob;
|
|
||||||
const fdt32_t *val;
|
|
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int ac, sc, cells, len, i;
|
|
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|
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val = get_memory_reg_prop(fdt, &len);
|
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if (len < 0)
|
|
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return;
|
|
||||||
|
|
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ac = fdt_address_cells(fdt, 0);
|
|
||||||
sc = fdt_size_cells(fdt, 0);
|
|
||||||
if (ac < 1 || sc > 2 || sc < 1 || sc > 2) {
|
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||||||
printf("invalid address/size cells\n");
|
|
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return;
|
|
||||||
}
|
|
||||||
|
|
||||||
cells = ac + sc;
|
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||||||
|
|
||||||
len /= sizeof(*val);
|
|
||||||
|
|
||||||
for (i = 0; i < CONFIG_NR_DRAM_BANKS && len >= cells;
|
|
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i++, len -= cells) {
|
|
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gd->bd->bi_dram[i].start = fdtdec_get_number(val, ac);
|
|
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val += ac;
|
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gd->bd->bi_dram[i].size = fdtdec_get_number(val, sc);
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|
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val += sc;
|
|
||||||
|
|
||||||
debug("DRAM bank %d: start = %08lx, size = %08lx\n",
|
|
||||||
i, (unsigned long)gd->bd->bi_dram[i].start,
|
|
||||||
(unsigned long)gd->bd->bi_dram[i].size);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
#else
|
#else
|
||||||
int dram_init(void)
|
int dram_init(void)
|
||||||
{
|
{
|
||||||
@ -263,6 +311,17 @@ void reset_cpu(ulong addr)
|
|||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#ifdef CONFIG_SCSI_AHCI_PLAT
|
||||||
|
void scsi_init(void)
|
||||||
|
{
|
||||||
|
#if defined(CONFIG_SATA_CEVA)
|
||||||
|
init_sata(0);
|
||||||
|
#endif
|
||||||
|
ahci_init((void __iomem *)ZYNQMP_SATA_BASEADDR);
|
||||||
|
scsi_scan(1);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
int board_late_init(void)
|
int board_late_init(void)
|
||||||
{
|
{
|
||||||
u32 reg = 0;
|
u32 reg = 0;
|
||||||
|
@ -620,7 +620,7 @@ static int initr_ambapp_print(void)
|
|||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_SCSI) && !defined(CONFIG_DM_SCSI)
|
#if defined(CONFIG_SCSI)
|
||||||
static int initr_scsi(void)
|
static int initr_scsi(void)
|
||||||
{
|
{
|
||||||
puts("SCSI: ");
|
puts("SCSI: ");
|
||||||
@ -923,7 +923,7 @@ init_fnc_t init_sequence_r[] = {
|
|||||||
initr_ambapp_print,
|
initr_ambapp_print,
|
||||||
#endif
|
#endif
|
||||||
#endif
|
#endif
|
||||||
#if defined(CONFIG_SCSI) && !defined(CONFIG_DM_SCSI)
|
#ifdef CONFIG_SCSI
|
||||||
INIT_FUNC_WATCHDOG_RESET
|
INIT_FUNC_WATCHDOG_RESET
|
||||||
initr_scsi,
|
initr_scsi,
|
||||||
#endif
|
#endif
|
||||||
|
@ -107,18 +107,6 @@ int mdio_register(struct mii_dev *bus)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int mdio_register_seq_name(struct mii_dev *bus, int seq)
|
|
||||||
{
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
/* Setup a unique name for each mdio bus */
|
|
||||||
ret = snprintf(bus->name, MDIO_NAME_LEN, "eth%d", seq);
|
|
||||||
if (ret < 0)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
return mdio_register(bus);
|
|
||||||
}
|
|
||||||
|
|
||||||
int mdio_unregister(struct mii_dev *bus)
|
int mdio_unregister(struct mii_dev *bus)
|
||||||
{
|
{
|
||||||
if (!bus)
|
if (!bus)
|
||||||
|
@ -10,10 +10,7 @@
|
|||||||
#include <inttypes.h>
|
#include <inttypes.h>
|
||||||
#include <pci.h>
|
#include <pci.h>
|
||||||
#include <scsi.h>
|
#include <scsi.h>
|
||||||
#include <dm/device-internal.h>
|
|
||||||
#include <dm/uclass-internal.h>
|
|
||||||
|
|
||||||
#if !defined(CONFIG_DM_SCSI)
|
|
||||||
#ifdef CONFIG_SCSI_DEV_LIST
|
#ifdef CONFIG_SCSI_DEV_LIST
|
||||||
#define SCSI_DEV_LIST CONFIG_SCSI_DEV_LIST
|
#define SCSI_DEV_LIST CONFIG_SCSI_DEV_LIST
|
||||||
#else
|
#else
|
||||||
@ -34,7 +31,6 @@
|
|||||||
#endif
|
#endif
|
||||||
#define SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID}
|
#define SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID}
|
||||||
#endif
|
#endif
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(CONFIG_PCI) && !defined(CONFIG_SCSI_AHCI_PLAT)
|
#if defined(CONFIG_PCI) && !defined(CONFIG_SCSI_AHCI_PLAT)
|
||||||
const struct pci_device_id scsi_device_list[] = { SCSI_DEV_LIST };
|
const struct pci_device_id scsi_device_list[] = { SCSI_DEV_LIST };
|
||||||
@ -43,13 +39,11 @@ static ccb tempccb; /* temporary scsi command buffer */
|
|||||||
|
|
||||||
static unsigned char tempbuff[512]; /* temporary data buffer */
|
static unsigned char tempbuff[512]; /* temporary data buffer */
|
||||||
|
|
||||||
#if !defined(CONFIG_DM_SCSI)
|
|
||||||
static int scsi_max_devs; /* number of highest available scsi device */
|
static int scsi_max_devs; /* number of highest available scsi device */
|
||||||
|
|
||||||
static int scsi_curr_dev; /* current device */
|
static int scsi_curr_dev; /* current device */
|
||||||
|
|
||||||
static struct blk_desc scsi_dev_desc[CONFIG_SYS_SCSI_MAX_DEVICE];
|
static struct blk_desc scsi_dev_desc[CONFIG_SYS_SCSI_MAX_DEVICE];
|
||||||
#endif
|
|
||||||
|
|
||||||
/* almost the maximum amount of the scsi_ext command.. */
|
/* almost the maximum amount of the scsi_ext command.. */
|
||||||
#define SCSI_MAX_READ_BLK 0xFFFF
|
#define SCSI_MAX_READ_BLK 0xFFFF
|
||||||
@ -450,7 +444,6 @@ static void scsi_init_dev_desc_priv(struct blk_desc *dev_desc)
|
|||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
#if !defined(CONFIG_DM_SCSI)
|
|
||||||
/**
|
/**
|
||||||
* scsi_init_dev_desc - initialize all SCSI specific blk_desc properties
|
* scsi_init_dev_desc - initialize all SCSI specific blk_desc properties
|
||||||
*
|
*
|
||||||
@ -467,7 +460,6 @@ static void scsi_init_dev_desc(struct blk_desc *dev_desc, int devnum)
|
|||||||
|
|
||||||
scsi_init_dev_desc_priv(dev_desc);
|
scsi_init_dev_desc_priv(dev_desc);
|
||||||
}
|
}
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* scsi_detect_dev - Detect scsi device
|
* scsi_detect_dev - Detect scsi device
|
||||||
@ -548,73 +540,6 @@ removable:
|
|||||||
* (re)-scan the scsi bus and reports scsi device info
|
* (re)-scan the scsi bus and reports scsi device info
|
||||||
* to the user if mode = 1
|
* to the user if mode = 1
|
||||||
*/
|
*/
|
||||||
#if defined(CONFIG_DM_SCSI)
|
|
||||||
int scsi_scan(int mode)
|
|
||||||
{
|
|
||||||
unsigned char i, lun;
|
|
||||||
struct uclass *uc;
|
|
||||||
struct udevice *dev; /* SCSI controller */
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
if (mode == 1)
|
|
||||||
printf("scanning bus for devices...\n");
|
|
||||||
|
|
||||||
ret = uclass_get(UCLASS_SCSI, &uc);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
uclass_foreach_dev(dev, uc) {
|
|
||||||
struct scsi_platdata *plat; /* scsi controller platdata */
|
|
||||||
|
|
||||||
/* probe SCSI controller driver */
|
|
||||||
ret = device_probe(dev);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
/* Get controller platdata */
|
|
||||||
plat = dev_get_platdata(dev);
|
|
||||||
|
|
||||||
for (i = 0; i < plat->max_id; i++) {
|
|
||||||
for (lun = 0; lun < plat->max_lun; lun++) {
|
|
||||||
struct udevice *bdev; /* block device */
|
|
||||||
/* block device description */
|
|
||||||
struct blk_desc *bdesc;
|
|
||||||
char str[10];
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Create only one block device and do detection
|
|
||||||
* to make sure that there won't be a lot of
|
|
||||||
* block devices created
|
|
||||||
*/
|
|
||||||
snprintf(str, sizeof(str), "id%dlun%d", i, lun);
|
|
||||||
ret = blk_create_devicef(dev, "scsi_blk",
|
|
||||||
str, IF_TYPE_SCSI,
|
|
||||||
-1, 0, 0, &bdev);
|
|
||||||
if (ret) {
|
|
||||||
debug("Can't create device\n");
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
bdesc = dev_get_uclass_platdata(bdev);
|
|
||||||
|
|
||||||
scsi_init_dev_desc_priv(bdesc);
|
|
||||||
bdesc->lun = lun;
|
|
||||||
ret = scsi_detect_dev(i, bdesc);
|
|
||||||
if (ret) {
|
|
||||||
device_unbind(bdev);
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (mode == 1) {
|
|
||||||
printf(" Device %d: ", 0);
|
|
||||||
dev_print(bdesc);
|
|
||||||
} /* if mode */
|
|
||||||
} /* next LUN */
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
#else
|
|
||||||
int scsi_scan(int mode)
|
int scsi_scan(int mode)
|
||||||
{
|
{
|
||||||
unsigned char i, lun;
|
unsigned char i, lun;
|
||||||
@ -651,7 +576,6 @@ int scsi_scan(int mode)
|
|||||||
#endif
|
#endif
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef CONFIG_BLK
|
#ifdef CONFIG_BLK
|
||||||
static const struct blk_ops scsi_blk_ops = {
|
static const struct blk_ops scsi_blk_ops = {
|
||||||
|
@ -42,8 +42,6 @@ CONFIG_OF_EMBED=y
|
|||||||
CONFIG_NET_RANDOM_ETHADDR=y
|
CONFIG_NET_RANDOM_ETHADDR=y
|
||||||
CONFIG_SPL_DM=y
|
CONFIG_SPL_DM=y
|
||||||
CONFIG_SPL_DM_SEQ_ALIAS=y
|
CONFIG_SPL_DM_SEQ_ALIAS=y
|
||||||
CONFIG_DM_SCSI=y
|
|
||||||
CONFIG_SATA_CEVA=y
|
|
||||||
CONFIG_DFU_RAM=y
|
CONFIG_DFU_RAM=y
|
||||||
CONFIG_FPGA_XILINX=y
|
CONFIG_FPGA_XILINX=y
|
||||||
CONFIG_FPGA_ZYNQMPPL=y
|
CONFIG_FPGA_ZYNQMPPL=y
|
||||||
|
@ -34,8 +34,6 @@ CONFIG_OF_EMBED=y
|
|||||||
CONFIG_NET_RANDOM_ETHADDR=y
|
CONFIG_NET_RANDOM_ETHADDR=y
|
||||||
CONFIG_SPL_DM=y
|
CONFIG_SPL_DM=y
|
||||||
CONFIG_SPL_DM_SEQ_ALIAS=y
|
CONFIG_SPL_DM_SEQ_ALIAS=y
|
||||||
CONFIG_DM_SCSI=y
|
|
||||||
CONFIG_SATA_CEVA=y
|
|
||||||
CONFIG_DFU_RAM=y
|
CONFIG_DFU_RAM=y
|
||||||
CONFIG_FPGA_XILINX=y
|
CONFIG_FPGA_XILINX=y
|
||||||
CONFIG_FPGA_ZYNQMPPL=y
|
CONFIG_FPGA_ZYNQMPPL=y
|
||||||
|
@ -34,8 +34,6 @@ CONFIG_OF_EMBED=y
|
|||||||
CONFIG_NET_RANDOM_ETHADDR=y
|
CONFIG_NET_RANDOM_ETHADDR=y
|
||||||
CONFIG_SPL_DM=y
|
CONFIG_SPL_DM=y
|
||||||
CONFIG_SPL_DM_SEQ_ALIAS=y
|
CONFIG_SPL_DM_SEQ_ALIAS=y
|
||||||
CONFIG_DM_SCSI=y
|
|
||||||
CONFIG_SATA_CEVA=y
|
|
||||||
CONFIG_DFU_RAM=y
|
CONFIG_DFU_RAM=y
|
||||||
CONFIG_FPGA_XILINX=y
|
CONFIG_FPGA_XILINX=y
|
||||||
CONFIG_FPGA_ZYNQMPPL=y
|
CONFIG_FPGA_ZYNQMPPL=y
|
||||||
|
@ -30,7 +30,6 @@ CONFIG_CMD_EXT4=y
|
|||||||
CONFIG_CMD_EXT4_WRITE=y
|
CONFIG_CMD_EXT4_WRITE=y
|
||||||
CONFIG_CMD_FAT=y
|
CONFIG_CMD_FAT=y
|
||||||
CONFIG_CMD_FS_GENERIC=y
|
CONFIG_CMD_FS_GENERIC=y
|
||||||
CONFIG_OF_EMBED=y
|
|
||||||
CONFIG_NET_RANDOM_ETHADDR=y
|
CONFIG_NET_RANDOM_ETHADDR=y
|
||||||
CONFIG_SPL_DM_SEQ_ALIAS=y
|
CONFIG_SPL_DM_SEQ_ALIAS=y
|
||||||
CONFIG_DFU_MMC=y
|
CONFIG_DFU_MMC=y
|
||||||
|
@ -19,15 +19,6 @@ config AHCI
|
|||||||
operations at present. The block device interface has not been converted
|
operations at present. The block device interface has not been converted
|
||||||
to driver model.
|
to driver model.
|
||||||
|
|
||||||
config DM_SCSI
|
|
||||||
bool "Support SCSI controllers with driver model"
|
|
||||||
depends on BLK
|
|
||||||
help
|
|
||||||
This option enables the SCSI (Small Computer System Interface) uclass
|
|
||||||
which supports SCSI and SATA HDDs. For every device configuration
|
|
||||||
(IDs/LUNs) a block device is created with RAW read/write and
|
|
||||||
filesystem support.
|
|
||||||
|
|
||||||
config BLOCK_CACHE
|
config BLOCK_CACHE
|
||||||
bool "Use block device cache"
|
bool "Use block device cache"
|
||||||
default n
|
default n
|
||||||
@ -36,16 +27,3 @@ config BLOCK_CACHE
|
|||||||
This is most useful when accessing filesystems under U-Boot since
|
This is most useful when accessing filesystems under U-Boot since
|
||||||
it will prevent repeated reads from directory structures and other
|
it will prevent repeated reads from directory structures and other
|
||||||
filesystem data structures.
|
filesystem data structures.
|
||||||
|
|
||||||
menu "SATA/SCSI device support"
|
|
||||||
|
|
||||||
config SATA_CEVA
|
|
||||||
bool "Ceva Sata controller"
|
|
||||||
depends on AHCI
|
|
||||||
depends on DM_SCSI
|
|
||||||
help
|
|
||||||
This option enables Ceva Sata controller hard IP available on Xilinx
|
|
||||||
ZynqMP. Support up to 2 external devices. Complient with SATA 3.1 and
|
|
||||||
AHCI 1.3 specifications with hot-plug detect feature.
|
|
||||||
|
|
||||||
endmenu
|
|
||||||
|
@ -12,7 +12,6 @@ obj-y += blk_legacy.o
|
|||||||
endif
|
endif
|
||||||
|
|
||||||
obj-$(CONFIG_AHCI) += ahci-uclass.o
|
obj-$(CONFIG_AHCI) += ahci-uclass.o
|
||||||
obj-$(CONFIG_DM_SCSI) += scsi-uclass.o
|
|
||||||
obj-$(CONFIG_SCSI_AHCI) += ahci.o
|
obj-$(CONFIG_SCSI_AHCI) += ahci.o
|
||||||
obj-$(CONFIG_DWC_AHSATA) += dwc_ahsata.o
|
obj-$(CONFIG_DWC_AHSATA) += dwc_ahsata.o
|
||||||
obj-$(CONFIG_FSL_SATA) += fsl_sata.o
|
obj-$(CONFIG_FSL_SATA) += fsl_sata.o
|
||||||
|
@ -168,7 +168,7 @@ int ahci_reset(void __iomem *base)
|
|||||||
|
|
||||||
static int ahci_host_init(struct ahci_probe_ent *probe_ent)
|
static int ahci_host_init(struct ahci_probe_ent *probe_ent)
|
||||||
{
|
{
|
||||||
#if !defined(CONFIG_SCSI_AHCI_PLAT) && !defined(CONFIG_DM_SCSI)
|
#ifndef CONFIG_SCSI_AHCI_PLAT
|
||||||
# ifdef CONFIG_DM_PCI
|
# ifdef CONFIG_DM_PCI
|
||||||
struct udevice *dev = probe_ent->dev;
|
struct udevice *dev = probe_ent->dev;
|
||||||
struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
|
struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
|
||||||
@ -198,7 +198,7 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
|
|||||||
writel(cap_save, mmio + HOST_CAP);
|
writel(cap_save, mmio + HOST_CAP);
|
||||||
writel_with_flush(0xf, mmio + HOST_PORTS_IMPL);
|
writel_with_flush(0xf, mmio + HOST_PORTS_IMPL);
|
||||||
|
|
||||||
#if !defined(CONFIG_SCSI_AHCI_PLAT) && !defined(CONFIG_DM_SCSI)
|
#ifndef CONFIG_SCSI_AHCI_PLAT
|
||||||
# ifdef CONFIG_DM_PCI
|
# ifdef CONFIG_DM_PCI
|
||||||
if (pplat->vendor == PCI_VENDOR_ID_INTEL) {
|
if (pplat->vendor == PCI_VENDOR_ID_INTEL) {
|
||||||
u16 tmp16;
|
u16 tmp16;
|
||||||
@ -327,7 +327,6 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
|
|||||||
writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL);
|
writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL);
|
||||||
tmp = readl(mmio + HOST_CTL);
|
tmp = readl(mmio + HOST_CTL);
|
||||||
debug("HOST_CTL 0x%x\n", tmp);
|
debug("HOST_CTL 0x%x\n", tmp);
|
||||||
#if !defined(CONFIG_DM_SCSI)
|
|
||||||
#ifndef CONFIG_SCSI_AHCI_PLAT
|
#ifndef CONFIG_SCSI_AHCI_PLAT
|
||||||
# ifdef CONFIG_DM_PCI
|
# ifdef CONFIG_DM_PCI
|
||||||
dm_pci_read_config16(dev, PCI_COMMAND, &tmp16);
|
dm_pci_read_config16(dev, PCI_COMMAND, &tmp16);
|
||||||
@ -338,7 +337,6 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
|
|||||||
tmp |= PCI_COMMAND_MASTER;
|
tmp |= PCI_COMMAND_MASTER;
|
||||||
pci_write_config_word(pdev, PCI_COMMAND, tmp16);
|
pci_write_config_word(pdev, PCI_COMMAND, tmp16);
|
||||||
# endif
|
# endif
|
||||||
#endif
|
|
||||||
#endif
|
#endif
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
@ -346,8 +344,8 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent)
|
|||||||
|
|
||||||
static void ahci_print_info(struct ahci_probe_ent *probe_ent)
|
static void ahci_print_info(struct ahci_probe_ent *probe_ent)
|
||||||
{
|
{
|
||||||
#if !defined(CONFIG_SCSI_AHCI_PLAT) && !defined(CONFIG_DM_SCSI)
|
#ifndef CONFIG_SCSI_AHCI_PLAT
|
||||||
# if defined(CONFIG_DM_PCI)
|
# ifdef CONFIG_DM_PCI
|
||||||
struct udevice *dev = probe_ent->dev;
|
struct udevice *dev = probe_ent->dev;
|
||||||
# else
|
# else
|
||||||
pci_dev_t pdev = probe_ent->dev;
|
pci_dev_t pdev = probe_ent->dev;
|
||||||
@ -374,7 +372,7 @@ static void ahci_print_info(struct ahci_probe_ent *probe_ent)
|
|||||||
else
|
else
|
||||||
speed_s = "?";
|
speed_s = "?";
|
||||||
|
|
||||||
#if defined(CONFIG_SCSI_AHCI_PLAT) || defined(CONFIG_DM_SCSI)
|
#ifdef CONFIG_SCSI_AHCI_PLAT
|
||||||
scc_s = "SATA";
|
scc_s = "SATA";
|
||||||
#else
|
#else
|
||||||
# ifdef CONFIG_DM_PCI
|
# ifdef CONFIG_DM_PCI
|
||||||
@ -426,15 +424,13 @@ static void ahci_print_info(struct ahci_probe_ent *probe_ent)
|
|||||||
}
|
}
|
||||||
|
|
||||||
#ifndef CONFIG_SCSI_AHCI_PLAT
|
#ifndef CONFIG_SCSI_AHCI_PLAT
|
||||||
# if defined(CONFIG_DM_PCI) || defined(CONFIG_DM_SCSI)
|
# ifdef CONFIG_DM_PCI
|
||||||
static int ahci_init_one(struct udevice *dev)
|
static int ahci_init_one(struct udevice *dev)
|
||||||
# else
|
# else
|
||||||
static int ahci_init_one(pci_dev_t dev)
|
static int ahci_init_one(pci_dev_t dev)
|
||||||
# endif
|
# endif
|
||||||
{
|
{
|
||||||
#if !defined(CONFIG_DM_SCSI)
|
|
||||||
u16 vendor;
|
u16 vendor;
|
||||||
#endif
|
|
||||||
int rc;
|
int rc;
|
||||||
|
|
||||||
probe_ent = malloc(sizeof(struct ahci_probe_ent));
|
probe_ent = malloc(sizeof(struct ahci_probe_ent));
|
||||||
@ -454,7 +450,6 @@ static int ahci_init_one(pci_dev_t dev)
|
|||||||
probe_ent->pio_mask = 0x1f;
|
probe_ent->pio_mask = 0x1f;
|
||||||
probe_ent->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */
|
probe_ent->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */
|
||||||
|
|
||||||
#if !defined(CONFIG_DM_SCSI)
|
|
||||||
#ifdef CONFIG_DM_PCI
|
#ifdef CONFIG_DM_PCI
|
||||||
probe_ent->mmio_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_5,
|
probe_ent->mmio_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_5,
|
||||||
PCI_REGION_MEM);
|
PCI_REGION_MEM);
|
||||||
@ -478,10 +473,6 @@ static int ahci_init_one(pci_dev_t dev)
|
|||||||
if (vendor == 0x197b)
|
if (vendor == 0x197b)
|
||||||
pci_write_config_byte(dev, 0x41, 0xa1);
|
pci_write_config_byte(dev, 0x41, 0xa1);
|
||||||
#endif
|
#endif
|
||||||
#else
|
|
||||||
struct scsi_platdata *plat = dev_get_platdata(dev);
|
|
||||||
probe_ent->mmio_base = (void *)plat->base;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
debug("ahci mmio_base=0x%p\n", probe_ent->mmio_base);
|
debug("ahci mmio_base=0x%p\n", probe_ent->mmio_base);
|
||||||
/* initialize adapter */
|
/* initialize adapter */
|
||||||
@ -963,17 +954,14 @@ int scsi_exec(ccb *pccb)
|
|||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
#if defined(CONFIG_DM_SCSI)
|
|
||||||
void scsi_low_level_init(int busdevfunc, struct udevice *dev)
|
|
||||||
#else
|
|
||||||
void scsi_low_level_init(int busdevfunc)
|
void scsi_low_level_init(int busdevfunc)
|
||||||
#endif
|
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
u32 linkmap;
|
u32 linkmap;
|
||||||
|
|
||||||
#ifndef CONFIG_SCSI_AHCI_PLAT
|
#ifndef CONFIG_SCSI_AHCI_PLAT
|
||||||
# if defined(CONFIG_DM_PCI)
|
# ifdef CONFIG_DM_PCI
|
||||||
struct udevice *dev;
|
struct udevice *dev;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
@ -981,8 +969,6 @@ void scsi_low_level_init(int busdevfunc)
|
|||||||
if (ret)
|
if (ret)
|
||||||
return;
|
return;
|
||||||
ahci_init_one(dev);
|
ahci_init_one(dev);
|
||||||
# elif defined(CONFIG_DM_SCSI)
|
|
||||||
ahci_init_one(dev);
|
|
||||||
# else
|
# else
|
||||||
ahci_init_one(busdevfunc);
|
ahci_init_one(busdevfunc);
|
||||||
# endif
|
# endif
|
||||||
|
@ -26,7 +26,7 @@ static const char *if_typename_str[IF_TYPE_COUNT] = {
|
|||||||
|
|
||||||
static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
|
static enum uclass_id if_type_uclass_id[IF_TYPE_COUNT] = {
|
||||||
[IF_TYPE_IDE] = UCLASS_INVALID,
|
[IF_TYPE_IDE] = UCLASS_INVALID,
|
||||||
[IF_TYPE_SCSI] = UCLASS_SCSI,
|
[IF_TYPE_SCSI] = UCLASS_INVALID,
|
||||||
[IF_TYPE_ATAPI] = UCLASS_INVALID,
|
[IF_TYPE_ATAPI] = UCLASS_INVALID,
|
||||||
[IF_TYPE_USB] = UCLASS_MASS_STORAGE,
|
[IF_TYPE_USB] = UCLASS_MASS_STORAGE,
|
||||||
[IF_TYPE_DOC] = UCLASS_INVALID,
|
[IF_TYPE_DOC] = UCLASS_INVALID,
|
||||||
|
@ -5,7 +5,6 @@
|
|||||||
* SPDX-License-Identifier: GPL-2.0+
|
* SPDX-License-Identifier: GPL-2.0+
|
||||||
*/
|
*/
|
||||||
#include <common.h>
|
#include <common.h>
|
||||||
#include <dm.h>
|
|
||||||
#include <netdev.h>
|
#include <netdev.h>
|
||||||
#include <ahci.h>
|
#include <ahci.h>
|
||||||
#include <scsi.h>
|
#include <scsi.h>
|
||||||
@ -74,9 +73,10 @@
|
|||||||
#define DRV_NAME "ahci-ceva"
|
#define DRV_NAME "ahci-ceva"
|
||||||
#define CEVA_FLAG_BROKEN_GEN2 1
|
#define CEVA_FLAG_BROKEN_GEN2 1
|
||||||
|
|
||||||
static int ceva_init_sata(ulong mmio)
|
int init_sata(int dev)
|
||||||
{
|
{
|
||||||
ulong tmp;
|
ulong tmp;
|
||||||
|
ulong mmio = ZYNQMP_SATA_BASEADDR;
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@ -111,40 +111,3 @@ static int ceva_init_sata(ulong mmio)
|
|||||||
}
|
}
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int sata_ceva_probe(struct udevice *dev)
|
|
||||||
{
|
|
||||||
struct scsi_platdata *plat = dev_get_platdata(dev);
|
|
||||||
|
|
||||||
ceva_init_sata(plat->base);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static const struct udevice_id sata_ceva_ids[] = {
|
|
||||||
{ .compatible = "ceva,ahci-1v84" },
|
|
||||||
{ }
|
|
||||||
};
|
|
||||||
|
|
||||||
static int sata_ceva_ofdata_to_platdata(struct udevice *dev)
|
|
||||||
{
|
|
||||||
struct scsi_platdata *plat = dev_get_platdata(dev);
|
|
||||||
|
|
||||||
plat->base = dev_get_addr(dev);
|
|
||||||
if (plat->base == FDT_ADDR_T_NONE)
|
|
||||||
return -EINVAL;
|
|
||||||
|
|
||||||
/* Hardcode number for ceva sata controller */
|
|
||||||
plat->max_lun = 1; /* Actually two but untested */
|
|
||||||
plat->max_id = 2;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
U_BOOT_DRIVER(ceva_host_blk) = {
|
|
||||||
.name = "ceva_sata",
|
|
||||||
.id = UCLASS_SCSI,
|
|
||||||
.of_match = sata_ceva_ids,
|
|
||||||
.probe = sata_ceva_probe,
|
|
||||||
.ofdata_to_platdata = sata_ceva_ofdata_to_platdata,
|
|
||||||
.platdata_auto_alloc_size = sizeof(struct scsi_platdata),
|
|
||||||
};
|
|
||||||
|
@ -1,27 +0,0 @@
|
|||||||
/*
|
|
||||||
* Copyright (c) 2015 Google, Inc
|
|
||||||
* Written by Simon Glass <sjg@chromium.org>
|
|
||||||
* Copyright (c) 2016 Xilinx, Inc
|
|
||||||
* Written by Michal Simek
|
|
||||||
*
|
|
||||||
* Based on ahci-uclass.c
|
|
||||||
*
|
|
||||||
* SPDX-License-Identifier: GPL-2.0+
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <common.h>
|
|
||||||
#include <dm.h>
|
|
||||||
#include <scsi.h>
|
|
||||||
|
|
||||||
static int scsi_post_probe(struct udevice *dev)
|
|
||||||
{
|
|
||||||
debug("%s: device %p\n", __func__, dev);
|
|
||||||
scsi_low_level_init(0, dev);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
UCLASS_DRIVER(scsi) = {
|
|
||||||
.id = UCLASS_SCSI,
|
|
||||||
.name = "scsi",
|
|
||||||
.post_probe = scsi_post_probe,
|
|
||||||
};
|
|
@ -648,8 +648,9 @@ static int axi_emac_probe(struct udevice *dev)
|
|||||||
priv->bus->read = axiemac_miiphy_read;
|
priv->bus->read = axiemac_miiphy_read;
|
||||||
priv->bus->write = axiemac_miiphy_write;
|
priv->bus->write = axiemac_miiphy_write;
|
||||||
priv->bus->priv = priv;
|
priv->bus->priv = priv;
|
||||||
|
strcpy(priv->bus->name, "axi_emac");
|
||||||
|
|
||||||
ret = mdio_register_seq(priv->bus, dev->seq);
|
ret = mdio_register(priv->bus);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
|
@ -566,8 +566,9 @@ static int emaclite_probe(struct udevice *dev)
|
|||||||
emaclite->bus->read = emaclite_miiphy_read;
|
emaclite->bus->read = emaclite_miiphy_read;
|
||||||
emaclite->bus->write = emaclite_miiphy_write;
|
emaclite->bus->write = emaclite_miiphy_write;
|
||||||
emaclite->bus->priv = emaclite;
|
emaclite->bus->priv = emaclite;
|
||||||
|
strcpy(emaclite->bus->name, "emaclite");
|
||||||
|
|
||||||
ret = mdio_register_seq(emaclite->bus, dev->seq);
|
ret = mdio_register(emaclite->bus);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
|
@ -647,8 +647,9 @@ static int zynq_gem_probe(struct udevice *dev)
|
|||||||
priv->bus->read = zynq_gem_miiphy_read;
|
priv->bus->read = zynq_gem_miiphy_read;
|
||||||
priv->bus->write = zynq_gem_miiphy_write;
|
priv->bus->write = zynq_gem_miiphy_write;
|
||||||
priv->bus->priv = priv;
|
priv->bus->priv = priv;
|
||||||
|
strcpy(priv->bus->name, "gem");
|
||||||
|
|
||||||
ret = mdio_register_seq_name(priv->bus, dev->seq);
|
ret = mdio_register(priv->bus);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
|
@ -145,7 +145,7 @@ struct ahci_ioports {
|
|||||||
};
|
};
|
||||||
|
|
||||||
struct ahci_probe_ent {
|
struct ahci_probe_ent {
|
||||||
#if defined(CONFIG_DM_PCI) || defined(CONFIG_DM_SCSI)
|
#ifdef CONFIG_DM_PCI
|
||||||
struct udevice *dev;
|
struct udevice *dev;
|
||||||
#else
|
#else
|
||||||
pci_dev_t dev;
|
pci_dev_t dev;
|
||||||
|
@ -181,6 +181,7 @@
|
|||||||
#ifdef CONFIG_SATA_CEVA
|
#ifdef CONFIG_SATA_CEVA
|
||||||
#define CONFIG_LIBATA
|
#define CONFIG_LIBATA
|
||||||
#define CONFIG_SCSI_AHCI
|
#define CONFIG_SCSI_AHCI
|
||||||
|
#define CONFIG_SCSI_AHCI_PLAT
|
||||||
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
|
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
|
||||||
#define CONFIG_SYS_SCSI_MAX_LUN 1
|
#define CONFIG_SYS_SCSI_MAX_LUN 1
|
||||||
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
|
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
|
||||||
|
@ -16,6 +16,7 @@
|
|||||||
#define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
|
#define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
|
||||||
#define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ >> 9)
|
#define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ >> 9)
|
||||||
#define CONFIG_ZYNQ_EEPROM
|
#define CONFIG_ZYNQ_EEPROM
|
||||||
|
#define CONFIG_SATA_CEVA
|
||||||
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
|
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
|
||||||
ZYNQMP_USB1_XHCI_BASEADDR}
|
ZYNQMP_USB1_XHCI_BASEADDR}
|
||||||
|
|
||||||
|
@ -41,6 +41,8 @@
|
|||||||
#define CONFIG_CMD_PCA953X
|
#define CONFIG_CMD_PCA953X
|
||||||
#define CONFIG_CMD_PCA953X_INFO
|
#define CONFIG_CMD_PCA953X_INFO
|
||||||
|
|
||||||
|
#define CONFIG_SATA_CEVA
|
||||||
|
|
||||||
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
|
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
|
||||||
|
|
||||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
|
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
|
||||||
|
@ -66,7 +66,6 @@ enum uclass_id {
|
|||||||
UCLASS_REMOTEPROC, /* Remote Processor device */
|
UCLASS_REMOTEPROC, /* Remote Processor device */
|
||||||
UCLASS_RESET, /* Reset controller device */
|
UCLASS_RESET, /* Reset controller device */
|
||||||
UCLASS_RTC, /* Real time clock device */
|
UCLASS_RTC, /* Real time clock device */
|
||||||
UCLASS_SCSI, /* SCSI device */
|
|
||||||
UCLASS_SERIAL, /* Serial UART */
|
UCLASS_SERIAL, /* Serial UART */
|
||||||
UCLASS_SPI, /* SPI bus */
|
UCLASS_SPI, /* SPI bus */
|
||||||
UCLASS_SPMI, /* System Power Management Interface bus */
|
UCLASS_SPMI, /* System Power Management Interface bus */
|
||||||
|
@ -48,7 +48,6 @@ void miiphy_listdev(void);
|
|||||||
struct mii_dev *mdio_alloc(void);
|
struct mii_dev *mdio_alloc(void);
|
||||||
void mdio_free(struct mii_dev *bus);
|
void mdio_free(struct mii_dev *bus);
|
||||||
int mdio_register(struct mii_dev *bus);
|
int mdio_register(struct mii_dev *bus);
|
||||||
int mdio_register_seq_name(struct mii_dev *bus, int seq);
|
|
||||||
int mdio_unregister(struct mii_dev *bus);
|
int mdio_unregister(struct mii_dev *bus);
|
||||||
void mdio_list_devices(void);
|
void mdio_list_devices(void);
|
||||||
|
|
||||||
|
@ -2,7 +2,6 @@
|
|||||||
#define __SATA_H__
|
#define __SATA_H__
|
||||||
#include <part.h>
|
#include <part.h>
|
||||||
|
|
||||||
#if !defined(CONFIG_DM_SCSI)
|
|
||||||
int init_sata(int dev);
|
int init_sata(int dev);
|
||||||
int reset_sata(int dev);
|
int reset_sata(int dev);
|
||||||
int scan_sata(int dev);
|
int scan_sata(int dev);
|
||||||
@ -16,6 +15,5 @@ int __sata_stop(void);
|
|||||||
int sata_port_status(int dev, int port);
|
int sata_port_status(int dev, int port);
|
||||||
|
|
||||||
extern struct blk_desc sata_dev_desc[];
|
extern struct blk_desc sata_dev_desc[];
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
@ -166,11 +166,8 @@ typedef struct SCSI_cmd_block{
|
|||||||
void scsi_print_error(ccb *pccb);
|
void scsi_print_error(ccb *pccb);
|
||||||
int scsi_exec(ccb *pccb);
|
int scsi_exec(ccb *pccb);
|
||||||
void scsi_bus_reset(void);
|
void scsi_bus_reset(void);
|
||||||
#if !defined(CONFIG_DM_SCSI)
|
|
||||||
void scsi_low_level_init(int busdevfunc);
|
void scsi_low_level_init(int busdevfunc);
|
||||||
#else
|
|
||||||
void scsi_low_level_init(int busdevfunc, struct udevice *dev);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/***************************************************************************
|
/***************************************************************************
|
||||||
* functions residing inside cmd_scsi.c
|
* functions residing inside cmd_scsi.c
|
||||||
@ -178,21 +175,6 @@ void scsi_low_level_init(int busdevfunc, struct udevice *dev);
|
|||||||
void scsi_init(void);
|
void scsi_init(void);
|
||||||
int scsi_scan(int mode);
|
int scsi_scan(int mode);
|
||||||
|
|
||||||
#if defined(CONFIG_DM_SCSI)
|
|
||||||
/**
|
|
||||||
* struct scsi_platdata - stores information about SCSI controller
|
|
||||||
*
|
|
||||||
* @base: Controller base address
|
|
||||||
* @max_lun: Maximum number of logical units
|
|
||||||
* @max_id: Maximum number of target ids
|
|
||||||
*/
|
|
||||||
struct scsi_platdata {
|
|
||||||
unsigned long base;
|
|
||||||
unsigned long max_lun;
|
|
||||||
unsigned long max_id;
|
|
||||||
};
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define SCSI_IDENTIFY 0xC0 /* not used */
|
#define SCSI_IDENTIFY 0xC0 /* not used */
|
||||||
|
|
||||||
/* Hardware errors */
|
/* Hardware errors */
|
||||||
|
@ -225,26 +225,16 @@ static int zynqimage_check_image_types(uint8_t type)
|
|||||||
static void zynqimage_parse_initparams(struct zynq_header *zynqhdr,
|
static void zynqimage_parse_initparams(struct zynq_header *zynqhdr,
|
||||||
const char *filename)
|
const char *filename)
|
||||||
{
|
{
|
||||||
FILE *fp;
|
/* Expect a table of register-value pairs, e.g. "0x12345678 0x4321" */
|
||||||
|
FILE *fp = fopen(filename, "r");
|
||||||
struct zynq_reginit reginit;
|
struct zynq_reginit reginit;
|
||||||
unsigned int reg_count = 0;
|
unsigned int reg_count = 0;
|
||||||
int r, err;
|
int r;
|
||||||
struct stat path_stat;
|
|
||||||
|
|
||||||
/* Expect a table of register-value pairs, e.g. "0x12345678 0x4321" */
|
|
||||||
fp = fopen(filename, "r");
|
|
||||||
if (!fp) {
|
if (!fp) {
|
||||||
fprintf(stderr, "Cannot open initparams file: %s\n", filename);
|
fprintf(stderr, "Cannot open initparams file: %s\n", filename);
|
||||||
exit(1);
|
exit(1);
|
||||||
}
|
}
|
||||||
|
|
||||||
err = fstat(fileno(fp), &path_stat);
|
|
||||||
if (err)
|
|
||||||
return;
|
|
||||||
|
|
||||||
if (!S_ISREG(path_stat.st_mode))
|
|
||||||
return;
|
|
||||||
|
|
||||||
do {
|
do {
|
||||||
r = fscanf(fp, "%x %x", ®init.address, ®init.data);
|
r = fscanf(fp, "%x %x", ®init.address, ®init.data);
|
||||||
if (r == 2) {
|
if (r == 2) {
|
||||||
|
@ -240,23 +240,19 @@ static void zynqmpimage_parse_initparams(struct zynqmp_header *zynqhdr,
|
|||||||
FILE *fp;
|
FILE *fp;
|
||||||
struct zynqmp_reginit reginit;
|
struct zynqmp_reginit reginit;
|
||||||
unsigned int reg_count = 0;
|
unsigned int reg_count = 0;
|
||||||
int r, err;
|
int r;
|
||||||
struct stat path_stat;
|
struct stat path_stat;
|
||||||
|
|
||||||
|
stat(filename, &path_stat);
|
||||||
|
if (!S_ISREG(path_stat.st_mode))
|
||||||
|
return;
|
||||||
|
|
||||||
/* Expect a table of register-value pairs, e.g. "0x12345678 0x4321" */
|
/* Expect a table of register-value pairs, e.g. "0x12345678 0x4321" */
|
||||||
fp = fopen(filename, "r");
|
fp = fopen(filename, "r");
|
||||||
if (!fp) {
|
if (!fp) {
|
||||||
fprintf(stderr, "Cannot open initparams file: %s\n", filename);
|
fprintf(stderr, "Cannot open initparams file: %s\n", filename);
|
||||||
exit(1);
|
exit(1);
|
||||||
}
|
}
|
||||||
|
|
||||||
err = fstat(fileno(fp), &path_stat);
|
|
||||||
if (err)
|
|
||||||
return;
|
|
||||||
|
|
||||||
if (!S_ISREG(path_stat.st_mode))
|
|
||||||
return;
|
|
||||||
|
|
||||||
do {
|
do {
|
||||||
r = fscanf(fp, "%x %x", ®init.address, ®init.data);
|
r = fscanf(fp, "%x %x", ®init.address, ®init.data);
|
||||||
if (r == 2) {
|
if (r == 2) {
|
||||||
|
Loading…
Reference in New Issue
Block a user