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clk: agilex: Add NAND clock support

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Add get nand_clk and nand_x clock support.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
This commit is contained in:
Ley Foon Tan 2020-07-10 20:55:20 +08:00
parent a58d86db46
commit 36162a8eb8
1 changed files with 3 additions and 0 deletions
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3
drivers/clk/altera/clk-agilex.c
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@ -533,7 +533,10 @@ static ulong socfpga_clk_get_rate(struct clk *clk)
case AGILEX_EMAC2_CLK:
return clk_get_emac_clk_hz(plat, clk->id);
case AGILEX_USB_CLK:
case AGILEX_NAND_X_CLK:
return clk_get_l4_mp_clk_hz(plat);
case AGILEX_NAND_CLK:
return clk_get_l4_mp_clk_hz(plat) / 4;
default:
return -ENXIO;
}