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armv8: ls1046ardb: update the DIMM WRLVL_START value

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The WRLVL_START values are optimized for old DDR MTA18ASF1G72AZ.
Update DDR struct to set new WRLVL_START values so that the new DIMM
MTA18ADF2G72AZ get optimized and the old DIMM still works.

Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Yuantian Tang 2020-04-20 12:52:54 +08:00 committed by Priyanka Jain
parent 33c3dfd297
commit 35ad8f7af4
1 changed files with 1 additions and 1 deletions
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board/freescale/ls1046ardb/ddr.h
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@ -32,7 +32,7 @@ static const struct board_specific_parameters udimm0[] = {
{2, 1350, 0, 8, 6, 0x0708090B, 0x0C0D0E09,},
{2, 1666, 0, 8, 7, 0x08090A0C, 0x0D0F100B,},
{2, 1900, 0, 8, 7, 0x09090B0D, 0x0E10120B,},
{2, 2300, 0, 8, 9, 0x0A0B0C10, 0x1213140E,},
{2, 2300, 0, 8, 7, 0x08090A0E, 0x1011120C,},
{}
};