From e9b43cae1a20af13d1baeb13038b3f34905c14b5 Mon Sep 17 00:00:00 2001 From: Wolfgang Wegner Date: Tue, 30 Mar 2010 19:20:31 +0100 Subject: [PATCH 1/3] add missing PCS3 for MCF5445x This patch adds the code for handling PCS3 (DSPI chip select 3) in cpu_init.c and m5445x.h Signed-off-by: Wolfgang Wegner --- arch/m68k/cpu/mcf5445x/cpu_init.c | 7 +++++++ arch/m68k/include/asm/m5445x.h | 1 + 2 files changed, 8 insertions(+) diff --git a/arch/m68k/cpu/mcf5445x/cpu_init.c b/arch/m68k/cpu/mcf5445x/cpu_init.c index 8d51d35d68..259985f06d 100644 --- a/arch/m68k/cpu/mcf5445x/cpu_init.c +++ b/arch/m68k/cpu/mcf5445x/cpu_init.c @@ -238,6 +238,10 @@ int cfspi_claim_bus(uint bus, uint cs) gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS2_PCS2; gpio->par_dspi |= GPIO_PAR_DSPI_PCS2_PCS2; break; + case 3: + gpio->par_dma &= GPIO_PAR_DMA_DACK0_UNMASK; + gpio->par_dma |= GPIO_PAR_DMA_DACK0_PCS3; + break; case 5: gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS5_PCS5; gpio->par_dspi |= GPIO_PAR_DSPI_PCS5_PCS5; @@ -264,6 +268,9 @@ void cfspi_release_bus(uint bus, uint cs) case 2: gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS2_PCS2; break; + case 3: + gpio->par_dma &= GPIO_PAR_DMA_DACK0_UNMASK; + break; case 5: gpio->par_dspi &= ~GPIO_PAR_DSPI_PCS5_PCS5; break; diff --git a/arch/m68k/include/asm/m5445x.h b/arch/m68k/include/asm/m5445x.h index dfddde62ad..c575b8f4c7 100644 --- a/arch/m68k/include/asm/m5445x.h +++ b/arch/m68k/include/asm/m5445x.h @@ -314,6 +314,7 @@ #define GPIO_PAR_DMA_DREQ1_GPIO (0x00) #define GPIO_PAR_DMA_DACK0_UNMASK (0xF3) #define GPIO_PAR_DMA_DACK0_DACK1 (0x0C) +#define GPIO_PAR_DMA_DACK0_PCS3 (0x08) #define GPIO_PAR_DMA_DACK0_ULPI_DIR (0x04) #define GPIO_PAR_DMA_DACK0_GPIO (0x00) #define GPIO_PAR_DMA_DREQ0_DREQ0 (0x01) From ae49099755affc942171a7727c1b12c51d167abf Mon Sep 17 00:00:00 2001 From: Wolfgang Wegner Date: Tue, 30 Mar 2010 19:19:50 +0100 Subject: [PATCH 2/3] add CONFIG_SYS_FEC_NO_SHARED_PHY for MCF5445x This patch adds the possibility to handle seperate PHYs to MCF5445x. Naming is chosen to resemble the contrary CONFIG_FEC_SHARED_PHY in the linux kernel. Signed-off-by: Wolfgang Wegner --- arch/m68k/cpu/mcf5445x/cpu_init.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/m68k/cpu/mcf5445x/cpu_init.c b/arch/m68k/cpu/mcf5445x/cpu_init.c index 259985f06d..e2a1293cac 100644 --- a/arch/m68k/cpu/mcf5445x/cpu_init.c +++ b/arch/m68k/cpu/mcf5445x/cpu_init.c @@ -185,8 +185,19 @@ int fecpin_setclear(struct eth_device *dev, int setclear) struct fec_info_s *info = (struct fec_info_s *)dev->priv; if (setclear) { +#ifdef CONFIG_SYS_FEC_NO_SHARED_PHY + if (info->iobase == CONFIG_SYS_FEC0_IOBASE) + gpio->par_feci2c |= + (GPIO_PAR_FECI2C_MDC0_MDC0 | + GPIO_PAR_FECI2C_MDIO0_MDIO0); + else + gpio->par_feci2c |= + (GPIO_PAR_FECI2C_MDC1_MDC1 | + GPIO_PAR_FECI2C_MDIO1_MDIO1); +#else gpio->par_feci2c |= (GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0); +#endif if (info->iobase == CONFIG_SYS_FEC0_IOBASE) gpio->par_fec |= GPIO_PAR_FEC_FEC0_RMII_GPIO; From adf55679af1ed98c15a136eb81d6204ebe740b30 Mon Sep 17 00:00:00 2001 From: Wolfgang Wegner Date: Tue, 30 Mar 2010 19:19:51 +0100 Subject: [PATCH 3/3] add CONFIG_SYS_FEC_FULL_MII for MCF5445x This patch adds support for full MII interface on MCF5445x (in contrast to RMII as used on the evaluation boards). Signed-off-by: Wolfgang Wegner --- arch/m68k/cpu/mcf5445x/cpu_init.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/m68k/cpu/mcf5445x/cpu_init.c b/arch/m68k/cpu/mcf5445x/cpu_init.c index e2a1293cac..fdcd18585d 100644 --- a/arch/m68k/cpu/mcf5445x/cpu_init.c +++ b/arch/m68k/cpu/mcf5445x/cpu_init.c @@ -207,10 +207,19 @@ int fecpin_setclear(struct eth_device *dev, int setclear) gpio->par_feci2c &= ~(GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0); - if (info->iobase == CONFIG_SYS_FEC0_IOBASE) + if (info->iobase == CONFIG_SYS_FEC0_IOBASE) { +#ifdef CONFIG_SYS_FEC_FULL_MII + gpio->par_fec |= GPIO_PAR_FEC_FEC0_MII; +#else gpio->par_fec &= GPIO_PAR_FEC_FEC0_UNMASK; - else +#endif + } else { +#ifdef CONFIG_SYS_FEC_FULL_MII + gpio->par_fec |= GPIO_PAR_FEC_FEC1_MII; +#else gpio->par_fec &= GPIO_PAR_FEC_FEC1_UNMASK; +#endif + } } return 0; }