brain-hackers_pepepper-mirror/u-boot-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/u-boot-brain synced 2024-09-27 23:20:26 +09:00
Code Issues Projects Releases Wiki Activity

ls102xa: fdt: Disable QSPI and DSPI in NOR/NAND/SD boot

Browse Source 
As QSPI/DSPI and IFC are pin multiplexed, QSPI and DSPI are
only enabled in QSPI boot, and disabled in other boot modes.
IFC is enabled in NOR/NAND/SD boot, and disabled in QSPI boot.
This patch will add fdt support for the above rules.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Alison Wang 2014-12-26 13:14:01 +08:00 committed by York Sun
parent 7df50fd323
commit 33d2e46591
2 changed files with 17 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
arch/arm/cpu/armv7/ls102xa/fdt.c
View File

@ -150,4 +150,17 @@ void ft_cpu_setup(void *blob, bd_t *bd)
do_fixup_by_compat_u32(blob, "fsl, ls1021a-flexcan",
"clock-frequency", busclk / 2, 1);
#ifdef CONFIG_QSPI_BOOT
off = fdt_node_offset_by_compat_reg(blob, FSL_IFC_COMPAT,
CONFIG_SYS_IFC_ADDR);
fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0);
#else
off = fdt_node_offset_by_compat_reg(blob, FSL_QSPI_COMPAT,
QSPI0_BASE_ADDR);
fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0);
off = fdt_node_offset_by_compat_reg(blob, FSL_DSPI_COMPAT,
DSPI1_BASE_ADDR);
fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0);
#endif
}

4
arch/arm/include/asm/arch-ls102xa/config.h
View File

@ -102,4 +102,8 @@
#error SoC not defined
#endif
#define FSL_IFC_COMPAT "fsl,ifc"
#define FSL_QSPI_COMPAT "fsl,ls1-qspi"
#define FSL_DSPI_COMPAT "fsl,vf610-dspi"
#endif /* _ASM_ARMV7_LS102XA_CONFIG_ */