arm: dts: rmobile: r8a774a1: Synchronize DTs with Linux 5.10

DTS files apart from r8a774a1-hihope-rzg2m-u-boot.dts and
r8a774a1-u-boot.dtsi have been imported from linux 5.10
commit 2c85ebc57b3e1817 ("Linux 5.10").

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
This commit is contained in:
Biju Das 2021-01-17 16:30:11 +00:00 committed by Marek Vasut
parent 472a716b8f
commit 32568ee5b9
7 changed files with 733 additions and 0 deletions

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// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the HiHope RZ/G2H Rev.4.0 and
* HiHope RZ/G2[MN] Rev.[2.0/3.0/4.0] main board common parts
*
* Copyright (C) 2021 Renesas Electronics Corp.
*/
#include <dt-bindings/gpio/gpio.h>
/ {
aliases {
serial0 = &scif2;
serial1 = &hscif0;
};
chosen {
bootargs = "ignore_loglevel";
stdout-path = "serial0:115200n8";
};
hdmi0-out {
compatible = "hdmi-connector";
type = "a";
port {
hdmi0_con: endpoint {
remote-endpoint = <&rcar_dw_hdmi0_out>;
};
};
};
leds {
compatible = "gpio-leds";
led1 {
gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
};
led2 {
gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
};
led3 {
gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
};
led4 {
gpios = <&gpio6 11 GPIO_ACTIVE_HIGH>;
};
};
reg_1p8v: regulator0 {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
reg_3p3v: regulator1 {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
sound_card: sound {
compatible = "audio-graph-card";
label = "rcar-sound";
dais = <&rsnd_port>;
};
vbus0_usb2: regulator-vbus0-usb2 {
compatible = "regulator-fixed";
regulator-name = "USB20_VBUS0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vccq_sdhi0: regulator-vccq-sdhi0 {
compatible = "regulator-gpio";
regulator-name = "SDHI0 VccQ";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio6 30 GPIO_ACTIVE_HIGH>;
gpios-states = <1>;
states = <3300000 1>, <1800000 0>;
};
x302_clk: x302-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <33000000>;
};
x304_clk: x304-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
};
&audio_clk_a {
clock-frequency = <22579200>;
};
&du {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&extal_clk {
clock-frequency = <16666666>;
};
&extalr_clk {
clock-frequency = <32768>;
};
&gpio6 {
usb1-reset {
gpio-hog;
gpios = <10 GPIO_ACTIVE_LOW>;
output-low;
line-name = "usb1-reset";
};
};
&hdmi0 {
status = "okay";
ports {
port@1 {
reg = <1>;
rcar_dw_hdmi0_out: endpoint {
remote-endpoint = <&hdmi0_con>;
};
};
port@2 {
reg = <2>;
dw_hdmi0_snd_in: endpoint {
remote-endpoint = <&rsnd_endpoint>;
};
};
};
};
&hscif0 {
pinctrl-0 = <&hscif0_pins>;
pinctrl-names = "default";
uart-has-rtscts;
status = "okay";
};
&hsusb {
dr_mode = "otg";
status = "okay";
};
&i2c4 {
clock-frequency = <400000>;
status = "okay";
versaclock5: clock-generator@6a {
compatible = "idt,5p49v5923";
reg = <0x6a>;
#clock-cells = <1>;
clocks = <&x304_clk>;
clock-names = "xin";
};
};
&ohci0 {
status = "okay";
};
&ohci1 {
status = "okay";
};
&pcie_bus_clk {
clock-frequency = <100000000>;
};
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
hscif0_pins: hscif0 {
groups = "hscif0_data", "hscif0_ctrl";
function = "hscif0";
};
scif2_pins: scif2 {
groups = "scif2_data_a";
function = "scif2";
};
scif_clk_pins: scif_clk {
groups = "scif_clk_a";
function = "scif_clk";
};
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
power-source = <3300>;
};
sdhi0_pins_uhs: sd0_uhs {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
power-source = <1800>;
};
sdhi2_pins: sd2 {
groups = "sdhi2_data4", "sdhi2_ctrl";
function = "sdhi2";
power-source = <1800>;
};
sdhi3_pins: sd3 {
groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
function = "sdhi3";
power-source = <1800>;
};
usb0_pins: usb0 {
groups = "usb0";
function = "usb0";
};
usb1_pins: usb1 {
mux {
groups = "usb1";
function = "usb1";
};
ovc {
pins = "GP_6_27";
bias-pull-up;
};
};
usb30_pins: usb30 {
groups = "usb30";
function = "usb30";
};
};
&rwdt {
timeout-sec = <60>;
status = "okay";
};
&scif2 {
pinctrl-0 = <&scif2_pins>;
pinctrl-names = "default";
status = "okay";
};
&scif_clk {
clock-frequency = <14745600>;
};
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-1 = <&sdhi0_pins_uhs>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&vccq_sdhi0>;
cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
bus-width = <4>;
sd-uhs-sdr50;
sd-uhs-sdr104;
status = "okay";
};
&sdhi2 {
status = "okay";
pinctrl-0 = <&sdhi2_pins>;
pinctrl-names = "default";
vmmc-supply = <&wlan_en_reg>;
bus-width = <4>;
non-removable;
cap-power-off-card;
keep-power-in-suspend;
#address-cells = <1>;
#size-cells = <0>;
wlcore: wlcore@2 {
compatible = "ti,wl1837";
reg = <2>;
interrupt-parent = <&gpio2>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
};
};
&sdhi3 {
pinctrl-0 = <&sdhi3_pins>;
pinctrl-1 = <&sdhi3_pins>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_1p8v>;
bus-width = <8>;
mmc-hs200-1_8v;
non-removable;
fixed-emmc-driver-type = <1>;
status = "okay";
};
&usb_extal_clk {
clock-frequency = <50000000>;
};
&usb2_phy0 {
pinctrl-0 = <&usb0_pins>;
pinctrl-names = "default";
vbus-supply = <&vbus0_usb2>;
status = "okay";
};
&usb2_phy1 {
pinctrl-0 = <&usb1_pins>;
pinctrl-names = "default";
status = "okay";
};
&usb3_peri0 {
phys = <&usb3_phy0>;
phy-names = "usb";
companion = <&xhci0>;
status = "okay";
};
&usb3_phy0 {
status = "okay";
};
&usb3s0_clk {
clock-frequency = <100000000>;
};
&xhci0 {
pinctrl-0 = <&usb30_pins>;
pinctrl-names = "default";
status = "okay";
};

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// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the HiHope RZ/G2H Rev.4.0 and
* HiHope RZ/G2[MN] Rev.3.0/4.0 main board common parts
*
* Copyright (C) 2021 Renesas Electronics Corp.
*/
#include <dt-bindings/gpio/gpio.h>
#include "hihope-common.dtsi"
/ {
audio_clkout: audio-clkout {
/*
* This is same as <&rcar_sound 0>
* but needed to avoid cs2000/rcar_sound probe dead-lock
*/
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <12288000>;
};
wlan_en_reg: regulator-wlan_en {
compatible = "regulator-fixed";
regulator-name = "wlan-en-regulator";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
startup-delay-us = <70000>;
gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
x1801_clk: x1801-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24576000>;
};
};
&hscif0 {
bluetooth {
compatible = "ti,wl1837-st";
enable-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
};
};
&i2c2 {
pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default";
status = "okay";
cs2000: clk_multiplier@4f {
#clock-cells = <0>;
compatible = "cirrus,cs2000-cp";
reg = <0x4f>;
clocks = <&audio_clkout>, <&x1801_clk>;
clock-names = "clk_in", "ref_clk";
assigned-clocks = <&cs2000>;
assigned-clock-rates = <24576000>; /* 1/1 divide */
};
};
&pfc {
i2c2_pins: i2c2 {
groups = "i2c2_a";
function = "i2c2";
};
sound_clk_pins: sound_clk {
groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clkout_a";
function = "audio_clk";
};
sound_pins: sound {
groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
function = "ssi";
};
};
&rcar_sound {
pinctrl-0 = <&sound_pins &sound_clk_pins>;
pinctrl-names = "default";
status = "okay";
/* Single DAI */
#sound-dai-cells = <0>;
/* audio_clkout0/1/2/3 */
#clock-cells = <1>;
clock-frequency = <12288000 11289600>;
/* update <audio_clk_b> to <cs2000> */
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clk_a>, <&cs2000>,
<&audio_clk_c>,
<&cpg CPG_CORE CPG_AUDIO_CLK_I>;
rsnd_port: port {
rsnd_endpoint: endpoint {
remote-endpoint = <&dw_hdmi0_snd_in>;
dai-format = "i2s";
bitclock-master = <&rsnd_endpoint>;
frame-master = <&rsnd_endpoint>;
playback = <&ssi2>;
};
};
};

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// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the RZ/G2[HMN] HiHope sub board common parts
*
* Copyright (C) 2021 Renesas Electronics Corp.
*/
/ {
aliases {
ethernet0 = &avb;
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
};
};
&avb {
pinctrl-0 = <&avb_pins>;
pinctrl-names = "default";
phy-handle = <&phy0>;
phy-mode = "rgmii-txid";
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
interrupt-parent = <&gpio2>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
};
};
&can0 {
pinctrl-0 = <&can0_pins>;
pinctrl-names = "default";
status = "okay";
};
&can1 {
pinctrl-0 = <&can1_pins>;
pinctrl-names = "default";
status = "okay";
};
&pciec0 {
status = "okay";
};
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
avb_pins: avb {
mux {
groups = "avb_link", "avb_mdio", "avb_mii";
function = "avb";
};
pins_mdio {
groups = "avb_mdio";
drive-strength = <24>;
};
pins_mii_tx {
pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
"PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
drive-strength = <12>;
};
};
can0_pins: can0 {
groups = "can0_data_a";
function = "can0";
};
can1_pins: can1 {
groups = "can1_data";
function = "can1";
};
pwm0_pins: pwm0 {
groups = "pwm0";
function = "pwm0";
};
};
&pwm0 {
pinctrl-0 = <&pwm0_pins>;
pinctrl-names = "default";
status = "okay";
};

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// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the HiHope RZ/G2M Rev.3.0/4.0 connected to
* sub board
*
* Copyright (C) 2021 Renesas Electronics Corp.
*/
#include "r8a774a1-hihope-rzg2m.dts"
#include "hihope-rzg2-ex.dtsi"
/ {
model = "HopeRun HiHope RZ/G2M with sub board";
compatible = "hoperun,hihope-rzg2-ex", "hoperun,hihope-rzg2m",
"renesas,r8a774a1";
};
/* SW43 should be OFF, if in ON state SATA port will be activated */
&pciec1 {
status = "okay";
};

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// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source extras for U-Boot for the Hihope RZ/G2M board
*
* Copyright (C) 2021 Renesas Electronics Corporation
*/
#include "r8a774a1-hihope-rzg2m-ex.dts"
#include "r8a774a1-u-boot.dtsi"
&gpio3 {
bt_reg_on{
gpio-hog;
gpios = <13 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "bt-reg-on";
};
};
&gpio4 {
wlan_reg_on{
gpio-hog;
gpios = <6 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "wlan-reg-on";
};
};

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// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the HiHope RZ/G2M Rev.3.0/4.0 main board
*
* Copyright (C) 2021 Renesas Electronics Corp.
*/
/dts-v1/;
#include "r8a774a1.dtsi"
#include "hihope-rev4.dtsi"
/ {
model = "HopeRun HiHope RZ/G2M main board based on r8a774a1";
compatible = "hoperun,hihope-rzg2m", "renesas,r8a774a1";
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x78000000>;
};
memory@600000000 {
device_type = "memory";
reg = <0x6 0x00000000 0x0 0x80000000>;
};
};
&du {
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>,
<&versaclock5 1>,
<&x302_clk>,
<&versaclock5 2>;
clock-names = "du.0", "du.1", "du.2",
"dclkin.0", "dclkin.1", "dclkin.2";
};

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// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source extras for U-Boot on RZ/G2 R8A774A1 SoC
*
* Copyright (C) 2021 Renesas Electronics Corporation
*/
#include "r8a779x-u-boot.dtsi"
&extalr_clk {
u-boot,dm-pre-reloc;
};
/delete-node/ &audma0;
/delete-node/ &audma1;
/delete-node/ &can0;
/delete-node/ &can1;
/delete-node/ &canfd;
/delete-node/ &csi20;
/delete-node/ &csi40;
/delete-node/ &du;
/delete-node/ &fcpf0;
/delete-node/ &fcpvb0;
/delete-node/ &fcpvd0;
/delete-node/ &fcpvd1;
/delete-node/ &fcpvd2;
/delete-node/ &fcpvi0;
/delete-node/ &hdmi0;
/delete-node/ &lvds0;
/delete-node/ &rcar_sound;
/delete-node/ &sdhi2;
/delete-node/ &sound_card;
/delete-node/ &vin0;
/delete-node/ &vin1;
/delete-node/ &vin2;
/delete-node/ &vin3;
/delete-node/ &vin4;
/delete-node/ &vin5;
/delete-node/ &vin6;
/delete-node/ &vin7;
/delete-node/ &vspb;
/delete-node/ &vspd0;
/delete-node/ &vspd1;
/delete-node/ &vspd2;
/delete-node/ &vspi0;
/ {
/delete-node/ hdmi0-out;
};
/ {
soc {
/delete-node/ fdp1@fe940000;
};
};