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Merge branch 'master' of git://git.denx.de/u-boot-usb

Browse Source 
- DaVinci USB updates
- Various OHCI fixes
- Gadget fixes
This commit is contained in:
Tom Rini 2019-08-10 12:21:27 -04:00
commit 31d136926b
18 changed files with 537 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
cmd/thordown.c
View File

@ -37,7 +37,11 @@ int do_thor_down(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
goto exit;
}
g_dnl_register("usb_dnl_thor");
ret = g_dnl_register("usb_dnl_thor");
if (ret) {
pr_err("g_dnl_register failed %d\n", ret);
return ret;
}
ret = thor_init();
if (ret) {

5
configs/da850evm_defconfig
View File

@ -65,6 +65,8 @@ CONFIG_SPI_FLASH_MTD=y
CONFIG_DM_ETH=y
CONFIG_MII=y
CONFIG_DRIVER_TI_EMAC=y
CONFIG_PHY=y
CONFIG_PHY_DA8XX_USB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_SINGLE=y
CONFIG_DM_SERIAL=y
@ -77,5 +79,8 @@ CONFIG_DM_USB=y
# CONFIG_SPL_DM_USB is not set
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_DA8XX=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_DA8XX=y
CONFIG_USB_MUSB_PIO_ONLY=y
CONFIG_USB_STORAGE=y
# CONFIG_FAT_WRITE is not set

5
configs/da850evm_direct_nor_defconfig
View File

@ -54,6 +54,8 @@ CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_ETH=y
CONFIG_MII=y
CONFIG_DRIVER_TI_EMAC=y
CONFIG_PHY=y
CONFIG_PHY_DA8XX_USB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_SINGLE=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
@ -67,4 +69,7 @@ CONFIG_DM_USB=y
# CONFIG_SPL_DM_USB is not set
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_DA8XX=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_DA8XX=y
CONFIG_USB_MUSB_PIO_ONLY=y
CONFIG_USB_STORAGE=y

5
configs/da850evm_nand_defconfig
View File

@ -61,6 +61,8 @@ CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_DM_ETH=y
CONFIG_PHY=y
CONFIG_PHY_DA8XX_USB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_SINGLE=y
CONFIG_DM_SERIAL=y
@ -73,6 +75,9 @@ CONFIG_DM_USB=y
# CONFIG_SPL_DM_USB is not set
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_DA8XX=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_DA8XX=y
CONFIG_USB_MUSB_PIO_ONLY=y
CONFIG_USB_STORAGE=y
# CONFIG_FAT_WRITE is not set
CONFIG_USE_TINY_PRINTF=y

6
doc/android/fastboot.txt
View File

@ -169,9 +169,9 @@ On the client side you can fetch the bootloader version for instance:
::
$ fastboot getvar bootloader-version
bootloader-version: U-Boot 2014.04-00005-gd24cabc
finished. total time: 0.000s
$ fastboot getvar version-bootloader
version-bootloader: U-Boot 2019.07-rc4-00240-g00c9f2a2ec
Finished. Total time: 0.005s
or initiate a reboot:

27
drivers/fastboot/fb_getvar.c
View File

@ -12,14 +12,13 @@
#include <version.h>
static void getvar_version(char *var_parameter, char *response);
static void getvar_bootloader_version(char *var_parameter, char *response);
static void getvar_version_bootloader(char *var_parameter, char *response);
static void getvar_downloadsize(char *var_parameter, char *response);
static void getvar_serialno(char *var_parameter, char *response);
static void getvar_version_baseband(char *var_parameter, char *response);
static void getvar_product(char *var_parameter, char *response);
static void getvar_platform(char *var_parameter, char *response);
static void getvar_current_slot(char *var_parameter, char *response);
static void getvar_slot_suffixes(char *var_parameter, char *response);
#if CONFIG_IS_ENABLED(FASTBOOT_FLASH)
static void getvar_has_slot(char *var_parameter, char *response);
#endif
@ -29,6 +28,7 @@ static void getvar_partition_type(char *part_name, char *response);
#if CONFIG_IS_ENABLED(FASTBOOT_FLASH)
static void getvar_partition_size(char *part_name, char *response);
#endif
static void getvar_is_userspace(char *var_parameter, char *response);
static const struct {
const char *variable;
@ -37,12 +37,9 @@ static const struct {
{
.variable = "version",
.dispatch = getvar_version
}, {
.variable = "bootloader-version",
.dispatch = getvar_bootloader_version
}, {
.variable = "version-bootloader",
.dispatch = getvar_bootloader_version
.dispatch = getvar_version_bootloader
}, {
.variable = "downloadsize",
.dispatch = getvar_downloadsize
@ -64,9 +61,6 @@ static const struct {
}, {
.variable = "current-slot",
.dispatch = getvar_current_slot
}, {
.variable = "slot-suffixes",
.dispatch = getvar_slot_suffixes
#if CONFIG_IS_ENABLED(FASTBOOT_FLASH)
}, {
.variable = "has-slot",
@ -82,6 +76,9 @@ static const struct {
.variable = "partition-size",
.dispatch = getvar_partition_size
#endif
}, {
.variable = "is-userspace",
.dispatch = getvar_is_userspace
}
};
@ -131,7 +128,7 @@ static void getvar_version(char *var_parameter, char *response)
fastboot_okay(FASTBOOT_VERSION, response);
}
static void getvar_bootloader_version(char *var_parameter, char *response)
static void getvar_version_bootloader(char *var_parameter, char *response)
{
fastboot_okay(U_BOOT_VERSION, response);
}
@ -182,11 +179,6 @@ static void getvar_current_slot(char *var_parameter, char *response)
fastboot_okay("a", response);
}
static void getvar_slot_suffixes(char *var_parameter, char *response)
{
fastboot_okay("a,b", response);
}
#if CONFIG_IS_ENABLED(FASTBOOT_FLASH)
static void getvar_has_slot(char *part_name, char *response)
{
@ -252,6 +244,11 @@ static void getvar_partition_size(char *part_name, char *response)
}
#endif
static void getvar_is_userspace(char *var_parameter, char *response)
{
fastboot_okay("no", response);
}
/**
* fastboot_getvar() - Writes variable indicated by cmd_parameter to response.
*

6
drivers/phy/Kconfig
View File

@ -84,6 +84,12 @@ config BCM6368_USBH_PHY
help
Support for the Broadcom MIPS BCM6368 USBH PHY.
config PHY_DA8XX_USB
tristate "TI DA8xx USB PHY Driver"
depends on PHY && ARCH_DAVINCI
help
Enable this to support the USB PHY on DA8xx SoCs.
config PIPE3_PHY
bool "Support omap's PIPE3 PHY"
depends on PHY && ARCH_OMAP2PLUS

1
drivers/phy/Makefile
View File

@ -21,3 +21,4 @@ obj-$(CONFIG_MSM8916_USB_PHY) += msm8916-usbh-phy.o
obj-$(CONFIG_OMAP_USB2_PHY) += omap-usb2-phy.o
obj-$(CONFIG_KEYSTONE_USB_PHY) += keystone-usb-phy.o
obj-$(CONFIG_MT76X8_USB_PHY) += mt76x8-usb-phy.o
obj-$(CONFIG_PHY_DA8XX_USB) += phy-da8xx-usb.o

64
drivers/phy/phy-da8xx-usb.c Normal file
View File

@ -0,0 +1,64 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Based on the DA8xx "glue layer" code.
* Copyright (c) 2008-2019, MontaVista Software, Inc. <source@mvista.com>
*
* DT support added by: Adam Ford <aford173@gmail.com>
*/
#include <common.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <asm/arch/hardware.h>
#include <asm/arch/da8xx-usb.h>
#include <asm/io.h>
#include <generic-phy.h>
static int da8xx_usb_phy_power_on(struct phy *phy)
{
unsigned long timeout;
clrsetbits_le32(&davinci_syscfg_regs->cfgchip2,
CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN |
CFGCHIP2_OTGMODE | CFGCHIP2_REFFREQ,
CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN |
CFGCHIP2_PHY_PLLON | CFGCHIP2_REFFREQ_24MHZ);
/* wait until the usb phy pll locks */
timeout = get_timer(0);
while (get_timer(timeout) < 10) {
if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD)
return 0;
}
debug("Phy was not turned on\n");
return -ENODEV;
}
static int da8xx_usb_phy_power_off(struct phy *phy)
{
clrsetbits_le32(&davinci_syscfg_regs->cfgchip2,
CFGCHIP2_PHY_PLLON,
CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN);
return 0;
}
static const struct udevice_id da8xx_phy_ids[] = {
{ .compatible = "ti,da830-usb-phy" },
{ }
};
static struct phy_ops da8xx_phy_ops = {
.power_on = da8xx_usb_phy_power_on,
.power_off = da8xx_usb_phy_power_off,
};
U_BOOT_DRIVER(da8xx_phy) = {
.name = "da8xx-usb-phy",
.id = UCLASS_PHY,
.of_match = da8xx_phy_ids,
.ops = &da8xx_phy_ops,
};

1
drivers/usb/gadget/f_dfu.c
View File

@ -748,6 +748,7 @@ static void dfu_unbind(struct usb_configuration *c, struct usb_function *f)
if (f_dfu->function) {
i = alt_num;
i++; /* free DFU Functional Descriptor */
while (i) {
free(f_dfu->function[--i]);
f_dfu->function[i] = NULL;

7
drivers/usb/host/Kconfig
View File

@ -236,6 +236,13 @@ config USB_OHCI_HCD
based system where you're not sure, the "lspci -v" entry will list the
right "prog-if" for your USB controller(s): EHCI, OHCI, or UHCI.
config USB_OHCI_PCI
bool "Support for PCI-based OHCI USB controller"
depends on DM_USB
default n
help
Enables support for the PCI-based OHCI controller.
if USB_OHCI_HCD
config USB_OHCI_GENERIC

1
drivers/usb/host/Makefile
View File

@ -16,6 +16,7 @@ obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o
obj-$(CONFIG_USB_SL811HS) += sl811-hcd.o
obj-$(CONFIG_USB_OHCI_EP93XX) += ohci-ep93xx.o
obj-$(CONFIG_USB_OHCI_LPC32XX) += ohci-lpc32xx.o
obj-$(CONFIG_USB_OHCI_PCI) += ohci-pci.o
obj-$(CONFIG_USB_OHCI_GENERIC) += ohci-generic.o
# echi

12
drivers/usb/host/ohci-hcd.c
View File

@ -50,8 +50,9 @@
#endif
#if defined(CONFIG_CPU_ARM920T) || \
defined(CONFIG_PCI_OHCI) || \
defined(CONFIG_SYS_OHCI_USE_NPS)
defined(CONFIG_PCI_OHCI) || \
defined(CONFIG_DM_PCI) || \
defined(CONFIG_SYS_OHCI_USE_NPS)
# define OHCI_USE_NPS /* force NoPowerSwitching mode */
#endif
@ -64,6 +65,7 @@
#define OHCI_CONTROL_INIT \
(OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
#if !CONFIG_IS_ENABLED(DM_USB)
#ifdef CONFIG_PCI_OHCI
static struct pci_device_id ohci_pci_ids[] = {
{0x10b9, 0x5237}, /* ULI1575 PCI OHCI module ids */
@ -73,6 +75,7 @@ static struct pci_device_id ohci_pci_ids[] = {
{0, 0}
};
#endif
#endif
#ifdef CONFIG_PCI_EHCI_DEVNO
static struct pci_device_id ehci_pci_ids[] = {
@ -2044,8 +2047,11 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
printf("OHCI regs address 0x%08x\n", base);
gohci.regs = (struct ohci_regs *)base;
} else
} else {
printf("%s: OHCI devnr: %d not found\n", __func__,
CONFIG_PCI_OHCI_DEVNO);
return -1;
}
#else
gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE;
#endif

52
drivers/usb/host/ohci-pci.c Normal file
View File

@ -0,0 +1,52 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2019
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*
*/
#include <common.h>
#include <dm.h>
#include <errno.h>
#include <pci.h>
#include <usb.h>
#include <asm/io.h>
#include "ohci.h"
static int ohci_pci_probe(struct udevice *dev)
{
struct ohci_regs *regs;
regs = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
return ohci_register(dev, regs);
}
static int ohci_pci_remove(struct udevice *dev)
{
return ohci_deregister(dev);
}
static const struct udevice_id ohci_pci_ids[] = {
{ .compatible = "ohci-pci" },
{ }
};
U_BOOT_DRIVER(ohci_pci) = {
.name = "ohci_pci",
.id = UCLASS_USB,
.probe = ohci_pci_probe,
.remove = ohci_pci_remove,
.of_match = ohci_pci_ids,
.ops = &ohci_usb_ops,
.platdata_auto_alloc_size = sizeof(struct usb_platdata),
.priv_auto_alloc_size = sizeof(ohci_t),
.flags = DM_FLAG_ALLOC_PRIV_DMA,
};
static struct pci_device_id ohci_pci_supported[] = {
{ PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0) },
{},
};
U_BOOT_PCI_DEVICE(ohci_pci, ohci_pci_supported);

4
drivers/usb/host/ohci.h
View File

@ -14,8 +14,8 @@
#include <asm/io.h>
#ifdef CONFIG_SYS_OHCI_SWAP_REG_ACCESS
# define ohci_readl(a) __swap_32(readl(a))
# define ohci_writel(v, a) writel(__swap_32(v), a)
# define ohci_readl(a) __swap_32(in_be32((u32 *)a))
# define ohci_writel(a, b) out_be32((u32 *)b, __swap_32(a))
#else
# define ohci_readl(a) readl(a)
# define ohci_writel(v, a) writel(v, a)

8
drivers/usb/musb-new/Kconfig
View File

@ -18,6 +18,14 @@ config USB_MUSB_GADGET
help
Enables the MUSB USB dual-role controller in gadget mode.
config USB_MUSB_DA8XX
bool "Enable DA8xx MUSB Controller"
depends on DM_USB
help
Say y here to enable support for the dual role high
speed USB controller based on the Mentor Graphics
silicon IP.
config USB_MUSB_TI
bool "Enable TI OTG USB controller"
depends on DM_USB

1
drivers/usb/musb-new/Makefile
View File

@ -6,6 +6,7 @@ obj-$(CONFIG_USB_MUSB_GADGET) += musb_gadget.o musb_gadget_ep0.o musb_core.o
obj-$(CONFIG_USB_MUSB_GADGET) += musb_uboot.o
obj-$(CONFIG_USB_MUSB_HOST) += musb_host.o musb_core.o musb_uboot.o
obj-$(CONFIG_USB_MUSB_DSPS) += musb_dsps.o
obj-$(CONFIG_USB_MUSB_DA8XX) += da8xx.o
obj-$(CONFIG_USB_MUSB_AM35X) += am35x.o
obj-$(CONFIG_USB_MUSB_OMAP2PLUS) += omap2430.o
obj-$(CONFIG_USB_MUSB_PIC32) += pic32.o

350
drivers/usb/musb-new/da8xx.c Normal file
View File

@ -0,0 +1,350 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Texas Instruments da8xx "glue layer"
*
* Copyright (c) 2019, by Texas Instruments
*
* Based on the DA8xx "glue layer" code.
* Copyright (c) 2008-2019, MontaVista Software, Inc. <source@mvista.com>
*
* DT support
* Copyright (c) 2016 Petr Kulhavy <petr@barix.com>
* This file is part of the Inventra Controller Driver for Linux.
*
*/
#include <common.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <asm/arch/hardware.h>
#include <asm/arch/da8xx-usb.h>
#include <linux/usb/otg.h>
#include <asm/omap_musb.h>
#include <generic-phy.h>
#include "linux-compat.h"
#include "musb_core.h"
#include "musb_uboot.h"
/* USB 2.0 OTG module registers */
#define DA8XX_USB_REVISION_REG 0x00
#define DA8XX_USB_CTRL_REG 0x04
#define DA8XX_USB_STAT_REG 0x08
#define DA8XX_USB_EMULATION_REG 0x0c
#define DA8XX_USB_SRP_FIX_TIME_REG 0x18
#define DA8XX_USB_INTR_SRC_REG 0x20
#define DA8XX_USB_INTR_SRC_SET_REG 0x24
#define DA8XX_USB_INTR_SRC_CLEAR_REG 0x28
#define DA8XX_USB_INTR_MASK_REG 0x2c
#define DA8XX_USB_INTR_MASK_SET_REG 0x30
#define DA8XX_USB_INTR_MASK_CLEAR_REG 0x34
#define DA8XX_USB_INTR_SRC_MASKED_REG 0x38
#define DA8XX_USB_END_OF_INTR_REG 0x3c
#define DA8XX_USB_GENERIC_RNDIS_EP_SIZE_REG(n) (0x50 + (((n) - 1) << 2))
/* Control register bits */
#define DA8XX_SOFT_RESET_MASK 1
#define DA8XX_USB_TX_EP_MASK 0x1f /* EP0 + 4 Tx EPs */
#define DA8XX_USB_RX_EP_MASK 0x1e /* 4 Rx EPs */
/* USB interrupt register bits */
#define DA8XX_INTR_USB_SHIFT 16
#define DA8XX_INTR_USB_MASK (0x1ff << DA8XX_INTR_USB_SHIFT) /* 8 Mentor */
/* interrupts and DRVVBUS interrupt */
#define DA8XX_INTR_DRVVBUS 0x100
#define DA8XX_INTR_RX_SHIFT 8
#define DA8XX_INTR_RX_MASK (DA8XX_USB_RX_EP_MASK << DA8XX_INTR_RX_SHIFT)
#define DA8XX_INTR_TX_SHIFT 0
#define DA8XX_INTR_TX_MASK (DA8XX_USB_TX_EP_MASK << DA8XX_INTR_TX_SHIFT)
#define DA8XX_MENTOR_CORE_OFFSET 0x400
static irqreturn_t da8xx_musb_interrupt(int irq, void *hci)
{
struct musb *musb = hci;
void __iomem *reg_base = musb->ctrl_base;
unsigned long flags;
irqreturn_t ret = IRQ_NONE;
u32 status;
spin_lock_irqsave(&musb->lock, flags);
/*
* NOTE: DA8XX shadows the Mentor IRQs. Don't manage them through
* the Mentor registers (except for setup), use the TI ones and EOI.
*/
/* Acknowledge and handle non-CPPI interrupts */
status = musb_readl(reg_base, DA8XX_USB_INTR_SRC_MASKED_REG);
if (!status)
goto eoi;
musb_writel(reg_base, DA8XX_USB_INTR_SRC_CLEAR_REG, status);
dev_dbg(musb->controller, "USB IRQ %08x\n", status);
musb->int_rx = (status & DA8XX_INTR_RX_MASK) >> DA8XX_INTR_RX_SHIFT;
musb->int_tx = (status & DA8XX_INTR_TX_MASK) >> DA8XX_INTR_TX_SHIFT;
musb->int_usb = (status & DA8XX_INTR_USB_MASK) >> DA8XX_INTR_USB_SHIFT;
/*
* DRVVBUS IRQs are the only proxy we have (a very poor one!) for
* DA8xx's missing ID change IRQ. We need an ID change IRQ to
* switch appropriately between halves of the OTG state machine.
* Managing DEVCTL.Session per Mentor docs requires that we know its
* value but DEVCTL.BDevice is invalid without DEVCTL.Session set.
* Also, DRVVBUS pulses for SRP (but not at 5 V)...
*/
if (status & (DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT)) {
int drvvbus = musb_readl(reg_base, DA8XX_USB_STAT_REG);
void __iomem *mregs = musb->mregs;
u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
int err;
err = musb->int_usb & MUSB_INTR_VBUSERROR;
if (err) {
/*
* The Mentor core doesn't debounce VBUS as needed
* to cope with device connect current spikes. This
* means it's not uncommon for bus-powered devices
* to get VBUS errors during enumeration.
*
* This is a workaround, but newer RTL from Mentor
* seems to allow a better one: "re"-starting sessions
* without waiting for VBUS to stop registering in
* devctl.
*/
musb->int_usb &= ~MUSB_INTR_VBUSERROR;
WARNING("VBUS error workaround (delay coming)\n");
} else if (drvvbus) {
MUSB_HST_MODE(musb);
musb->port1_status |= USB_PORT_STAT_POWER;
} else if (!(musb->int_usb & MUSB_INTR_BABBLE)) {
/*
* When babble condition happens, drvvbus interrupt
* is also generated. Ignore this drvvbus interrupt
* and let babble interrupt handler recovers the
* controller; otherwise, the host-mode flag is lost
* due to the MUSB_DEV_MODE() call below and babble
* recovery logic will not be called.
*/
musb->is_active = 0;
MUSB_DEV_MODE(musb);
musb->port1_status &= ~USB_PORT_STAT_POWER;
}
ret = IRQ_HANDLED;
}
if (musb->int_tx || musb->int_rx || musb->int_usb)
ret |= musb_interrupt(musb);
eoi:
/* EOI needs to be written for the IRQ to be re-asserted. */
if (ret == IRQ_HANDLED || status)
musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
spin_unlock_irqrestore(&musb->lock, flags);
return ret;
}
static int da8xx_musb_init(struct musb *musb)
{
u32 revision;
void __iomem *reg_base = musb->ctrl_base;
int ret;
/* reset the controller */
writel(0x1, &da8xx_usb_regs->control);
udelay(50);
/* Returns zero if e.g. not clocked */
revision = readl(&da8xx_usb_regs->revision);
if (revision == 0)
return -ENODEV;
/* Disable all interrupts */
writel((DA8XX_USB_USBINT_MASK | DA8XX_USB_TXINT_MASK |
DA8XX_USB_RXINT_MASK), &da8xx_usb_regs->intmsk_set);
musb->mregs += DA8XX_MENTOR_CORE_OFFSET;
/* NOTE: IRQs are in mixed mode, not bypass to pure MUSB */
debug("DA8xx OTG revision %08x, control %02x\n", revision,
musb_readb(reg_base, DA8XX_USB_CTRL_REG));
musb->isr = da8xx_musb_interrupt;
return 0;
}
static int da8xx_musb_exit(struct musb *musb)
{
/* flush any interrupts */
writel((DA8XX_USB_USBINT_MASK | DA8XX_USB_TXINT_MASK |
DA8XX_USB_RXINT_MASK), &da8xx_usb_regs->intmsk_clr);
writel(0, &da8xx_usb_regs->eoi);
return 0;
}
/**
* da8xx_musb_enable - enable interrupts
*/
static int da8xx_musb_enable(struct musb *musb)
{
void __iomem *reg_base = musb->ctrl_base;
u32 mask;
/* Workaround: setup IRQs through both register sets. */
mask = ((musb->epmask & DA8XX_USB_TX_EP_MASK) << DA8XX_INTR_TX_SHIFT) |
((musb->epmask & DA8XX_USB_RX_EP_MASK) << DA8XX_INTR_RX_SHIFT) |
DA8XX_INTR_USB_MASK;
musb_writel(reg_base, DA8XX_USB_INTR_MASK_SET_REG, mask);
/* Force the DRVVBUS IRQ so we can start polling for ID change. */
musb_writel(reg_base, DA8XX_USB_INTR_SRC_SET_REG,
DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT);
return 0;
}
/**
* da8xx_musb_disable - disable HDRC and flush interrupts
*/
static void da8xx_musb_disable(struct musb *musb)
{
void __iomem *reg_base = musb->ctrl_base;
musb_writel(reg_base, DA8XX_USB_INTR_MASK_CLEAR_REG,
DA8XX_INTR_USB_MASK |
DA8XX_INTR_TX_MASK | DA8XX_INTR_RX_MASK);
musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
}
void da8xx_musb_reset(struct udevice *dev)
{
void *reg_base = dev_read_addr_ptr(dev);
/* Reset the controller */
musb_writel(reg_base, DA8XX_USB_CTRL_REG, DA8XX_SOFT_RESET_MASK);
}
void da8xx_musb_clear_irq(struct udevice *dev)
{
/* flush any interrupts */
writel((DA8XX_USB_USBINT_MASK | DA8XX_USB_TXINT_MASK |
DA8XX_USB_RXINT_MASK), &da8xx_usb_regs->intmsk_clr);
writel(0, &da8xx_usb_regs->eoi);
}
const struct musb_platform_ops da8xx_ops = {
.init = da8xx_musb_init,
.exit = da8xx_musb_exit,
.enable = da8xx_musb_enable,
.disable = da8xx_musb_disable,
};
struct da8xx_musb_platdata {
void *base;
void *ctrl_mod_base;
struct musb_hdrc_platform_data plat;
struct musb_hdrc_config musb_config;
struct omap_musb_board_data otg_board_data;
struct phy phy;
};
static int da8xx_musb_ofdata_to_platdata(struct udevice *dev)
{
struct da8xx_musb_platdata *platdata = dev_get_platdata(dev);
const void *fdt = gd->fdt_blob;
int node = dev_of_offset(dev);
platdata->base = (void *)dev_read_addr_ptr(dev);
platdata->musb_config.multipoint = 1;
platdata->musb_config.dyn_fifo = 1;
platdata->musb_config.num_eps = 5;
platdata->musb_config.ram_bits = 10;
platdata->plat.power = fdtdec_get_int(fdt, node, "power", 50);
platdata->otg_board_data.interface_type = MUSB_INTERFACE_UTMI;
platdata->plat.mode = MUSB_HOST;
platdata->otg_board_data.dev = dev;
platdata->plat.config = &platdata->musb_config;
platdata->plat.platform_ops = &da8xx_ops;
platdata->plat.board_data = &platdata->otg_board_data;
platdata->otg_board_data.clear_irq = da8xx_musb_clear_irq;
platdata->otg_board_data.reset = da8xx_musb_reset;
return 0;
}
static int da8xx_musb_probe(struct udevice *dev)
{
struct musb_host_data *host = dev_get_priv(dev);
struct da8xx_musb_platdata *platdata = dev_get_platdata(dev);
struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
struct omap_musb_board_data *otg_board_data;
int ret;
void *base = dev_read_addr_ptr(dev);
/* Get the phy info from the device tree */
ret = generic_phy_get_by_name(dev, "usb-phy", &platdata->phy);
if (ret)
return ret;
/* Initialize the phy */
ret = generic_phy_init(&platdata->phy);
if (ret)
return ret;
/* enable psc for usb2.0 */
lpsc_on(33);
/* Enable phy */
generic_phy_power_on(&platdata->phy);
priv->desc_before_addr = true;
otg_board_data = &platdata->otg_board_data;
host->host = musb_init_controller(&platdata->plat,
(struct device *)otg_board_data,
platdata->base);
if (!host->host) {
ret = -ENODEV;
goto shutdown; /* Shutdown what we started */
}
ret = musb_lowlevel_init(host);
if (ret == 0)
return 0;
shutdown:
/* Turn off the phy if we fail */
generic_phy_power_off(&platdata->phy);
lpsc_disable(33);
return ret;
}
static int da8xx_musb_remove(struct udevice *dev)
{
struct musb_host_data *host = dev_get_priv(dev);
musb_stop(host->host);
return 0;
}
static const struct udevice_id da8xx_musb_ids[] = {
{ .compatible = "ti,da830-musb" },
{ }
};
U_BOOT_DRIVER(da8xx_musb) = {
.name = "da8xx-musb",
.id = UCLASS_USB,
.of_match = da8xx_musb_ids,
.ofdata_to_platdata = da8xx_musb_ofdata_to_platdata,
.probe = da8xx_musb_probe,
.remove = da8xx_musb_remove,
.ops = &musb_usb_ops,
.platdata_auto_alloc_size = sizeof(struct da8xx_musb_platdata),
.priv_auto_alloc_size = sizeof(struct musb_host_data),
};