Merge git://www.denx.de/git/u-boot-ppc4xx

arch/powerpc/cpu/ppc4xx/Kconfig

@@ -152,7 +152,7 @@ source "board/gdsys/405ex/Kconfig"
 source "board/gdsys/dlvision/Kconfig"
 source "board/gdsys/gdppc440etx/Kconfig"
 source "board/gdsys/intip/Kconfig"
-source "board/lwmon5/Kconfig"
+source "board/liebherr/lwmon5/Kconfig"
 source "board/mosaixtech/icon/Kconfig"
 source "board/mpl/mip405/Kconfig"
 source "board/mpl/pip405/Kconfig"

arch/powerpc/cpu/ppc4xx/start.S

@@ -1795,34 +1795,11 @@ ppc405ep_init:
 ..no_pllset:
 #endif /* CONFIG_BUBINGA */
 
-#ifdef CONFIG_TAIHU
-	mfdcr	r4, CPC0_BOOT
-	andi.	r5, r4, CPC0_BOOT_SEP@l
-	bne	strap_1			/* serial eeprom present */
-	addis	r5,0,CPLD_REG0_ADDR@h
-	ori	r5,r5,CPLD_REG0_ADDR@l
-	andi.	r5, r5, 0x10
-	bne	_pci_66mhz
-#endif /* CONFIG_TAIHU */
-
 	addis	r3,0,PLLMR0_DEFAULT@h	/* PLLMR0 default value */
 	ori	r3,r3,PLLMR0_DEFAULT@l	/* */
 	addis	r4,0,PLLMR1_DEFAULT@h	/* PLLMR1 default value */
 	ori	r4,r4,PLLMR1_DEFAULT@l	/* */
 
-#ifdef CONFIG_TAIHU
-	b	1f
-_pci_66mhz:
-	addis	r3,0,PLLMR0_DEFAULT_PCI66@h
-	ori	r3,r3,PLLMR0_DEFAULT_PCI66@l
-	addis	r4,0,PLLMR1_DEFAULT_PCI66@h
-	ori	r4,r4,PLLMR1_DEFAULT_PCI66@l
-	b	1f
-strap_1:
-	mfdcr	r3, CPC0_PLLMR0
-	mfdcr	r4, CPC0_PLLMR1
-#endif /* CONFIG_TAIHU */
-
 1:
 	b	pll_write		/* Write the CPC0_PLLMR with new value */
 

board/liebherr/lwmon5/Kconfig

@@ -3,6 +3,9 @@ if TARGET_LWMON5
 config SYS_BOARD
 	default "lwmon5"
 
+config SYS_VENDOR
+	default "liebherr"
+
 config SYS_CONFIG_NAME
 	default "lwmon5"
 

board/liebherr/lwmon5/MAINTAINERS

@@ -1,6 +1,6 @@
 LWMON5 BOARD
 M:	Stefan Roese <sr@denx.de>
 S:	Maintained
-F:	board/lwmon5/
+F:	board/liebherr/lwmon5/
 F:	include/configs/lwmon5.h
 F:	configs/lwmon5_defconfig