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armv8: fsl-layerscape: Update I2C clock divider
By default, i2c input clock is programmed at platform clk / 2 in u-boot, but this is not correct for all the platforms, Update I2C clock divider's default values as per SoC (LS1012A, LS1028A, LX2160A and LS1088A). Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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@ -501,6 +501,10 @@ config SYS_FSL_I2C_CLK_DIV
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config SYS_FSL_IFC_CLK_DIV
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config SYS_FSL_IFC_CLK_DIV
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int "IFC clock divider"
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int "IFC clock divider"
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default 1 if ARCH_LS1043A
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default 1 if ARCH_LS1043A
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default 4 if ARCH_LS1012A
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default 4 if ARCH_LS1028A
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default 8 if ARCH_LX2160A
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default 8 if ARCH_LS1088A
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default 2
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default 2
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help
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help
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This is the divider that is used to derive IFC clock from Platform
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This is the divider that is used to derive IFC clock from Platform
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