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rockchip: rk3288-firefly: sync sdmmc pinctrl from mainline

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The rk3288-firefly board have different setting for sdmmc
io, sync then from kernel mainline:
6fbc7275c7a9 Linux 5.2-rc7

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Kever Yang 2019-07-09 21:58:51 +08:00
parent e4ea8f3c08
commit 2ea3addfa2
2 changed files with 26 additions and 6 deletions
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6
arch/arm/dts/rk3288-firefly-u-boot.dtsi
View File

@ -29,11 +29,7 @@
u-boot,dm-pre-reloc;
};
&pcfg_pull_none_drv_8ma {
u-boot,dm-spl;
};
&pcfg_pull_up_drv_8ma {
&pcfg_pull_up_drv_12ma {
u-boot,dm-spl;
};

26
arch/arm/dts/rk3288-firefly.dtsi
View File

@ -320,6 +320,11 @@
output-low;
};
pcfg_pull_up_drv_12ma: pcfg-pull-up-drv-12ma {
bias-pull-up;
drive-strength = <12>;
};
act8846 {
pwr_hold: pwr-hold {
rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_output_high>;
@ -363,8 +368,27 @@
};
sdmmc {
/*
* Default drive strength isn't enough to achieve even
* high-speed mode on firefly board so bump up to 12ma.
*/
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_12ma>,
<6 RK_PC1 1 &pcfg_pull_up_drv_12ma>,
<6 RK_PC2 1 &pcfg_pull_up_drv_12ma>,
<6 RK_PC3 1 &pcfg_pull_up_drv_12ma>;
};
sdmmc_clk: sdmmc-clk {
rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_12ma>;
};
sdmmc_cmd: sdmmc-cmd {
rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_12ma>;
};
sdmmc_pwr: sdmmc-pwr {
rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};