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ppc4xx: AMCC Luan uses the new boardspecific DDR2 controller setup
Signed-off-by: Stefan Roese <sr@denx.de>
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parent
df3f17422a
commit
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@ -104,6 +104,13 @@ int checkboard(void)
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return 0;
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return 0;
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}
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}
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/*
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* Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
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* board specific values.
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*/
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u32 ddr_clktr(u32 default_val) {
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return (SDRAM_CLKTR_CLKP_180_DEG_ADV);
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}
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/*************************************************************************
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/*************************************************************************
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* int testdram()
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* int testdram()
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@ -136,7 +136,6 @@
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#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
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#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
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#define SPD_EEPROM_ADDRESS {0x53, 0x52} /* SPD i2c spd addresses*/
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#define SPD_EEPROM_ADDRESS {0x53, 0x52} /* SPD i2c spd addresses*/
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#define CONFIG_DDR_ECC 1 /* with ECC support */
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#define CONFIG_DDR_ECC 1 /* with ECC support */
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#define CFG_44x_DDR2_CKTR_180 1 /* use 180 deg advance */
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/*-----------------------------------------------------------------------
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/*-----------------------------------------------------------------------
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* I2C
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* I2C
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