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ppc4xx: Only print ECC related info when the error bis are set

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Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Stefan Roese 2007-07-30 11:04:57 +02:00
parent e36220a4ba
commit 27a528fb41
1 changed files with 24 additions and 14 deletions
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38
cpu/ppc4xx/traps.c
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@ -147,6 +147,8 @@ MachineCheckException(struct pt_regs *regs)
unsigned long fixup, val; unsigned long fixup, val;
#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) #if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
u32 value2; u32 value2;
int corr_ecc = 0;
int uncorr_ecc = 0;
#endif #endif
/* Probing PCI using config cycles cause this exception /* Probing PCI using config cycles cause this exception
@ -214,14 +216,22 @@ MachineCheckException(struct pt_regs *regs)
printf("DDR0: At least one interrupt active\n"); printf("DDR0: At least one interrupt active\n");
if (val & 0x40) if (val & 0x40)
printf("DDR0: DRAM initialization complete.\n"); printf("DDR0: DRAM initialization complete.\n");
if (val & 0x20) if (val & 0x20) {
printf("DDR0: Multiple uncorrectable ECC events.\n"); printf("DDR0: Multiple uncorrectable ECC events.\n");
if (val & 0x10) uncorr_ecc = 1;
}
if (val & 0x10) {
printf("DDR0: Single uncorrectable ECC event.\n"); printf("DDR0: Single uncorrectable ECC event.\n");
if (val & 0x08) uncorr_ecc = 1;
}
if (val & 0x08) {
printf("DDR0: Multiple correctable ECC events.\n"); printf("DDR0: Multiple correctable ECC events.\n");
if (val & 0x04) corr_ecc = 1;
}
if (val & 0x04) {
printf("DDR0: Single correctable ECC event.\n"); printf("DDR0: Single correctable ECC event.\n");
corr_ecc = 1;
}
if (val & 0x02) if (val & 0x02)
printf("Multiple accesses outside the defined" printf("Multiple accesses outside the defined"
" physical memory space detected\n"); " physical memory space detected\n");
@ -252,11 +262,11 @@ MachineCheckException(struct pt_regs *regs)
printf("DDR0: No DDR0 error know 0x%x %p\n", val, value2); printf("DDR0: No DDR0 error know 0x%x %p\n", val, value2);
} }
mfsdram(DDR0_23, val); mfsdram(DDR0_23, val);
if ( (val >> 16) & 0xff) if (((val >> 16) & 0xff) && corr_ecc)
printf("DDR0: Syndrome for correctable ECC event 0x%x\n", printf("DDR0: Syndrome for correctable ECC event 0x%x\n",
(val >> 16) & 0xff); (val >> 16) & 0xff);
mfsdram(DDR0_23, val); mfsdram(DDR0_23, val);
if ( (val >> 8) & 0xff) if (((val >> 8) & 0xff) && uncorr_ecc)
printf("DDR0: Syndrome for uncorrectable ECC event 0x%x\n", printf("DDR0: Syndrome for uncorrectable ECC event 0x%x\n",
(val >> 8) & 0xff); (val >> 8) & 0xff);
mfsdram(DDR0_33, val); mfsdram(DDR0_33, val);
@ -264,28 +274,28 @@ MachineCheckException(struct pt_regs *regs)
printf("DDR0: Address of command that caused an " printf("DDR0: Address of command that caused an "
"Out-of-Range interrupt %p\n", val); "Out-of-Range interrupt %p\n", val);
mfsdram(DDR0_34, val); mfsdram(DDR0_34, val);
if (val) if (val && uncorr_ecc)
printf("DDR0: Address of uncorrectable ECC event %p\n", val); printf("DDR0: Address of uncorrectable ECC event %p\n", val);
mfsdram(DDR0_35, val); mfsdram(DDR0_35, val);
if (val) if (val && uncorr_ecc)
printf("DDR0: Address of uncorrectable ECC event %p\n", val); printf("DDR0: Address of uncorrectable ECC event %p\n", val);
mfsdram(DDR0_36, val); mfsdram(DDR0_36, val);
if (val) if (val && uncorr_ecc)
printf("DDR0: Data of uncorrectable ECC event 0x%08x\n", val); printf("DDR0: Data of uncorrectable ECC event 0x%08x\n", val);
mfsdram(DDR0_37, val); mfsdram(DDR0_37, val);
if (val) if (val && uncorr_ecc)
printf("DDR0: Data of uncorrectable ECC event 0x%08x\n", val); printf("DDR0: Data of uncorrectable ECC event 0x%08x\n", val);
mfsdram(DDR0_38, val); mfsdram(DDR0_38, val);
if (val) if (val && corr_ecc)
printf("DDR0: Address of correctable ECC event %p\n", val); printf("DDR0: Address of correctable ECC event %p\n", val);
mfsdram(DDR0_39, val); mfsdram(DDR0_39, val);
if (val) if (val && corr_ecc)
printf("DDR0: Address of correctable ECC event %p\n", val); printf("DDR0: Address of correctable ECC event %p\n", val);
mfsdram(DDR0_40, val); mfsdram(DDR0_40, val);
if (val) if (val && corr_ecc)
printf("DDR0: Data of correctable ECC event 0x%08x\n", val); printf("DDR0: Data of correctable ECC event 0x%08x\n", val);
mfsdram(DDR0_41, val); mfsdram(DDR0_41, val);
if (val) if (val && corr_ecc)
printf("DDR0: Data of correctable ECC event 0x%08x\n", val); printf("DDR0: Data of correctable ECC event 0x%08x\n", val);
#endif /* CONFIG_440EPX */ #endif /* CONFIG_440EPX */
#endif /* CONFIG_440 */ #endif /* CONFIG_440 */